copyright ? 2006, em microelectronic-marin sa 07/06 - rev. a 1 www.emmicroelectronic.com theseus tm cipher gold 128-3g EMTCG128-3G 128kb flash smart card ic + cryptography engine environment ? voltage supply class a, b: 3.0v to 5.0v 10% ? -25 to +85 c operating temperature ? max supply current 6ma @ 30mhz, class b ? > 4 kv esd protection hbm cpu ? software compatible cmos 80x51 industry standard ? local ram 256 b (data, idata memory spaces) ? ?far? addressing support extending ?xdata? up to 8mb ? accelerated architecture with 16 bit cpu performance level ? up to 30 mhz internal cpu clock idle modes ? idle and stop mode selectable modes ? nvm operation possible with cpu in idle mode ? io transmission and reception with cpu in idle mode ? max idle current 200 ua cryptography resources ? des / tdes hardware accelerator ? cbc mode hardware acceleration ? hardware random number generator fips140-2 security ? unique chip identification number ? notification of tampering ? internal clock generation ? ic operates under regulated voltage ? dpa/spa resistance mechanisms ? under / over voltage sensors (vcc) ? crc hardware module featuring crc16 and iso3309 crc memory control ? memory management unit (mmu) ? code / data flexible memo ry partitioning thanks to gpnvm512 general purpose nv memory ? application secure os partitioning (hw firewall) ? extended addressing capability with java mode for optimal memory mapping ? eeprom and gpnvm512 fast byte program: 40 us / byte ? eeprom erase write control ? eeprom write in flash mode ? eeprom multiple page erase up to 128 bytes i/o ? iso 7816-3 compliant electrical interface ? iso 7816-3 compliant reset and response t=0 t=1 protocols memories ? 2048 bytes ram (xdata space) ? 80kb gpnvm512 (general purpose non volatile memory with 512b / page) ? 48kb eeprom ? 10 year data retention for eeprom / gpnvm512 ? eeprom, gpnvm512 endurance: 100 k cycles chip forms ? 8? wafer sawn or unsawn ? back grinding and distressing options ? 180 microns max thickness ? modules a, b on-chip voltage regulator iso 7816-3 interface 3g mmu (memory management unit interface) 2048 bytes ram 48k bytes eeprom 80kb bytes flash blocks gpnvm512 security module uvd / ovd dpa / spa protections random number generator 256 bytes ram fast architecture 80x51 core internal v dd power-on reset power management system 20/30mhz on-chip oscillator controlled clock divider des / tdes cbc / ebc crc hw module code data 9 EMTCG128-3G is software co mpatibility with emtg256-3g 9 emulation and debug development tools fully integrated within keil uvision2 em microelectronic - marin sa
copyright ? 2006, em microelectronic-marin sa 07/06 - rev. a 2 www.emmicroelectronic.com theseus tm cipher gold 128-3g EMTCG128-3G introduction EMTCG128-3G is a member of the theseus family of devices designed specifically for smart card applications. it is software compatible with the industry standard 8051 micro-contro ller, to guarantee the maximum availability of qualified software. the hardware implementation of t he core is a modern design not relying on microcode, with an increase of up to 4 times on a standard 8051's clocks per instruction. security of the family of devices makes them particularly suitable in electronic co mmerce and sensitive data areas. this is accomplished in hardware, with not only protection against out of par ameter operation of the device, but hardware memo ry management to protect against software security attacks. the cpu clock is derived from its own internal oscillator, so preventing attacks by clock manipulation, or extrapolating program execution by monitoring current variations on clock edges. the need to support the emerging multifunction cards requires that the device under software control can download an application and run it when the device is in the field embedded in a plastic card. this application can be in the form of a script to be executed by an interpreter or as a raw binary directly executed by the processor. the device has to be protected against the downloading of attack software designed to corrupt or uncover the working or dat a contained in the device. traditionally this has been a software function, which relies on the total integrit y of the embedded software. the EMTCG128-3G implement s the first level of protection in hardware. this maximises the security of the device, and allows t he reusability of developed certified code, by isolating it from the actual hardware implementation of the dev ice. this protection mechanism allows for a secure operating system to be embedded into the device at manufacture, which has access rights to features of the device that are denied to applications that can be loaded into the device at manufacture or in the field. with up to a 130kb (ram+gpnvm512+eeprom) of on chip memories EMTCG128-3G provides highly flexible memory partitioning between code and data. so called gpnvm512 standing for general purpose memory could be efficiently used to host data or code. its 512 bytes page size offers very compact memory usable as well for code and data storage. the secure operating system allocates to each application programme, areas of the memory resources of the device. the hardware then ensures t hat when the application code is executi ng only accesses to these designated spaces are made. an extension of applic ation mode has been developed to facilitate java card vi rtual machine integration. in systems where application isolation is not needed, the security mechanism acts as a general protection unit trapping software errors. serial interface EMTCG128-3G offers a unique serial interface compliant with the iso 7816-3 specification with several modes implemented allowing serial connections at 9600 up to 357k bits per second at 3.57mhz. EMTCG128-3G supports t=0 asynchronous half duplex character transmission protocol, t=1 asynchronous half duplex block transmission and a proprietary t=14 protocol used for fast loading of code into the otp by the card manufacturer. it handles minimum guard time requirements between characte rs specified by iso7816- 3 specification automatically. EMTCG128-3G is designed to be compatible with the iso7816-3 specification defining the c haracteristics of integrated circuit cards commonly referr ed to as smart cards. des/tdes high performance symmetric encryption / decryption algorithm can be achieved using des and triple des on chip hw accelerator, this engine could be used as well in ebc and cbc modes. the intrinsic security of this des implementation can be reinforced using spa/dpa protection mechanisms to achieve very high level of security. random number generator the on chip random number gener ator is fully fips140-2 compliant, providing a rapi d stream of truly random numbers. this allows us e of the random numbers generated beyond just the pr ovision of numbers for randomising transmissions or generating keys. clocks EMTCG128-3G has its own internal oscillator this allows the core of the device to be independent of the external clock. the processor can also be clocked much faster than the io clk signal. this ens ures the elimination of fraudulent attacks involving frequency jitter and unequal mark space ratios. the internal clock generator is connected to the core via a divider that is under the control of the software. th is allows the operating system writer to control the trade off between execution speed and power drawn by the device. extending battery life in hand help applications where slow interfaces are involved. anti tampering the EMTCG128-3G has ex tensive anti tampering provision including the moni toring of the connection to the device to ensure t hat deviations beyond a prescribed criteria result in the device being closed down before its operating c onditions are violated. on chip voltage regulators several on chip regulators is olate the various elements of the device from variati ons and fluctuations in the supply voltage. this allows elements to be characterised precisely, as they operate at one fixed voltage, which in turn maximises the endur ance of the device. technology this product is using superior flash memory superflash technology licensed from sst. superflash is a registered trademark of sst (silicon storage technology inc.).
copyright ? 2006, em microelectronic-marin sa 07/06 - rev. a 3 www.emmicroelectronic.com theseus tm cipher gold 128-3g EMTCG128-3G technical data absolute maximum ratings parameter symbol limit values unit min typical max supply operating volt v cc -0.3 6 v voltage at remaining pin v pin v ss ?0.3 v cc +0.3 v power dissipation p tot +60 mw storage temperature i cci -40 +125 c dc characteristics parameter symbol limit values unit min typical max operating temperature t a -25 +85 c supply voltage class a,b v cc 2.7 3 / 5 5.5 v supply current class b i cc 6 (note 1) ma supply current idle i cci 200 (note 2) a supply current stopped i ccs 100 (note 3) a note 1: the supply current refers to clock frequency of 5 mhz note 2: the supply current at 3.3v and a clock frequency of 1 mhz, at +25 0 c note 3: the supply current at 3.3v and +25 o c io pin: parameter symbol conditions min max unit h input voltage v ih i ihmax = 20 a 0.7 * v cc v cc v l input voltage v il i il max = 20 a -0.3 0.8 v h output voltage (note 1) v oh i ohmax = +20 a 0.7 * v cc v cc v l output voltage v ol i olmax = -1ma 0 0.4 v rise fall time t r , t f c in = c out = 30 pf 1 s note 1: assumes 20k pull up resistor on interface device clock (clk) parameter symbol condition min max unit h output voltage v oh i ohmax = +20 a v cc -0.7 v cc v l output voltage v ol i olmax = -20 a 0 0.5 v rise fall time t r , t f c in = c out = 30 pf 9% clk period reset(rst) parameter symbol condition min max unit h output voltage v oh i ohmax = +20 a v cc -0.7 v cc v l output voltage v ol i olmax = -20 a 0 0.6 v rise fall time t r , t f c in = c out = 30 pf 400 s em microelectronic-marin sa (em) makes no warranty for the use of its products, other than those expressly contained in the company's standard warranty which is detailed in em's general terms of sale located on the company's web site. em assumes no responsibility for any errors which may appear in this document, re serves the right to change devic es or specifications detaile d herein at any time without notice, and does not make any commitment to update the information contained herein. no licenses to patents or other intellectual property of em are granted in connection with t he sale of em products, expressl y or by implications. em's pr oducts are not authorized for use as components in life support devices or systems.
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