View LTC1685IS8_6262803.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ltc1685 features applicatio s u typical applicatio n u descriptio u 52mbps, precision delay, rs485 fail-safe transceiver n precision propagation delay over temperature: receiver/driver: 18.5ns 3.5ns n high data rate: 52mbps n low t plh /t phl skew: receiver/driver: 500ps typ n C7v to 12v rs485 input common mode range n guaranteed fail-safe receiver operation over the entire common mode range n high receiver input resistance: 3 22k, even when unpowered n short-circuit protected n thermal shutdown protected n driver maintains high impedance in three-state or with power off n single 5v supply n pin compatible with ltc485 n 45db cmrr at 26mhz the ltc ? 1685 is a high speed, precision delay rs485 transceiver that can operate at data rates as high as 52mbps. the device also meets the requirements of rs422. a unique architecture provides very stable propagation delays and low skew over a wide common mode and ambient temperature range. the driver and receiver feature three-state outputs, with disabled driver outputs maintaining high impedance over the entire common mode range. a short circuit feature detects shorted outputs and substantially reduces driver output current. a similar feature also protects the receiver output from short circuits. thermal shutdown circuitry protects from excessive power dissipation. the receiver has a fail-safe feature that guarantees a high output state when the inputs are shorted or are left floating. the ltc1685 rs485 transceiver guarantees receiver fail- safe operation over the entire common mode range (C 7v to 12v). input resistance will remain 3 22k when the device is unpowered or disabled. the ltc1685 operates from a single 5v supply and draws only 7ma of supply current. 10mbps data pulse 400ft category 5 utp 1685 ta02 driver input receiver input receiver output 100ns/div 1v/div 2v/div 5v/div cable delay , ltc and lt are registered trademarks of linear technology corporation. n high speed rs485/rs422 transceivers n level translator n backplane transceiver n sts-1/oc-1 data transceiver n fast-20, fast-40 scsi transceivers v cc1 gnd1 r ro1 re1 de1 di1 d rt rt 1685 ta01 v cc2 gnd2 r ro2 re2 de2 di2 d
2 ltc1685 wu u package / o rder i for atio a u g w a w u w a r b s o lu t exi t i s (note 1) supply voltage (v dd ) .............................................. 10v control input currents .................... C 100ma to 100ma control input voltages .................. C 0.5v to v dd + 0.5v driver input voltages .................... C 0.5v to v dd + 0.5v driver output voltages .................................. +12v/C 7v receiver input voltages ................................. +12v/C 7v receiver output voltages ............. C 0.5v to v dd + 0.5v receiver input differential ...................................... 10v short-circuit duration (driver v out : C 7v to 10v, receiver v out : 0v to v dd ) ............................... indefinite operating temperature range ltc1685c ............................................... 0 c to 70 c ltc1685i ............................................. C40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c order part number 1 2 3 4 8 7 6 5 top view v dd b a gnd s8 package 8-lead plastic so ro re de di r d t jmax = 125 c, q ja = 150 c/ w consult factory for military grade parts. s8 part marking dc electrical characteristics symbol parameter conditions min typ max units v od1 differential driver output (unloaded) i out = 0 l v dd v v od2 differential driver output (with load) r = 50 w (rs422) 2 v r = 27 w (rs485), figure 1 l 1.5 v dd v d v od change in magnitude of driver differential r = 27 w or 50 w , figure 1 l 0.2 v output voltage for complementary output states v oc driver common mode output voltage r = 27 w or 50 w , v dd = 5v, figure 1 l 23v d? v oc ? change in magnitude of driver common r = 27 w or 50 w , figure 1 l 0.2 v mode output voltage for complementary output states v ih input high voltage de, di, re l 2v v il input low voltage de, di, re l 0.8 v i in1 input current de, di, re l C1 1 m a i in2 input current (a, b) v a , v b = 12v, de = 0, v dd = 0v or 5.25v l 500 m a v a , v b = C 7v, de = 0, v dd = 0v or 5.25v l C 500 m a v th differential input threshold voltage C 7v v cm 12v l C 0.3 0.3 v for receiver d v th receiver input hysteresis v cm = 0v 25 mv v oh receiver output high voltage i out = C 4ma, v id = 300mv l 3.5 4.8 v v ol receiver output low voltage i out = 4ma, v id = C 300mv l 0.4 v i ozr three-state (high impedance) output 0.4v v out 2.4v l C1 1 m a current at receiver i dd supply current no load, pins 2, 3, 4 = 0v or v dd l 712 ma i osd1 driver short-circuit current, v out = high v out = C 7v or 10v (note 5) l 20 ma ltc1685cs8 LTC1685IS8 1685 1685i the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v dd = 5v 5%, unless otherwise noted. (notes 2, 3)
3 ltc1685 symbol parameter conditions min typ max units t plh , t phl driver input-to-output r diff = 54 w , c l1 = c l2 = 100pf, figures 3, 5, propagation delay ltc1685c l 15 18.5 22 ns ltc1685i l 13 18.5 25 ns t skew driver output a-to-output r diff = 54 w , c l1 = c l2 = 100pf, 500 ps b skew figures 3, 5 t r , t f driver rise/fall time r diff = 54 w , c l1 = c l2 = 100pf, 3.5 ns figures 3, 5 t zh driver enable to output high c l = 100pf, s2 closed, figures 4, 6 l 25 50 ns t zl driver enable to output low c l = 100pf, s1 closed, figures 4, 6 l 25 50 ns t lz driver disable from low c l = 15pf, s1 closed, figures 4, 6 l 25 50 ns t hz driver disable from high c l = 15pf, s2 closed, figures 4, 6 l 25 50 ns t plh , t phl receiver input-to-output c l = 15pf, figures 3, 7 propagation delay ltc1685c l 15 18.5 22 ns ltc1685i l 13 18.5 25 ns t sqd receiver skew ? t plh C t phl ? c l = 15pf, figures 3, 7 500 ps t zl receiver enable to output low c l = 15pf, s1 closed, figures 2, 8 l 25 50 ns t zh receiver enable to output high c l = 15pf, s2 closed, figures 2, 8 l 25 50 ns t lz receiver disable from low c l = 15pf, s1 closed, figures 2, 8 l 25 50 ns t hz receiver disable from high c l = 15pf, s2 closed, figures 2, 8 l 25 50 ns maximum receiver input (note 4) l 2000 ns rise/fall times t pkg-pkg package-to-package skew same temperature (note 4) 1.5 ns minimum input pulse width v dd = 5v 5% (note 4) ltc1685c l 17 19.2 ns ltc1685i l 20 25 ns maximum data rate v dd = 5v 5% (note 4) ltc1685c l 52 60 mbps ltc1685i l 40 50 mbps maximum input frequency v dd = 5v 5% (note 4) ltc1685c l 26 30 mhz ltc1685i l 20 25 mhz symbol parameter conditions min typ max units i osd2 driver short-circuit current, v out = low v out = C 7v or 10v (note 5) l 20 ma i osr receiver short-circuit current v out = 0v or v dd (note 5) l 20 ma r in input resistance C 7v v cm 12v l 22 k w c in input capacitance a, b inputs, d, de, re 3 pf open-circuit input voltage, figure 5 v dd = 5v (note 4) l 3.2 3.3 3.4 v fail-safe time time to detect fail-safe condition 2 m s cmrr receiver input common mode rejection ratio v cm = 2.6v, f = 26mhz 45 db c load receiver and driver output load capacitance (note 4) l 500 pf dc electrical characteristics switchi n g characteristics u the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v dd = 5v 5%, unless otherwise noted. (notes 2, 3) the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v dd = 5v, unless otherwise noted. (notes 2, 3)
4 ltc1685 typical perfor m a n ce characteristics uw frequency (hz) 10 42.0 common mode rejection ratio (db) 42.5 43.5 44.0 44.5 46.5 1685 g01 43.0 1k 100k 1m 45.0 45.5 46.0 t a = 25 c receiver input cmrr temperature ( c) ?0 25 supply current (ma) 53 54 55 50 100 1685 g03 52 51 50 025 75 56 57 59 58 both driver and receiver enabled and loaded 25mbps data rate data rate (mbps) 1 50 60 70 40 30 1685 g02 40 30 10 20 50 20 10 0 supply current (ma) both driver and receiver enabled and loaded t a = 25 c supply current vs data rate supply current vs temperature receiver propagation delay vs load capacitance receiver propagation delay vs common mode load capacitance (pf) 5 0 propagation delay (ns) 5 10 15 20 30 15 25 35 55 1685 g04 105 205 25 t a = 25 c receiver common mode (v) ? 0 propagation delay (ns) 5 15 20 25 ? 2 412 1685 g05 10 ? 0 6 8 10 t a = 25 c receiver propagation delay vs input overdrive receiver input overdrive (v) 0.3 0.5 0 receiver propagation delay (ns) 10 25 0.7 1.25 1.5 1685 g06 5 20 15 1.0 2.0 2.5 t a = 25 c note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: all currents into the device pins are positive; all currents out of the device pins are negative. note 3: all typicals are given for v dd = 5v, t a = 25 c. note 4: guaranteed by design, but not tested. note 5: short-circuit current does not represent output drive capability. when the output detects a short-circuit condition, output drive current is significantly reduced (from hundreds of ma to 20ma max) until the short is removed. switchi n g characteristics u
5 ltc1685 typical perfor m a n ce characteristics uw di (pin 4): driver input. controls the states of the a and b outputs only if de = high. if de = low, di will have no effect on a and b pins. do not float. gnd (pin 5): ground. a (pin 6): noninverting receiver input/driver output. b (pin 7): inverting receiver input/driver output. v dd (pin 8): positive supply, 5v to 5%. bypass with 0.1 m f ceramic capacitor. pi n fu n ctio n s uuu ro (pin 1): receiver output. if a 3 b by 300mv, then ro will be high. if a b by 300mv, then ro will be low. re (pin 2): receiver enable. re = low enables the receiver. re = high forces receiver output into high impedance state. do not float. de (pin 3): driver enable. de = high enables the driver. de = low will force the driver output into a high impedance state and the device will function as a line receiver if re is also low. do not float. driver propagation delay vs temperature driver propagation delay vs driver input voltage driver input voltage (v) 2.5 propagation delay (ns) 15 20 25 4.5 1685 g08 10 5 0 3.0 3.5 4.0 5.0 t lh v dd = 5v input threshold = 1.5v t a = 25 c t hl driver propagation delay vs capacitive load load capacitance (pf) 5 16.0 propagation delay (ns) 16.5 17.0 17.5 18.0 19.0 15 25 50 75 1685 g11 100 150 18.5 t a = 25 c receiver maximum data rate vs input overdrive receiver propagation delay vs temperature temperature ( c) 50 ?5 0 propagation delay (ns) 10 25 0 50 75 1680 g09 5 20 15 25 100 125 receiver input differential (v) 0.3 40 50 70 0.6 1.0 1685 g10 30 20 0.4 0.5 0.7 1.5 2.5 10 0 60 data rate (mbps) t a = 25 c temperature ( c) ?0 ?0 0 propagation delay (ns) 5 10 15 20 25 0 20 40 60 1685 g07 80 100
6 ltc1685 fu ctio tables u u transmitting inputs line outputs re de di condition b a x 1 1 no fault 0 1 x 1 0 no fault 1 0 x 0 x x hi-z hi-z x 1 x fault receiving inputs output re de a C b ro 00 3 300mv 1 00 C 300mv 0 0 0 inputs open 1 0 0 inputs shorted together 1 a = b = C 7v to 12v 1x x hi-z 10ma current source test circuits v od a b r r v oc 1685 f01 figure 1. driver dc test load receiver output c l 15pf 1k s1 s2 test point v dd 1k 1685 f02 figure 2. driver dc test load output under test c l s1 s2 v dd 500 w 1685 f04 figure 3. driver/receiver timing test circuit figure 4. driver timing test load #2 3v de a b di r diff c l1 c l2 ro 15pf a b re 1685 f03
7 ltc1685 switchi g ti e wavefor s uw w figure 5. driver propagation delays di 3v 1.5v t plh t r t skew 1/2 v o 90% 10% 0v b a v o ? o 0v 90% 1.5v t phl t skew 1/2 v o f = 1mhz, t r 3ns, t f 3ns 10% t f v diff = v(a) ?v(b) 1586 f05 v o figure 8. receiver enable and disable times figure 7. receiver propagation delays 2.5v t phl f = 1mhz, t r 3ns, t f 3ns ro ? od2 a ?b 0v 2.5v t plh output input v od2 v ol v oh 1686 f07 1.5v t zl 2.5v 2.5v t zh 1.5v t lz 0.5v 0.5v t hz f = 1mhz, t r 3ns, t f 3ns output normally low output normally high 3v 0v de 5v v ol v oh 0v a, b a, b 1686 f06 figure 6. driver enable and disable times 1.5v t zl 2.5v 2.5v t zh 1.5v t lz 0.5v 0.5v t hz f = 1mhz, t r 3ns, t f 3ns output normally low output normally high 3v 0v re 5v 0v ro ro 1685 f08
8 ltc1685 a b 1685 f09 3 22k 3.3v 3 22k 3.3v de = 0, re = 0 or 1 v dd = 5v v dd = 0v a b 3 22k 3 22k applicatio n s i n for m atio n wu u u theory of operation unlike typical cmos transceivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the ltc1685 employs a novel architecture that produces a tightly controlled and temperature compensated propaga- tion delay. the differential timing skew is also minimized between rising and falling output edges of the receiver output and the complementary driver outputs. the precision timing features of the ltc1685 reduce overall system timing constraints by providing a narrow 3.5ns window during which valid data appears at the receiver/driver output. the driver and receiver pair will have propagation delays that typically match to within 1ns. in clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. the ltc1685 can be used at data rates of 52mbps with less than 5% duty cycle distortion (depending on cable length). when a clock signal is used to retime parallel data, the maximum recom- mended data transmission rate is 26mbps to avoid timing errors due to clock distortion. fail-safe features the ltc1685 has a fail-safe feature that guarantees the receiver output to be in a logic high state when the inputs are either shorted or left open (note that when inputs are left open, large external leakage currents might override the fail-safe circuitry). in order to maintain good high frequency performance, it was necessary to slow down the transient response of the fail-safe feature. when a line fault is detected, the output will go high typically in 2 m s. note that the ltc1685 guarantees fail-safe performance over the entire (C 7v to 12v) common mode range! when the inputs are accidentally shorted (by cutting through a cable, for example), the short circuit fail-safe feature will guarantee a high output logic level. note also that if the line driver is removed and the termination resistors are left in place, the receiver will see this as a short and output a logic high. both of these fail-safe features will keep the receiver from outputting false data pulses under line fault conditions. thermal shutdown and short-circuit protection prevent latchup damage to the ltc1685 during fault conditions. figure 9. input thevenin equivalent equivale n t i n put n etworks uu u
9 ltc1685 output short-circuit protection the ltc1685 employs voltage sensing short-circuit pro- tection at the output terminals of both the driver and receiver. for a given input polarity, this circuitry deter- mines what the correct output level should be. if the output level is different from the expected, it shuts off the big output devices. for example, if the driver input is >2v, it expects the a output to be >3.25v and the b output to be <1.75v. if the a output is subsequently shorted to a voltage below v dd /2, this circuitry shuts off the big output devices and turns on a smaller device in its place (the converse applies for the b output). the outputs then appear as 10ma current sources. note that under normal operation, the output drivers can sink/source >50ma. a time-out period of about 50ns is used in order to maintain normal high frequency operation, even under heavy ca- pacitive loads. if the cable is shorted at a large distance from the device outputs, it is possible for the short to go unnoticed at the driver outputs due to parasitic cable resistance. addition- ally, when the cable is shorted, it no longer appears as an ideal transmission line, and the parasitic ls and cs might give rise to ringing and even oscillation. all these conditions disappear once the device comes out of short-circuit mode. for cables with the typical rs485 termination (no dc bias on the cable, such as figure 10), the ltc1685 will auto- matically come out of short-circuit mode once the physical short has been removed. with cable terminations with a dc bias (such as fast-20 and fast-40 differential scsi applicatio n s i n for m atio n wu u u terminators, see figure 15), the ltc1685 will not come out of short-circuit mode automatically upon release of the physical short. in order to resume normal operation, the de pin has to be pulsed low for at least 200ns. high speed twisted pair transmission data rates up to 52mbps can be transmitted over 100ft of category 5 twisted pair. figure 10 shows the ltc1685 receiving differential data from another ltc1685 trans- ceiver. figure 11a shows a 26mhz (52mbps) square wave propagated over 100ft of category 5 utp. figure 11b shows a more stringent case of propagating a single 20ns pulse over 100ft of category 5 utp. figure 12 shows a 4mbps square wave over 1000ft of category 5 unshielded twisted pair. 1685 f11 driver input receiver output 10ns/div 2v/div 2v/div figure 11a. 100ft of category 5 utp: 50mbps 1685 f11b receiver input driver input receiver output 20ns/div 2v/div 5v/div 2v/div cable delay figure 11b. 100ft of category 5 utp: 20ns pulse figure 10 100 w a 1 4 en ro 1685 f10b 1/4 ltc1518 ltc1685 ltc1685 12 3 2 b 7 6 3 2 de di ro re 4 1 100 w 7 6 3 2 de di ro re 4 1 en
10 ltc1685 applicatio n s i n for m atio n wu u u very inexpensive unshielded telephone grade twisted pair is shown in figure 13. in spite of the noticeable loss at the receiver input, the ltc1685 can still transfer 30mbps at 100ft of telephone grade utp. note that under all these conditions, the ltc1685 can pass through a single data pulse equal to the inverse of the data rate (e.g., 20ns for 50mbps data rate). even at distances of 4000ft, 1mbps data rates are possible using the ltc1685 and category 5 utp. figure 14a shows a 1 m s pulse propagated down 4000ft of category 5 utp. notice both the dc and the ac losses at the receiver input. the dc attenuation is due to the parasitic resistance of the cable. figure 14b shows a 1mbps square wave over 4000ft. to transmit at this speed but using longer cable lengths, see the ltc1686/ltc1687 high speed rs485 full-duplex transceivers. figure 13. 100ft of telephone grade utp: 30mbps figure 12. 1000ft of category 5 utp: 4mbps 1685 f13 driver input differential receiver input receiver output 20ns/div 2v/div 2v/div 2v/div 1685 f12 driver input receiver output 100ns/div 2v/div 2v/div figure 14b. 4000ft of category 5 utp: 1mbps square wave figure 14a. 4000ft of category 5 utp: 1 m s pulse high speed backplane transmission the ltc1685 can also be used in backplane point-to-point transceiver applications, where the user wants to assure operation even when the common mode goes above or below the rails. it is advisable to terminate the pc traces when approaching maximum speeds. since the ltc1685 is not intended to drive parallel terminated cables with characteristic impedances much less than that of twisted pair, both ends of the pc trace must be series terminated with the characteristic impedance of the trace. for best results, the signal should be routed differentially. the true and complement outputs of the ltc1685 should be routed on adjacent layers of the pc board. the two traces should be routed very symmetrically, minimizing and equalizing parasitics to nearby signal and power/ground layers. for single-ended transmission, route the series terminated 1685 f14a receiver input driver input receiver output 1 m s/div 1v/div 5v/div 2v/div cable delay 1685 f14b driver input receiver output 1 m s/div 5v/div 2v/div
11 ltc1685 applicatio n s i n for m atio n wu u u single-ended trace over an adjacent ground plane. then set the (bypassed) negative input of the receiver to roughly 2.5v. note that single-ended operation might not reach maximum speeds. high speed differential scsi (fast-20, fast-40 hvd) the ltc1685s high speed, tight propagation delay win- dow and matched driver/receiver propagation delays make it a natural choice as the external transceiver in high speed differential scsi applications. note that the 3.5ns propa- gation delay window covers the entire commercial tem- perature range. if, for example, a group of 16 transceivers is placed on the same board, their temperature difference will be much smaller. hence, the difference in their propa- gation delays should be even better than the 3.5ns specification (typically better than 2ns). the ltc1685 is the most efficient and reliable implementation that meets the fast-20 and fast-40 hvd driver and receiver skew specifications. power-up requirements the ltc1685 has unique short-circuit protection that shuts off the big output devices (and keeps them off) when a short is detected. when the ltc1685 is powered up with the driver outputs enabled (figure 15 shows a typical connection), the part will power up in short-circuit mode. after power-up, the user must hold the de pin of the ltc1685 low for at least 200ns in order to start normal operation. note also that turning the termination power on/off might induce the ltc1685 to see a short. conse- quently, the de pin should be held low for 200ns after cable termination power is turned on. this requirement is solely due to the cable termination (the 165 w parallel resistance to both power and ground). for applications whose connections to the cable are made exclusively with rs485 devices, the cable can be terminated only across the two signal wires (as in figure 10). with cable distances covering under 25 meters, the common mode range of the ltc1685 should be more than sufficient to account for any ground differences between any two communicating devices. the fact that transmission is differential should greatly improve noise term power 150 w 330 w 330 w 330 w 330 w a 1 4 en ro 1685 f15 1/4 ltc1518 ltc1685 ltc1685 12 3 2 b 7 6 3 2 de di ro re term power 122 w cable 4 1 150 w 7 6 3 2 de di ro re 4 1 en figure 15. fast-20, fast-40 differential scsi application information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. margin. furthermore, the good high frequency cmrr of the receiver will serve to reject any common mode interference. de, di inputs it is not necessary that the driver input (di) have 0v to 3v signal levels. the di input can be driven by cmos levels (0v to 5v) and still achieve 40mbps operation. however, duty cycle will be slightly compromised when driven by a cmos device. care should be taken to minimize the ringing on the di input in order to achieve a driver propagation delay within the 3.5ns window. this also improves the package-to-package matching of propaga- tion delays. the de pin should be held low for 200ns after the power- up sequence has been completed. after fault conditions such as an output short or thermal shutdown, the de pin should be held low for at least 200ns after the fault has been removed. this is usually necessary only if the driver outputs are connected to dc-biased cable terminations (as in figure 15). layout considerations a ground plane is recommended when using a high frequency device like the ltc1685. a 0.1 m f ceramic by- pass capacitor less than 1/4 inch away from the v dd pin is recommended. good bypassing is especially needed when operating at maximum frequency or when package-to- package matching is very important. the pc board traces connected to the a and b outputs must be kept as symmetrical and short as possible to obtain the same
12 ltc1685 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 1997 1685fa lt/lcg 0700 2k rev a ? printed in the usa part number description comments ltc1485 high speed rs485 transceiver 10mbps, pin compatible with ltc485 ltc1518/ltc1519 high speed quad rs485 receivers 52mbps, pin compatible with ltc488/ltc489 ltc1520 high speed quad differential receiver 52mbps, 100mv threshold, rail-to-rail common mode ltc1686/ltc1687 high speed rs485 driver/receiver 52mbps, pin compatible with ltc490/ltc491 ltc1688/ltc1689 high speed quad rs485 drivers 100mbps, pin compatible with ltc486/ltc487 related parts so8 0695 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** dimensions in inches (millimeters) unless otherwise noted. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) package descriptio n u applicatio n s i n for m atio n wu u u parasitic board capacitance. this maintains the good matching characteristics of the low-to-high and high-to- low transitions of the ltc1685. note that output a to output b capacitance should also be minimized. if routed adjacent to each other on the same layer, they should be separated by an amount at least as wide as the trace widths. if output a and output b are routed on different signal planes, they should not be routed directly on top of each other. a trace widths lateral separation is also recommended. as mentioned before, care should also be taken when routing the di input. to achieve consistent board-to- board propagation delay, the ringing on this signal should be kept below a few hundred millivolts.

▲Up To Search▲

Price & Availability of LTC1685IS8

	To Download LTC1685IS8 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .