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description avago technologies ammp-6530 is an image reject mixer that operates from 5 ghz to 30 ghz. the cold channel fet mixer is designed to be an easy-to-use component for any surface mount pcb application. it can be used drain pumped for low conversion loss ap - plications, or when gate pumped the mixer can provide high linearity for ssb up-conversion. an external 90- degree hybrid is used to achieve image rejection and a -1v voltage reference is needed. intended applica - tions include microwave radios, 802.16, vsat, and satellite receivers. since this one mixer can cover several bands, the ammp-6530 can reduce part inventory. the integrated mixer eliminates complex tuning and assembly processes typically required by hybrid (discrete-fet or diode) mixers. the package is fully smt compatible with backside grounding and i/o to simplify assembly. features ? 5x5 mm surface mount package ? broad band performance 5C 30 ghz ? low conversion loss of 8 db ? high image rejection of 15C20 db ? good 3rd order intercept of +18 dbm ? single -1v, no current supply bias applications ? microwave radio systems ? satellite vsat, dbs up/down link ? lmds & pt-pt mmw long haul ? broadband wireless access (including 802.16 and 802.20 wimax) ? wll and mmds loops top view package base: gnd pin function 1 if1 2 3 if2 4 lo/rf 5 6 vg 7 8 rf/lo ammp-6530 5C30 ghz image reject mixer data sheet absolute maximum ratings [1] symbol parameters/conditions units min. max. v g gate supply voltage v 0 -3 p in cw input power dbm 25 t ch operating channel temperature c +150 t stg storage case temperature c -65 +150 t max max. assembly temp (20 sec max) c +260 note: 1. operation in excess of any one of these conditions may result in permanent damage to this device. attention: observe precautions for handling electrostatic sensitive devices. esd machine model (class a) esd human body model (class 0) refer to avago application note a004r: electrostatic discharge damage and control. 8 4 7 1 2 3 6 5 d r a i n n c i f 1 n c i f 2 v g n c g a t e
2 ammp-6530 typical performance [2, 3] (t a = 25c, v g = -1v, if frequency = 1 ghz, z o =50 ) symbol parameters and test conditions units gate pumped drain pumped f rf ff frequency range ghz 5 C 30 5 C 30 f lo lo frequency range ghz 5 C 30 5 C 30 f if if frequency range ghz dc C 5 dc C 5 down conversion up conversion down conversion p lo lo port pumping power dbm >10 >0 >10 cg rf to if conversion gain db -10 -15 -8 rl_rf rf port return loss db 5 5 10 rl_lo lo port return loss db 10 10 5 rl_if if port return loss db 10 10 10 ir image rejection ratio db 15 15 15 lo-rf iso. lo to rf port isolation db 22 25 22 lo-if iso. lo to if port isolation db 25 25 25 rf-if iso. rf to if port isolation db 15 15 15 iip3 input ip3, fdelta=100 mhz, dbm 18 10 prf = -10 dbm, plo = 10 dbm p-1 input port power at 1db gain dbm 8 0 compression point, plo=+10 dbm nf noise figure db 10 12 notes: 2. small/large signal data measured in a fully de-embedded test fxture form t a = 25c. 3. specifcations are derived from measurements in a 50 test environment. ammp-6530 dc specifcations/physical properties [1] symbol parameters and test conditions units min. typ. max. i g gate supply current ma 0 (under any rf power drive and temperature) v g gate supply operating voltage v -1v t mins min. ambient operating temp. c -55 t maxs max. ambient operating temp. c +125 note: 1. ambient operational temperature t a =25c unless otherwise noted. ammp-6530 rf specifcations in drain pumped test confguration [4, 5, 6] (t a = 25c, v g = -1.0v, p lo +10 dbm, z o =50 ) symbol parameters and test conditions units min typ. max cg conversion gain [7] db -12.5 -8 ir image rejection ratio db 20 notes: 4. pre-assembly into package performance verifed 100% on-wafer. 5. this fnal package part performance is verifed by a functional test correlated to actual performance. 6. the external 90 degree hybrid coupler is from m/a-com: pn 2032-6344-00. frequency 1.0C 2.0 ghz. 7. 100% on-package test is done at rf frequency = 21 ghz, lo frequency = 23 ghz (if frequency = 2 ghz)
3 ammp-6530 typical performance under gate pumped down conversion operation (t a = 25c, v g = -1v, z o = 50) figure 1. conversion gain with if terminated for high side conversion lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb(db ) lsb(db ) figure 2. conversion gain with if terminated for low side conversion lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb(db ) lsb(db) figure 3. rf port input power p-1db . lo=+10 dbm, if=1 ghz. frequency (ghz) input power (db) 15 10 5 0 -5 5 3 0 15 10 20 25 figure 4. noise figure. lo=+7 dbm, if=1 ghz. frequency (ghz) noise figure (db) 20 15 10 5 0 5 3 0 15 10 20 25 figure 5. input 3rd order intercept point. if=1 ghz. frequency (ghz) iip3 (dbm) 25 20 15 10 5 5 3 0 15 10 20 25 plo=15(dbm ) plo=10(dbm ) figure 6. conversion gain vs. lo power. rf=21 ghz (-20 dbm), lo=20 ghz. lo power (dbm) conversion gain (db) 0 -5 -10 -15 -20 -25 -10 20 0 -5 5 10 15 8 4 7 1 2 3 6 5 d r a i n r f l o l s b u s b n o t e : t h e e x t e r n a l 9 0 h y b r i d c o u p l e r i s f r o m m / a - c o m : p n 2 0 3 2 - 6 3 4 4 - 0 0 . f r e q u e n c y i s 1 . 0 ? 2 . 0 g h z . - 1 v n c i f 1 n c i f 2 v g n c g a t e
4 ammp-6530 typical performance under gate pumped down conversion operation (t a = 25c, v g = -1v, z o =50 ) figure 7. conversion gain and match vs. if frequency. rf=20 ghz, lo=10 dbm. frequency (ghz) conversion gain (db), return loss (db) 0 -5 -10 -15 -20 0 6 2 1 3 5 4 conv. gain (db) return loss (db) figure 8. conversion gain vs. gate voltage. rf=20 ghz, lo=10 dbm. vg (v) conversion gain (db) 0 -5 -10 -15 -20 -2 -0.5 -1.5 -1 figure 9. rf & lo return loss. lo=10 dbm. frequency (ghz) return loss (db) 0 -5 -10 -15 -20 0 3 0 15 10 5 20 25 rf lo figure 10. isolation. lo=+10 dbm, if=1 ghz. frequency (ghz) isolation (db) 60 50 40 30 20 10 0 5 3 0 15 10 20 25 rf-if lo-if lo-rf
5 figure 11. up-conversion gain with if terminated for low side conversion. lo=+5 dbm, if=+5 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb (db) lsb (db) figure 12. up-conversion gain wth if terminated for high side conversion. lo=+5 dbm, if=+5 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb (db) lsb (db) figure 13. lo-rf up-conversion isolation. frequency (ghz) isolation (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 5 3 0 15 10 20 25 figure 14. up-conversion gain vs. pumping power. lo power=if power, if=1 ghz, rf=25 ghz. plo=pif (db) conversion loss (db) -5 -7 -9 -11 -13 -15 0 2 0 6 4 8 12 16 18 2 10 14 ammp-6530 typical performance under gate pumped up conversion operation (t a = 25c, v g = -1v, z o =50 ) 4 8 3 5 6 7 2 1 g a t e r f l o l s b u s b - 1 v n c i f 2 n c i f 1 v g n c d r a i n
6 ammp-6530 typical performance under drain pumped down conversion operation (t a = 25c, v g = -1v, z o = 50 ) figure 15. conversion gain with if terminated for low side conversion. lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb (db) lsb (db) figure 16. conversion gain with if terminated for high side conversion. lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 5 3 0 15 10 20 25 usb(dbm) lsb(dbm) figure 17. rf port input power p-1db. lo=+10 dbm, if=1 ghz. frequency (ghz) input power (dbm) 15 10 5 0 -5 5 3 0 15 10 20 25 figure 18. noise figure. lo=+7 dbm, if=1 ghz. frequency (ghz) noise figure (db) 20 15 10 5 0 5 3 0 15 10 20 25 figure 19. input 3rd order intercept point. if=1 ghz. flo (db) iip3 (dbm) 25 20 15 10 5 0 5 3 0 15 10 20 25 plo=10(dbm) plo=15(dbm) figure 20. conversion gain vs. lo power. rf=21 ghz (-20 dbm), lo=20 ghz. lo power (dbm ) conversion gain (db) 0 -5 -10 -15 -20 -25 -10 20 0 -5 5 10 15 8 4 7 1 2 3 6 5 d r a i n u s b l s b n o t e : t h e e x t e r n a l 9 0 h y b r i d c o u p l e r i s f r o m m / a - c o m : p n 2 0 3 2 - 6 3 4 4 - 0 0 . f r e q u e n c y i s 1 . 0 ? 2 . 0 g h z . - 1 v n c i f 1 n c i f 2 v g n c g a t e r f l o
7 figure 21. simplifed mmic schematic. figure 22. demonstration board (available upon request). gnd vg if1 if2 rf/lo lo/rf biasing and operation the recommended dc bias condition for optimum performance, and reliability is vg = -1 volts. there is no current consumption for the gate biasing because the fet mixer was designed for passive operation. for down conversion, the ammp - 6530 may be confgured in a low loss or high linearity application. in a low loss confgura - tion, the lo is applied through the drain (pin8, power divider side). in this confguration, the ammp-6530 is a drain pumped mixer. for higher linearity applications, the lo is applied through the gate (pin4, lange coupler side). in this confguration, the ammp-6530 is a gate pumped mixer (or resistive mixer). the mixer is also suitable for up-conversion applications under the gate pumped mixer operation shown on page 3. please note that the image rejection and isolation performance is dependent on the selection of the low frequency quadrature hybrid. the performance specifcation of the low frequency quadrature hybrid as well as the phase balance and vswr of the interface to the ammp-6530 will afect the overall mixer perfor - mance. 8 4 7 1 2 3 6 5 d r a i n n c i f 1 n c i f 2 v g n c g a t e
8 figure 23. outline drawing. d i m e n s i o n a l t o l e r a n c e f o r b a c k v i e w : 0 . 0 0 2 " [ 0 . 0 5 m m ] 1 2 3 7 6 5 3 2 1 5 6 7 a a m m p x x x x y w w d n n a 8 4 b 0 . 1 1 4 [ 2 . 9 ] 0 . 0 1 4 [ 0 . 3 6 5 ] 0 . 0 1 6 [ 0 . 4 0 ] 0 . 0 1 2 [ 0 . 3 0 ] 0 . 0 2 8 [ 0 . 7 0 ] 0 . 0 9 3 [ 2 . 3 6 ] 0 . 0 1 6 [ 0 . 4 0 ] 0 . 1 0 0 [ 2 . 5 4 ] 0 . 0 1 1 [ 0 . 2 8 ] 0 . 0 1 8 [ 0 . 4 6 ] 0 . 1 2 6 [ 3 . 2 ] 0 . 0 5 9 [ 1 . 5 ] 0 . 1 0 0 [ 2 . 5 4 ] 0 . 0 2 9 [ 0 . 7 5 ] 4 8 f r o n t v i e w s y m b o l a b m i n 0 . 1 9 8 ( 5 . 0 3 ) 0 . 0 6 8 5 ( 1 . 7 4 ) m a x 0 . 2 1 3 ( 5 . 4 ) 0 . 0 8 8 ( 2 . 2 5 ) s i d e v i e w b a c k v i e w n o t e s : 1 . * i n d i c a t e s p i n 1 2 . d i m e n s i o n s a r e i n i n c h e s [ m i l l i m e t e r s ] 3 . a l l g r o u n d s m u s t b e s o l d e r e d t o p c b r f g r o u n d
9 recommended smt attachment for 5x5 package figure 24a. suggested pcb land pattern and stencil layout figure 24b. stencil outline drawing (mm) figure 24c. combined pcb and stencil layouts recommended smt attachment the ammp packaged devices are compatible with high volume surface mount pcb assembly processes. the pcb material and mounting pattern, as defned in the data sheet, optimizes rf performance and is strongly recommended. an electronic drawing of the land pattern is available upon request from avago sales & application engineering. stencil design guidelines a properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the pcb pads. the recommended stencil layout is shown in figure 24b. the stencil has a solder paste de - position opening approximately 70% to 90% of the pcb pad. reducing stencil opening can potentially generate more voids underneath. on the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the i/o pads. considering the fact that solder paste thickness will directly afect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127 mm (5 mils) thick stainless steel which is capable of producing the required fne stencil outline. the combined pcb and stencil layout is shown in figure 24c.
10 figure 25. suggested lead-free refow profle for snagcu solder paste. 0 50 100 150 200 250 300 0 5 0 100 150 200 250 300 seconds te mp ( c) ramp 1 preheat ramp 2 reflow cooling peak = 250 5 c melting point = 218 c manual assembly 1. follow esd precautions while handling packages. 2. handling should be along the edges with tweezers. 3. recommended attachment is conductive solder paste. please see recommended solder refow profle. con - ductive epoxy is not recommended. hand soldering is not recommended. 4. apply solder paste using a stencil printer or dot placement. the volume of solder paste will be de- pendent on pcb and component layout and should be controlled to ensure consistent mechanical and electri - cal performance. 5. follow solder paste and vendors recommendations when developing a solder refow profle. a standard profle will have a steady ramp up from room tempera - ture to the pre-heat temperature to avoid damage due to thermal shock. 6. packages have been qualifed to withstand a peak temperature of 260c for 20 seconds. verify that the profle will not expose device beyond these limits. solder refow profle the most commonly used solder refow method is accom - plished in a belt furnace using convection heat transfer. the suggested reflow profile for automated reflow processes is shown in figure 25. this profle is designed to ensure reliable fnished joints. however, the profle indicated in figure 25 will vary among diferent solder pastes from diferent manufacturers and is shown here for reference only.
part number ordering information devices part number per container container ammp-6530-blk 10 antistatic bag AMMP-6530-TR1 100 7 reel ammp-6530-tr2 500 7 reel device orientation (top view) carrier tape and pocket dimensions for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies. all rights reserved. obsoletes av01-0409en av02-0502en - october 13, 2008

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