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integrated circuit systems, inc. av9154a 0174c?04/06/06 low-cost 16-pin frequency generator the av9154a is a 0.8mm version of the industry leading av9154. like the av9154, the av9154a is a low-cost frequency generator designed for general purpose pc and disk drive applications. however, because the av9154a uses 0.8mm technology and the latest phase-locked loop architecture, it offers performance advantages that enable the device to be sold into penti um? systems. the av9154a guarantees a 45/55 duty cycle over all frequencies. in addition, a worst case jitter of 250ps is specified at pentium frequencies. the cpu clock offers the unique feature of smooth, glitch- free transitions from one frequency to the next, making this the ideal device to use when slowing the cpu speed. the av9154a makes a gradual transition between frequencies so that it obeys the intel cycle-to-cycle timing specifications for 486 and pentium systems. the av9154a -42 and av9154a -43 devices offer features specifically for green pcs. the av9154a -42 and -43 have a single pin that, when pulled low, will smoothly slow the 2xcpu clock to 8 mhz. this is ideal for dynamic dx microprocessors. the av9154a -43 not only has the slow clock feature, but also offers a glitch-free stop clock for static sx microprocessors. the stopclk# pin, when pulled low, enables the 2xcpu clock to go low only after completing its last full cycle. the clock continues to run internally, and will be output again on the first full cycle immediately following stop clock disable. the simultaneous 2x and 1x cpu clocks offer controlled skew to within 500ps of each other (-42 only). ics has been shipping motherboard frequency generators since april 1990, and is the leader in the area of multiple output clocks on a single chip. consult ics for all your clock generation needs. compatible with 386, 486 and pentium cpus 45/55 duty cycle runs up to 66 mhz at 3.3v single pin can slow clock to 8 mhz (on -42 and -43) single pin can stop the cpu clock glitch-free (on -43) very low jitter, 250ps for pentium frequencies 1x and 2x cpu clocks skew controlled to 250ps (-42 only) smooth transitions between all cpu frequencies slow frequency ramp at power-on avoids cpu lock-up 16-pin pdip or 150-mil skinny soic packages 0.8 m cmos technology applications computer motherboards: the av9154a-st replaces crystals and oscillators, saving board space, component cost, part count and inventory costs. it produces a switchable cpu clock and up to four fixed clocks to drive floppy disk, communications, super i/o, bus, and/or keyboard devices. the small package and 3.3v operation is perfect for handheld computers. features general description block diagram
2 integrated circuit systems, inc. av9154a 0174c?04/06/06 pin configuration 16-pin pdip or soic av9154a-27 16-pin pdip or soic av9154a-42 16-pin pdip or soic av9154a-43 description of new pin: slowclk# forces 2xcpuclk output to ramp smoothly to 8mhz and cpuclk output to 4 mhz when pulled low. description of new pis: slowclk# forces 2xcpuclk output to ramp smoothly to 8mhz when pulled low. stopclk# provides gilitch-free stop of the 2xcpuclk output when pulled low. when raised back high, the 2xcpuclk output clock resumes full speed operation (no clock frequency ramp up since the internal vco is not stopped). 16-pin pdip or soic av9154a-04 16-pin pdip or soic av9154a-26 16-pin pdip or soic av9154a-10
3 integrated circuit systems, inc. av9154a 0174c?04/06/06 stop clock feature the ics9154a -43 incorporates a unique stop clock feature compatible with static logic processors. when the stop clock pin goes low, the 2xcpuclk will go low after the next occurring falling edge. when stopclk again goes high, 2xcpuclk resumes on the next rising edge of the internal clock. this feature enables fast, glitch-free starts and stops of the 2xcpuclk and is guaranteed that the cpu does not receive any short period clocks. 2xcpuclk stopclk#
4 integrated circuit systems, inc. av9154a 0174c?04/06/06 pin descriptions frequencies based upon 14.318 mhz input) note: internal pull-up resistors. * -04 and -10 have no pull-ups or frequency select pins ** -10 has no pull-up or pin 9 pdfclk -4 -10 -26 -27 -42 -43 444444 vdd pdigital power (3.3 or 5v). 13 13 13 13 13 13 vdd p digital power (3.3 or 5v). 555555 gnd pdigital ground. 12 12 12 12 12 12 gdd p digital ground. 888888 agnd panalog ground. 1161161 1 fs0 i frequency select 0 for cpu clock (has internal pull-up).* 16 15 16 15 16 16 fs1 i frequency select 1 for cpu clock (has internal pull-up).* 10 - 10 10 9 10 fs2 i frequency select 2 for cpu clock (has internal pull-up).* - - 9 9 - - oe i tristates outputs when low (has internal pull-up).* ----1515slowclk#i slows 2xcpu clock to 8 mhz (active low) (has internal pull-up). -----9stopclk#i stops 2xcpu clock glitch-free (active low) (has internal pull-up). 333333 x1 icrystal in. 222222 x2 ocrystal out. 11 10 11 11 10 11 14.318 mhz o 14.318 mhz reference clock output. - 7 1 - - 1.84 mhz o 1.84 mhz (comm) clock output. 6116666 24 mhz o24 mhz (floppy disk) clock output. - 6 - - - - 16 mhz o 16 mhz clock output. - - 7 7 - - 12 mhz o 12 mhz keyboard clock output. 7 1 - - 7 7 8 mhz o 8 mhz keyboard clock output. 14 14 14 - 11 - cpuclk o cpu clock output. 15 - 15 14 14 14 2xcpuclk o 2x cpu clock output. 9----- pd# ipower-down all (active low) (has internal pull-up). - 9 - - - - pdfclk# i power-down fixed clock (1.84, 8, 16, 24) (active low).* pin number pin name type description
5 integrated circuit systems, inc. av9154a 0174c?04/06/06 fixed cloxk output actual frequencies (using 14.318 mhz input, all frequencies in mhz) 14.318 1.84 24.0 12.0 8.0 -10 2xcpu cpu cpuclk 0 100* 50* pdcpu 180*40*40 2 66.6 33.3 50 3502566.6 44020 - 53216 - 62412 - 7168 - - clock tables in mhz for -04 and -10 (using 14.318 mhz input, all frequencies in mhz) -04 fs(3:0) fs(2:0) 2xcpu (mhz) cpuclk (mhz) 0 100.23* 50.11 1 80.18* 40.09 2 66.48* 33.24 3 50.11 25.06 4 40.09 20.05 5 32.22 16.11 6 24.23 12.12 7 15.75 7.88 clock table for av9154a-26 (using 14.318 mhz input, all frequencies in mhz) -43 2xcpuclk 2xcpuclk cpuclk ^ 0 0 0 75* 16 8 16 0 0 1 32 40 20 40 0 1 0 60 33.33 16.67 33.33 0 1 1 40 25 12.5 25 1 0 0 50 60 30 60 1 0 1 66.66 20 10 20 1 1 0 80* 66.66 33.33 66.66 1 1 1 52 50 25 50 -43 2xcpuclk cpuclk 2xcpuclk 0 0 0 75.17* 16.00 8.00 16.00 0 0 1 31.94 40.09 20.05 40.09 0 1 0 60.14 33.41 16.71 33.41 0 1 1 40.09 25.06 12.55 25.06 1 0 0 50.11 60.14 30.07 60.14 1 0 1 66.48 20.05 10.03 20.05 1 1 0 80.18* 66.48 33.24 66.48 1 1 1 51.90 50.11 25.06 50.11 actual frequencies (using 14.318 mhz input, all frequencies in mhz) fs2 fs1 fs0 -27 2xcpuclk -42 -42 clock tables (using 14.318 mhz input, all frequencies in mhz) fs2 fs1 fs0 -27 2xcpuclk
6 integrated circuit systems, inc. av9154a 0174c?04/06/06 absolute maximum ratings v dd referenced to gnd .......................................................................... 7.0 v voltage on i/o pins referenced to gnd . . . . . . . gnd - 0.5 v to vdd + 0.5 v operating temperature under bias . . . . . . . . . . 0 to +70 oc power dissipation . . . . . . . . . . . . . . . . . . . . . . . . 0.5 w storage temperature . . . . . . . . . . . . . . . . . . . . . -40 to +150 oc stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stess specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. v dd = 3.3 v 10%, t a = 0 - 70 o c unless otherwise stated electrical characteristics at 3.3 v notes: 1. parameter is guaranteed by design and characterization. parameter symbol test conditions min typ max units input low voltage vil - - 0.2 vdd v input high voltage vih 0.7 v - - v input low current iil vin = 0v (pull-up pin) - 2.5 7 a input high current iih vin = vdd -5 - 5 a output low voltage vol iol = 6ma - 0.05 vdd 0.1 vdd v output high voltage1 voh ioh = -4ma 0.85 vdd 0.94 vdd - v output low current1 iol vol = 0.2vdd 15 24 - ma output high current1 ioh voh = 0.7vdd - -13 -8 ma supply current idd unloaded, 60 mhz - 16 34 ma output frequency change over supply and temperature1 fd with respect to typical frequency - 0.002 0.01 % short circuit current1 isc each output clock 20 30 - ma input capacitance1 ci except x1, x2 - - 10 pf load capacitance1 cl pins x1, x2 - 20 - pf pull-up resistor1 rpu at vdd - 0.5v - 620 900 k ohm dc characteristics
7 integrated circuit systems, inc. av9154a 0174c?04/06/06 electrical characteristics at 3.3 v v dd = 3.3 v 10%, t a = 0 - 70 o c unless otherwise stated notes: 1. parameter is guaranteed by design and characterization. not subject to production testing. s c i t s i r e t c a r a h c c a r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e s i r k c o l c t u p n i e m i t 1 t r c i --0 2s n l l a f k c o l c t u p n i e m i t 1 t f c i --0 2s n o t % 0 2 , e m i t e s i r v % 0 8 d d 1 t r d a o l f p 5 1-2 . 25 . 3s n o t % 0 8 , e m i t l l a f v % 0 2 d d 1 t f d a o l f p 5 1-2 . 15 . 2s n % 0 5 t a e l c y c y t u d v d d 1 d t d a o l f p 5 10 6 / 0 42 5 / 8 40 4 / 0 6% e c n e r e f e r , e l c y c y t u d s k c o l c 1 d t d a o l f p 5 15 6 / 0 57 5 / 3 40 5 / 5 6% - 0 2 , a m g i s e n o , r e t t i j s k c o l c z h m 6 6 1 t s 1 j s e l c y c 0 0 0 , 0 1-0 0 10 0 2s p , a m g i s e n o , r e t t i j 0 2 w o l e b s k c o l c z h m 1 t s l j s e l c y c 0 0 0 , 0 1-0 . 10 . 2% 6 6 - 0 2 , e t u l o s b a , r e t t i j s k c o l c z h m 1 t b a j s e l c y c 0 0 0 , 0 10 5 3 --0 5 3s p , e t u l o s b a , r e t t i j 0 2 w o l e b s k c o l c z h m 1 t b a j s e l c y c 0 0 0 , 0 1-5 . 10 . 4% y c n e u q e r f t u p n i 1 f n i 28 1 3 . 4 12 3z h m t u p t u o m u m i x a m y c n e u q e r f 1 f t u o 0 7-- z h m n e e w t e b w e k s k c o l c u p c x 2 d n a u p c s t u p t u o 1 t k s 2 4 - a 4 5 1 9 v a-0 2 20 0 5s p e m i t p u - r e w o p 1 t o p t z h m 0 5 o t f f o-62 1s m n o i t i s n a r t y c n e u q e r f e m i t 1 t t f z h m 0 5 o t 8 m o r f-5 . 40 1s m
8 integrated circuit systems, inc. av9154a 0174c?04/06/06 s c i t s i r e t c a r a h c c d r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e g a t l o v w o l t u p n iv l i v d d v 5 =--8 . 0v e g a t l o v h g i h t u p n iv h i v d d v 5 =0 . 2--v t n e r r u c w o l t u p n ii l i v n i ) n i p p u - l l u p ( v 0 =-65 1a t n e r r u c h g i h t u p n ii h i v n i v = d d 5 --5a e g a t l o v w o l t u p t u ov l o i l o a m 0 1 =-5 1 . 04 . 0v e g a t l o v h g i h t u p t u o 1 v h o i h o a m 0 3 - =4 . 27 . 3-v t n e r r u c w o l t u p t u o 1 i l o v l o v 8 . 0 =5 25 4- a m t n e r r u c h g i h t u p t u o 1 i h o v h o v 4 . 2 =-3 5 -5 3 -a m t n e r r u c y l p p u si d d z h m 6 6 , d e d a o l n u-5 20 5a m y c n e u q e r f t u p t u o y l p p u s r e v o e g n a h c e r u t a r e p m e t d n a 1 f d o t t c e p s e r h t i w y c n e u q e r f l a c i p y t -2 0 0 . 01 0 . 0% t n e r r u c t i u c r i c t r o h s 1 i c s k c o l c t u p t u o h c a e5 20 4- a m e c n a t i c a p a c t u p n i 1 c i 2 x , 1 x t p e c x e--0 1f p e c n a t i c a p a c d a o l 1 c l 2 x , 1 x s n i p-0 2-f p r o t s i s e r p u - l l u p 1 r u p v + a d d v 1 --0 0 40 0 7m h o k electrical characteristics at 5.0 v notes: 1. parameter is guaranteed by design and characterization. not subject to production testing. v dd = +5 10% v, t a = 0 - 70 o c unless otherwise stated
9 integrated circuit systems, inc. av9154a 0174c?04/06/06 electrical characteristics at 5.0 v v dd = +5 10% v, t a = 0 - 70 o c unless otherwise stated s c i t s i r e t c a r a h c c a r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e s i r k c o l c t u p n i e m i t 1 t r c i --0 2s n l l a f k c o l c t u p n i e m i t 1 t f c i --0 2s n 8 . 0 , e m i t e s i r t u p t u o v 0 . 2 o t 1 t r d a o l f p 5 1-5 . 12s n o t % 0 2 , e m i t e s i r v % 0 8 1 t r d a o l f p 5 1-0 . 23s n 0 . 2 , e m i t l l a f t u p t u o v 8 . 0 o t 1 t f d a o l f p 5 1-5 . 05 . 1s n o t % 0 8 , e m i t l l a f v % 0 2 1 t f d a o l f p 5 1-0 . 20 . 3s n v 4 . 1 t a e l c y c y t u d 1 d t v , d a o l f p 5 1 d d = % 5 v 5 5 5 / 5 42 5 / 8 45 4 / 5 5% e c n e r e f e r , e l c y c y t u d s k c o l c 1 d t d a o l f p 5 15 6 / 0 47 5 / 3 40 4 / 5 6% 0 2 , a m g i s e n o , r e t t i j s k c o l c z h m 0 8 - z h m 1 t s 1 j s e l c y c 0 0 0 , 0 1-0 70 4 1s p , a m g i s e n o , r e t t i j 0 2 w o l e b s k c o l c z h m 1 t s l j s e l c y c 0 0 0 , 0 1-8 . 00 . 2% 0 2 , e t u l o s b a , r e t t i j s k c o l c z h m 0 8 - z h m 1 t b a j s e l c y c 0 0 0 , 0 10 5 2 --0 5 2s p , e t u l o s b a , r e t t i j 0 2 w o l e b s k c o l c z h m 1 t b a j s e l c y c 0 0 0 , 0 1-0 . 10 . 3% y c n e u q e r f t u p n if n i 28 1 3 . 4 12 3z h m t u p t u o m u m i x a m y c n e u q e r f 1 f t u o 0 4 1--z h m n e e w t e b w e k s k c o l c u p c x 2 d n a u p c s t u p t u o 1 t k s 2 4 - a 4 5 1 9 v a-0 4 10 0 4s p e m i t p u - r e w o p 1 t o p t z h m 0 8 o t-85 1s m n o i t i s n a r t y c n e u q e r f e m i t 1 t t f z h m 6 6 . 6 6 o t 8 m o r f-5 . 62 1s m notes: 1. parameter is guaranteed by design and characterization. not subject to production testing.
10 integrated circuit systems, inc. av9154a 0174c?04/06/06 0.765 0.130 0.060 0.018 0.100 0.130 0 ~ 5o 0.010 0.260 0.360 0.015min 0.325 16-pin pdip package 0.390 0.031 0.024 0.016 0.050 0.063 0.0060.004 0.238 0.154 0.008 0.015 0.025 16-pin soic package ordering information av9154a-27cn16 av9154a-42cn16 av9154a-43cn16 av9154a-04cn16 av9154a-10cn16 AV9154A-26CN16 av9154a-27cs16 av9154a-42cs16 av9154a-43cs16 av9154a-04cs16 av9154a-10cs16 av9154a-26cs16 example: lead free, rohs compliant (optional) lead count & package width lead count=1, 2 or 3 digits w=0.3" soic or 0.6" dip; none=standard width package type n = dip (plastic) s = soic pattern number (2 or 3 digit number for parts with rom-code patterns) device type prefix ics = standard device ics xxxx ppp m x#w lf
11 integrated circuit systems, inc. av9154a 0174c?04/06/06 revision history rev. issue date description page # c 4/6/2006 added lf orderin g information 10

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