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tc55nem208afpv/aftv55,70 2004-10-14 1/11 toshiba mos digital integrat ed circuit silicon gate cmos 524,288-word by 8-bit static ram description the tc55nem208afpv/aftv is a 4,194,304-bit static random access memory (sram) organized as 524,288 words by 8 bits. fabricated using toshiba's cmos silicon gate process technology, this device operates from a single 2.7 to 5.5 v power supply. advanced circuit tec hnology provides both high speed and low power at an operating current of 3 ma/mhz (typ) and a minimum cycle ti me of 55 ns. it is automatically placed in low-power mode at 1.8 a standby current (typ) when chip enable ( ce ) is asserted high. there are two control inputs. ce is used to select the device and for data retention control, and output enable ( oe ) provides fast memory access. this device is well suited to various microprocessor system applications where high speed, low power and battery backup are required. and, with a guaranteed operating range of ? 40 to 85c, the tc55nem208afpv/aftv can be used in environments exhibiting extreme temperature conditions. the tc55nem208afpv/aftv is available in a standard plastic 32-pin small-outline package (sop) and plastic 32-pin thin-small-outline package (tsop). features ? low-power dissipation operating: 15 mw/mhz (typical) ? single power supply voltage of 2.7 to 5.5 v ? power down features using ce . ? data retention supply voltage of 2.0 to 5.5 v ? direct ttl compatibility for all inputs and outputs ? wide operating temperature range of ? 40 to 85c ? standby current (maximum):20 a pin assignment (top view) pin names 32 pin sop & tsop a0~a18 address inputs r/w read/write control oe output enable ce chip enable i/o1~i/o8 data inputs/outputs v dd power gnd ground ? access times (maximum): 5 v 10% 2.7 v~5.5 v 55 70 55 70 access time 55 ns 70 ns 85 ns 100 ns ce access time 55 ns 70 ns 85 ns 100 ns oe access time 30 ns 35 ns 60 ns 70 ns ? package: sop32-p-525-1.27 (afpv) (weight:1.12 g typ) tsop ii32-p-400-1.27 (aftv) (weight:0.52 g typ) 1 32 2 31 3 30 4 29 5 28 6 27 7 26 8 25 9 24 10 23 11 22 12 21 13 20 14 19 15 18 16 17 v dd a 15 a 17 r/w a 13 a 8 a 9 a 11 a 10 i/o8 i/o7 i/o6 i/o5 i/o4 a18 a16 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 gnd ce oe (afpv/aftv)
tc55nem208afpv/aftv55,70 2004-10-14 2/11 block diagram operating mode mode ce oe r/w i/o1~i/o8 power read l l h output i ddo write l * l input i ddo output deselect l h h high-z i ddo standby h * * high-z i dds * = don't care h = logic high l = logic low maximum ratings symbol rating value unit v dd power supply voltage ? 0.3~7.0 v v in input voltage ? 0.3 * ~7.0 v v i/o input/output voltage ? 0.5~v dd + 0.5 v p d power dissipation 0.6 w t solder soldering temperature (10s) 260 c t stg storage temperature ? 55~150 c t opr operating temperature ? 40~85 c * : ? 2.0 v when measured at a pulse width of 20ns column address buffer a5 i/o1 memory cell array 2,048 256 8 (4,194,304) column address decoder column adderss register sense amp ce a6 a7 a8 a9 a14 a11 a15 a16 ce v dd gnd ce r/w oe a4 ce a18 a2 a0 a1 a17 a3 a10a12a13 row address decoder row address buffer row address register i/o2 i/o3 i/o4 i/o5 i/o6 i/o7 i/o8 data control clock generator 8
tc55nem208afpv/aftv55,70 2004-10-14 3/11 dc recommended operating conditions (ta = ? 40 to 85c) 5 v 10% 2.7 v~5.5 v symbol parameter min typ max min typ max unit v dd power supply voltage 4.5 5.0 5.5 2.7 5.0 5.5 v v ih input high voltage 2.4 ? v dd + 0.3 v dd ? 0.2 ? v dd + 0.3 v v il input low voltage ? 0.3 * ? 0.6 ? 0.3 * ? 0.2 v v dh data retention supply voltage 2.0 ? 5.5 2.0 ? 5.5 v *: ? 2.0v when measured at a pulse width of 20 ns dc characteristics (ta = ? 40 to 85c, v dd = 5 v 10%) symbol parameter test condition min typ max unit i il input leakage current v in = 0 v~v dd ? ? 1.0 a i oh output high current v oh = 2.4 v ? 1.0 ? ? ma i ol output low current v ol = 0.4 v 2.1 ? ? ma i lo output leakage current ce = v ih or r/w = v il or oe = v ih , v out = 0 v~v dd ? ? 1.0 a min ? ? 35 l ddo1 ce = v il and r/w = v ih , i out = 0 ma, other input = v ih /v il 1 s ? 8 ? ma min ? ? 30 l ddo2 operating current ce = 0.2 v and r/w = v dd ? 0.2 v, i out = 0 ma, other input = v dd ? 0.2 v/0.2 v t cycle 1 s ? 3 ? ma i dds1 ce = v ih ? ? 3 ma ta = 25c ? 1.8 ? ta = ? 40~40c ? ? 3 i dds2 standby current ce = v dd ? 0.2 v, v dd = 2.0 v~5.5 v ta = ? 40~85c ? ? 20 a dc characteristics (ta = ? 40 to 85c, v dd = 3 v 10%) symbol parameter test condition min typ max unit i il input leakage current v in = 0 v~v dd ? ? 1.0 a i oh output high current v oh = v dd ? 0.2 v ? 0.1 ? ? ma i ol output low current v ol = 0.2 v 0.1 ? ? ma i lo output leakage current ce = v ih or r/w = v il or oe = v ih , v out = 0 v~v dd ? ? 1.0 a min ? ? 30 i ddo2 operating current ce = 0.2 v and r/w = v dd ? 0.2 v, i out = 0 ma, other input = v dd ? 0.2 v/0.2 v t cycle 1 s ? 3 ? ma ta = 25c ? 1.6 ? ta = ? 40~40c ? ? 3 i dds2 standby current ce = v dd ? 0.2 v ta = ? 40~85c ? ? 20 a capacitance (ta = 25c, f = 1 mhz) symbol parameter test condition max unit c in input capacitance v in = gnd 10 pf c out output capacitance v out = gnd 10 pf note: this parameter is periodically sampled and is not 100% tested.
tc55nem208afpv/aftv55,70 2004-10-14 4/11 ac characteristics and operating conditions (ta = ? 40 to 85c, v dd = 5 v 10%) read cycle tc55nem208afpv/aftv 55 70 symbol parameter min max min max unit t rc read cycle time 55 ? 70 ? t acc address access time ? 55 ? 70 t co chip enable access time ? 55 ? 70 t oe output enable access time ? 30 ? 35 t coe chip enable low to output active 5 ? 5 ? t oee output enable low to output active 0 ? 0 ? t od chip enable high to output high-z ? 25 ? 30 t odo output enable high to output high-z ? 25 ? 30 t oh output data hold time 10 ? 10 ? ns write cycle tc55nem208afpv/aftv 55 70 symbol parameter min max min max unit t wc write cycle time 55 ? 70 ? t wp write pulse width 40 ? 50 ? t cw chip enable to end of write 45 ? 55 ? t as address setup time 0 ? 0 ? t wr write recovery time 0 ? 0 ? t odw r/w low to output high-z ? 25 ? 30 t oew r/w high to output active 0 ? 0 ? t ds data setup time 25 ? 30 ? t dh data hold time 0 ? 0 ? ns ac test conditions parameter test condition input pulse level 0.4 v, 2.6 v t r , t f 5 ns timing measurements 1.5 v reference level 1.5 v output load 30 pf + 1 ttl gate (55) 100 pf + 1 ttl gate (70)
tc55nem208afpv/aftv55,70 2004-10-14 5/11 ac characteristics and operating conditions (ta = ? 40 to 85c, v dd = 2.7 to 5.5 v) read cycle tc55nem208afpv/aftv 55 70 symbol parameter min max min max unit t rc read cycle time 85 ? 100 ? t acc address access time ? 85 ? 100 t co chip enable access time ? 85 ? 100 t oe output enable access time ? 60 ? 70 t coe chip enable low to output active 5 ? 5 ? t oee output enable low to output active 0 ? 0 ? t od chip enable high to output high-z ? 35 ? 40 t odo output enable high to output high-z ? 35 ? 40 t oh output data hold time 10 ? 10 ? ns write cycle tc55nem208afpv/aftv 55 70 symbol parameter min max min max unit t wc write cycle time 85 ? 100 ? t wp write pulse width 55 ? 60 ? t cw chip enable to end of write 60 ? 70 ? t as address setup time 0 ? 0 ? t wr write recovery time 0 ? 0 ? t odw r/w low to output high-z ? 35 ? 40 t oew r/w high to output active 0 ? 0 ? t ds data setup time 35 ? 40 ? t dh data hold time 0 ? 0 ? ns ac test conditions parameter test condition input pulse level 0.2 v, v dd ? 0.2 v t r , t f 5 ns timing measurements 1.5 v reference level 1.5 v output load 30 pf (include jig) (55) 100 pf (include jig) (70)
tc55nem208afpv/aftv55,70 2004-10-14 6/11 timing diagrams read cycle (see note 1) write cycle 1 (r/w controlled) (see note 4) t rc t acc t oh t co oe t od valid data out t oe t oee t coe t odo hi-z hi-z ce address a0~a18 d out i/o1~8 r/w t wc t as t wr t wp ce t cw valid data in t odw t ds t dh t oew (see note 2) hi-z (see note 5) (see note 3) (see note 5) address a0~a18 d out i/o1~8 d in i/o1~8
tc55nem208afpv/aftv55,70 2004-10-14 7/11 write cycle 2 ( controlled) (see note 4) note: (1) r/w remains high for the read cycle. (2) if ce goes low coincident with or after r/w goes lo w, the outputs will remain at high impedance. (3) if ce goes high coincident with or before r/w goes high, the outputs will remain at high impedance. (4) if oe is high during the write cycle, the outputs will remain at high impedance. (5) because i/o signals may be in the output state at th is time, input signals of reverse polarity must not be applied. ce r/w t wc t as t wr t wp ce t cw valid data in t odw t ds t dh t coe hi-z hi-z (see note 5) (see note 5) address a0~a18 d out i/o1~8 d in i/o1~8
tc55nem208afpv/aftv55,70 2004-10-14 8/11 data retention characteristics (ta = ? 40 to 85c) symbol parameter min typ max unit v dh data retention supply voltage 2.0 ? 5.5 v ta = ? 40~40c ? ? 3 i dds2 standby current ta = ? 40~85c ? ? 20 a t cdr chip deselect to data retention mode time 0 ? ? ns t r recovery time 5 ? ? ms controlled data retention mode note: when ce is operating at the v ih level (2.4 v), the standby current is given by i dds1 during the transition of v dd from 4.5 to 2.6 v. ce v dd 4.5 v gnd v ih data retention mode t r (see note) (see note) t cdr v dd ? 0.2 v ce
tc55nem208afpv/aftv55,70 2004-10-14 9/11 package dimensions weight:1.12 g (typ)
tc55nem208afpv/aftv55,70 2004-10-14 10/11 package dimensions weight:0.52 g (typ)
tc55nem208afpv/aftv55,70 2004-10-14 11/11 ? the information contained herein is subject to change without notice. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inhe rent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba produc ts, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within s pecified operating ranges as set forth in the most recent toshiba products specific ations. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semicon ductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are inte nded for usage in general electronics applications (computer, personal equipment, office equipment, measuri ng equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunc tion or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control in struments, airplane or spaceship instruments, transportation instruments, traffic signa l instruments, combusti on control instruments, medical instruments, all types of safety devices, etc .. unintended usage of toshiba products listed in this document shall be made at th e customer?s own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? toshiba products should not be embedded to the down stream products which ar e prohibited to be produced and sold, under any law and regulations. 030619eb a restrictions on product use

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