tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-1 cmos 8-bit microcontroller tmp88cs38ng/fg, tmp88cm 38ang/f, tmp88cp38ang/f the tmp88cs38/cm38a/cp38a is the high speed and high performance 8-bit single chip microcomputers. this mcu contain cpu core, rom, ram, input/output ports, four multi-function timer/counters, serial bu s interface, on-screen display, pwm output, 8-bit ad converter, and remote control signal preprocessor on chip. product no. rom ram package otp mcu tmp88cs38ng/fg 64 k 8 bits 2 k 8 bits tmp88cm38ang/f 32 k 8 bits tmp88cp38ang/f 48 k 8 bits 1.5 k 8 bits p-sdip42-600-1.78 p-qfp44-1414-0.80k tmp88ps38ng/fg features ? 8-bit single chip microc omputer tlcs-870/x series ? instruction execution time: 0.25 s (at 16 mhz) ? 842 basic instructions ? multiplication and division (8 bits 8 bits, 16 bits 8 bits, 16 bits/8 bits) ? bit manipulations (set/clear/complement/move/test/exclusive or) ? 16-bit data and 20-bit data operations ? 1-byte jump/subroutine call (sho rt relative jump/vector call) ? i/o ports: maximum 33 (high current output: 4) ? 17 interrupt sources: external 6, internal 11 ? all sources have independent latches each, an d nested interrupt control is available. ? edge-selectable external interrupts with noise reject ? high-speed task switching by register bank changeover ? rom corrective function ? two 16-bit timer/counters: tc1, tc2 ? timer, event counter, pulse width measurement, external trigger timer, window modes purchase of toshiba i 2 c components conveys a lic ense under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard s p ecification as defined b y phili p s. ? the information contained herein is subject to change without notice. ? the information contained herein is pres ented only as a guide for the applications of our products. no responsibility is assum ed by toshiba for any infringements of patents or other rights of the th ird parties which may result from its use. no license is gran ted by implication or otherwise under any patent or patent rights of toshiba or others. ? toshiba is continually working to improve the quality and reli ability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibi lity of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to a void situations in which a malfunction or failure of such toshiba pr oducts could cause loss of human life, bodily injury or damage t o property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. al so, please keep in mind the precautions and conditions set forth in the ?handling gui de for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc.. ? the toshiba products listed in this document are intended for usage in general electronics applic ations (computer, personal equipment, office equipment, measuring equipmen t, industrial robotics, domestic applianc es, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requi res extraordinarily high quality and/or reliability or a malfun ctionor failure of which may cause loss of human life or bodily inju ry (?unintended usage?). unintended usage include atomic energy con trol instruments, airplane or spaceship instru ments, transportation instruments, traffic signal instruments, combustion control inst ruments, medical instruments, all types of safety devices, etc.. unin tended usage of toshiba products listed in this document shall be m ade at the customer?s own risk. ? the products described in this document are s ubject to the foreign exchange and foreign trade laws. ? toshiba products should not be embedded to the downstream produc ts which are prohibited to be produced and sold, under any law and regulations. ? for a discussion of how the reliability of microcontrollers can be predicted, please refer to section 1.3 of the chapter entit led quality and reliability assurance/handling precautions. 030619ebp1
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-2 ? two 8-bit timer/counters: tc3, tc4 ? timer, event counter, capture (pulse width/duty measurement) mode ? time base timer (interrupt frequency: 0.95 hz to 31250 hz) ? watchdog timer ? interrupt sourse/reset output ? serial bus interface ? i 2 c bus, 8-bit sio mode (selectable two i/o channels) ? on-screen display circuit ? font rom characters: 384 characters ? characters display: 32 columns 12 lines ? composition: 16 18 dots ? size of character: 3 kinds (line by line) ? color of character: 8 or 15 ki nds (character by character) ? variable display position: horizont al 256 steps, vertical 512 steps ? fringing, smoothing, slant, underline, blinking function ? jitter elimination ? data slicer circuit 1 channel ? da conversion (pulse width modulation) outputs ? 14- or 12-bit resolution (2 channels) ? 12-bit resolution (2 channels) ? 7-bit resolution (6 channels) ? 8-bit successive approxim ate type ad converter with sample and hold ? remote control signal preprocessor ? two power saving operating modes ? stop mode: oscillation stops. battery/ca pacitor backup. port output hold/high impedance. ? idle mode: cpu stops, and peripherals operate using high-frequency clock. release by interrupts. ? operating voltage: 4.5 to 5.5 v at 16 mhz ? emulation pod: bm88cs38n0a-m15
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-3 pin assignments p-qfp44-1414-0.80k p-qfp44-1414-0.80k tmp88cs38fg tmp88cp38af tmp88cm38af tmp88ps38fg package p-sdip42-600-1.78 tmp88cs38ng tmp88cp38ang tmp88cm38ang tmp88ps38ng package vdd p33 (tc4/vin0) p32 (vin1/csin) vvss p35 (sda0) p34 (scl0) p31 (int4/tc3) p30 (int3/rxin) p20 ( 5 int / stop ) reset xout xin test ovss ovdd p71 ( vd ) p70 ( hd ) p67 (y/bl) p66 (b) p65 (g) p64 (r) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 vss ( 0 pwm ) p40 ( 1 pwm ) p41 ( 2 pwm ) p42 ( 3 pwm ) p43 ( pwm4 ) p44 ( pwm5 ) p45 ( pwm6 ) p46 ( 7 pwm ) p47 (tc2/ 0 int / 8 pwm ) (si1/scl1/ 9 pwm ) p51 (so1/sda1) p52 ( 0 kwu / 1 sck /int2/tc1/ain0) ( 1 kwu /ain1) p54 ( 2 kwu /ain2) p55 ( 3 kwu /ain3) p56 ( 4 kwu /y/blin/ain4) p60 ( 5 kwu /bin/ain5) p61 (gin/csout) p62 (rin) p63 (i) p57 p-sdip42-600-1.78 (sda0) p35 vvss (vin1/csin) p32 (tc4/vin0) p33 n.c. vdd vss ( 0 pwm ) p40 ( 1 pwm ) ( 2 pwm ) p42 ( 3 pwm ) p34 (scl0) p31 (int4/tc3) p30 (int3/rxin) p20 ( int5 / stop ) reset xout xin test ovss ovdd p71 ( vd ) ( pwm4 ) p44 ( pwm5 ) p45 ( pwm6 ) p46 ( pwm7 ) p47 (tc2/ int0 / pwm8 ) p50 (si1/scl1/ pwm9 ) p51 (so1/sda1) p52 ( kwu0 / sck1 /int2/tc1/ain0) p53 ( kwu1 /ain1) p54 ( kwu2 /ain2) p55 ( kwu3 /ain3) p56 22 21 20 19 18 17 16 15 14 13 12 34 35 36 37 38 39 40 41 42 43 44 p70 ( hd ) p67 (y/bl) p66 (b) p65 (g) p64 (r) n.c. p57 p63 (rin) p62 (gin/csout) p61 (bin//ain5/ kwu5 ) p60 (y/blin/ain4/ 4 kwu ) 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-4 pin functions (1/2) pin name i/o function p20 ( int5 / stop ) i/o (input) 1-bit input/output port with latch. when used as an input port, the latch must be set to ?1?. external interrupt input 5 or stop mode release signal input p35 (sda0) i/o (input/output) i 2 c bus serial data input/output 0 p34 (scl0) i/o (input/output) i 2 c bus serial clock input/output 0 p33 (tc4/vin0) i/o (input) timer counter input 4 or video signal input 0 p32 (vin1/csin) i/o (input) video signal input 1 or composite sync input p31 (int4/tc3) i/o (input) external interrupt input 4 or timer counter input 3 p30 (int3/rxin) i/o (input) 6-bit programmable input/output port. each bit of these ports can be individually configured as an input or an output under software control. during reset, all bits are configured as inputs. when used as a serial bus interface input/output, the latch must be set to ?1?. external interrupt input 3 or remote control signal preprocessor input p47 ( pwm7 ) i/o (output) p46 ( pwm6 ) i/o (output) p45 ( pwm5 ) i/o (output) p44 ( pwm4 ) i/o (output) 7-bit da conversion (pwm) outputs p43 ( pwm3 ) i/o (output) p42 ( pwm2 ) i/o (output) 12-bit da conversion (pwm) outputs p41 ( pwm1 ) i/o (output) p40 ( pwm0 ) i/o (output) 8-bit programmable input/output port. each bit of these ports can be individually configured as an input or an output under software control. during reset, all bits are configured as inputs. when used as a pwm output, the latch must be set to ?1?. 14/12-bit da conversion (pwm) outputs p57 (i) i/o (output) translucent signal output p56 ( kwu3 /ain3) i/o (input) p55 ( kwu2 /ain2) i/o (input) p54 ( kwu1 /ain1) i/o (input) key-on wakeup inputs or ad converter analog inputs p53 ( kwu0 /ain0/tc1 /int2/ sck1 ) i/o (input /input/input /input/output) key-on wakeup input or ad converter analog input or timer counter input 1 or external interrupt input 2 or sio serial clock input/output 1 p52 (sda1/so1) i/o (input/output /output) i 2 c bus serial data input/output 1 or sio serial data output 1 p51 ( pwm9 /scl1/si1) i/o (output/input/output /input) 7-bit da conversion (pwm) output or i 2 c bus serial data input/output 1 or sio serial data input 1 p50 ( pwm8 /tc2/ int0 ) i/o (output/input /input) 8-bit programmable input/output port. each bit of these ports can be individually configured as an input or an output under software control. during reset, all bits are configured as inputs. when used as a pwm output, a serial bus interface input/output, the latch must be set to ?1?. 7-bit da conversion (pwm) output or timer counter input 2 or external interrupt input 0 p67 (y/bl) i/o (output) y or bl output p66 (b) i/o (output) p65 (g) i/o (output) p64 (r) i/o (output) r/g/b outputs p63 (rin) i/o (input) r input p62 (gin/csout) i/o (input/output) g input or test video signal output p61 ( kwu5 /bin/ain5) i/o (input) key-on wakeup input 5 or b input or ad converter analog input 5 p60 ( kwu4 /yblin/ain4) i/o (input) 8-bit programmable input/output port. (p67 to p64: tri-state, p63 to p60: high current output) each bit of these ports can be individually configured as an input or an output under software control. during reset, all bits are configured as inputs. when used p64 to p67 as port, each bit of the p6 port data selection register (bit7 to 4 in orp6s) must be set to ?1?. key-on wakeup input 4 or y/bl input or ad converter analog input 4
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-5 pin functions (2/2) pin name i/o function p71 ( vd ) i/o (input) vertical sy nchronous signal input p70 ( hd ) i/o (input) 2-bit programmable input/output port. each bit of these ports can be individually configured as an input or an output under software control. during reset, all bits are configured as inputs. horizontal synchr onous signal input xin, xout input, output resonator connecting pins. for inputting external clock, xin is used and xout is opened. reset i/o reset signal input or watchdog timer output/address-trap-reset output/system-clock-reset output test input test pin for out-going test. be tied to low. ovdd, ovss power supply + 5 v, 0 v (gnd) for osd oscillator circuit. vdd, vss, vvss power supply + 5 v, 0 v (gnd)
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-6 block diagram reset i/o test pin xin xout power supply resonator connecting pins ovdd ovss p6 p7 p5 on-screen display circuit system controller standby controller timing generator clock generator interrupt controller time base timer watchdog timer 16-bit timer tc1 tc2 p30 to p35 p64 to p67 p70, 71 p57 ring oscillator display memory character rom jitter elimination i/o ports h v r, g, b, y/bl tlcs-870/x cpu core data memory (ram) data slicer rom corrective circuit program counter 8-bit timer/counte r tc3 tc4 program memory (rom) inst. register inst. decoder serial bus interface p3 p6 video signal output key-on wakeup 8-bit ad p5 da converter (pwm) p4 p2 high frequency p32 p33 video signal p60 to p63 p50 to p56 p40 to p47 p20 i/o ports power supply vdd vss vvss reset test y/blin rin gin bin remote control signal
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-7 operational description 1. cpu core functions the cpu core consists of a cpu, a system cl ock controller, and an interrupt controller. this section provides a description of the cpu core, the program memory, the data memory, the external memory interface, and the reset circuit. 1.1 memory address map the tmp88cs38/cm38a/cp38a memory consists of four blocks: rom, ram, sfr (special function register), and dbr (data buffer register). they are all mapped to a 1-mbyte address space. figure 1.1.1 shows the tmp88cs38/cm38a/cp 38a memory address map. there are 16 banks of the general-purpose register. the regist er banks are also assigned to the ram address space. figure 1.1.1 memory address map rom: read only memory includes program memory, character data memory for osd ram: random access memory includes data memory, stack, general-purpose register banks sfr: special function register includes i/o ports, peripheral hardware control regi sters, peripheral hardware status registers, system control registers, interrupt c ontrol registers, program status word dbr: data buffer register includes control resister for on-screen display (osd) remote-control-receive control/status re sigsters, rom correction control registers test video signal control registers general-purpose register banks (8 registers 16 banks) 32512 bytes program area 128 bytes 64 bytes 128 bytes 64 bytes 2048 bytes 128 bytes 64 bytes 128 bytes 64 bytes 128 bytes 65280 bytes program area 64 bytes tmp88cs38 00000h 0003fh 00040h 000bfh 000c0h 008bfh 00f80h 00fffh 04000h 13effh fff00h fff3fh fff40h fff7fh fff80h fffffh vector table fo r interrupts vector table for vecto r call instruction vector table fo r interrupts ram sfr dbr rom 128 bytes 1536 bytes 64 bytes 64 bytes 128 bytes tmp88cm38a 128 bytes 128 bytes 1536 bytes 48896 bytes program area 64 bytes 64 bytes tmp88cp38a 006bfh 00f80h 00fffh 04000h 0feffh 0beffh 00000h 0003fh 00040h 000bfh 000c0h fff00h fff3fh fff40h fff7fh fff80h fffffh 006bfh 00f80h 00000h 0003fh 00040h 000bfh 000c0h 00fffh 04000h fff00h fff3fh fff7fh fff80h fffffh fff40h 24576 bytes osd font area 24576 bytes osd font area 24576 bytes osd font area 25fffh 25fffh 25fffh 20000h 20000h 20000h
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-220 electrical characteristics absolute maximum ratings (v ss = 0 v) parameter symbol pins ratings unit supply voltage v dd ? ? 0.3 to 6.5 input voltage v in ? ? 0.3 to v dd + 0.3 output voltage v out1 ? ? 0.3 to v dd + 0.3 v i out1 ports p2, p3, p4, p5, p64 to p67, p7 3.2 output current (per 1 pin) i out2 ports p60 to p63 30 i out1 ports p2, p3, p4, p5, p64 to p67, p7 120 output current (total) i out2 ports p60 to p63 120 ma power dissipation [topr = 70 c] pd ? tmp88cs38ng: 600 tmp88cs38fg/ cp38a/cm38a: 400 mw soldering temperature (time) tsld ? 260 (10 s) storage temperature tstg ? ? 55 to 125 operating temperature topr ? ? 30 to 70 c note: the absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. any one of the ratings must not be exceeded. if any absolute maximum rating is exceeded, a device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. thus, when designing products which include this device, ensure that no absolute maximum rating value will ever be exceeded. recommended operating conditions (v ss = 0 v, topr = ? 30 to 70 c) parameter symbol pins conditions min max unit fc = 16 mhz normal mode fc = 16 mhz idle mode supply voltage v dd stop mode 4.5 5.5 v ih1 except hysteresis input v dd 0.70 input high voltage v ih2 hysteresis input v dd = 4.5 to 5.5v v dd 0.75 v dd v il1 except hysteresis input v dd 0.30 v il2 hysteresis input v dd = 4.5 to 5.5v v dd 0.25 input low voltage v il4 key-on wakeup input v dd = 4.5 to 5.5v 0 v dd 0.65 v fc xin, xout v dd = 4.5 to 5.5v 8.0 16.0 fc = 8 mhz 8.0 12.0 clock frequency f osc internal clock v dd = 4.5 to 5.5v fc = 16 mhz 16.0 24.0 mhz note 1: the recommended operating conditions for a devic e are operating conditions under which it can be guaranteed that the device will operate as specified. if the device is used under operating conditions other than the recommended operating conditions (supply voltage, operating temperature range, specified ac/dc values etc.), ma lfunction may occur. thus, when designing products which include this device, ensure that the re commended operating conditions for the device are always adhered to. note 2: clock frequency fc: supply voltage range is specified in normal mode and idle mode. note 3: smaller value is alternatively specified as the maximum value.
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-221 dc characteristics (v ss = 0 v, topr = ? 30 to 70 c) parameter symbol pins conditions min typ. max unit hysteresis voltage v hs hysteresis inputs ? 0.9 ? v i in1 test v dd = 5.5 v, v in = 5.5 v/0 v ? ? 2 i in2 open-drain ports v dd = 5.5 v, v in = 5.5 v/0 v ? ? 2 i in3 tri-state ports v dd = 5.5 v, v in = 5.5 v/0 v ? ? 2 input current i in4 reset , stop v dd = 5.5 v, v in = 5.5 v/0 v ? ? 2 a input resistance r in2 reset v dd = 5.5 v, v in = 0 v 100 220 450 k i lo1 sink open-drain ports v dd = 5.5 v, v out = 5.5 v ? ? 2 output leakage current i lo2 tri-state ports v dd = 5.5 v, v out = 5.5 v/0 v ? ? 2 a output high voltage v oh2 tri-state ports v dd = 4.5 v, i oh = ? 0.7 ma 4.1 ? ? output low voltage v ol except xout and ports p60 to p63 v dd = 4.5 v, i ol = 1.6 ma ? ? 0.4 v output low current i ol3 port p60 to p63 v dd = 4.5 v, v ol = 1.0 v ? 20 ? supply current in normal mode ? 25 30 supply current in idle mode v dd = 5.5 v fc = 16 mhz (note 3) v in = 5.3 v/0.2 v ? 20 25 ma supply current in stop mode i dd ? v dd = 5.5 v v in = 5.3 v/0.2 v ? 0.5 10 a note 1: typical values show those at topr = 25c, v dd = 5 v. note 2: input current i in3 : the current through resistor is not included. note 3: supply current i dd : the current (typ. 0.5 ma) through ladd er resistors of adc is included in normal mode and idle mode. ad conversion characteristics (v ss = 0 v, v dd = 4.5 v to 5.5 v, topr = ? 30 to 70 c) parameter symbol conditions min typ. max unit v aref supplied from v dd pin. ? v dd ? analog reference voltage v ass supplied from v ss pin. ? 0 ? analog reference voltage range v aref = v dd ? v ss ? v dd ? analog input voltage v ain v ss ? v dd v nonlinearity error ? ? 1 zero point error ? ? 2 full scale error ? ? 2 total error v dd = 5.0 v ? ? 3 lsb note: the total error means all error except quanting error.
tmp88cs38/cm38a/cp38a 2005-05-18 88cs38-222 ac characteristics (v ss = 0 v, v dd = 4.5 v to 5.5 v, topr = ? 30 to 70 c) parameter symbol conditions min typ. max unit in normal mode machine cycle time t cy in idle mode 0.5 ? 1.0 s high level clock pulse width t wch low level clock pulse width t wcl for external clock operation (xin input), fc = 16 mhz 31.25 ? ? ns recommended oscillating conditions (v ss = 0 v, v dd = 4.5 v to 5.5 v, topr = ? 30 to 70 c) recommended constant parameter oscillator oscillation frequency recommended oscillator c 1 c 2 8 mhz murata csa 8.00mtz 30 pf 30 pf high-frequency oscillation ceramic resonator 16 mhz murata csa 16.00mxz040 5 pf 5 pf note 1: to keep reliable operation, shield the device electrically with the metal plate on its package mold surface against the high electric field, fo r example, by crt (cathode ray tube). note 2: the product numbers and specifications of the resonators by murata manufacturing co., ltd. are subject to change. for up-to-date information, please refer to the following url; http://www.murata.co.jp/search/index.html high-frequency oscillation c 2 c 1 xin xout
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