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  publication number s72ws-s_00 revision 02 issue date august 12, 2008 s72ws-s based mcp products s72ws-s based mcp products cover sheet 1.8 volt-only x16 flash memo ry and sdram on split bus simultaneous read/write, burst mode mirrorbit ? eclipse ? nor flash on bus 1 mobile sdram on bus 2 data sheet (advance information) notice to readers: this document states the current techni cal specifications regarding the spansion product(s) described herein. each product describ ed herein may be designated as advance information, preliminary, or full production. see notice on data sheet designations for definitions.
2 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) notice on data sheet designations spansion inc. issues data sheets with advance informati on or preliminary designations to advise readers of product information or int ended specifications throu ghout the product life cycle, including development, qualification, initial production, and fu ll production. in all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. the following descriptions of spansion data sheet designations are presented here to highlight their presence and definitions. advance information the advance information designation indicates that spansion inc. is developing one or more specific products, but has not committed any design to production. information pr esented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. spansion inc. therefore places the following c onditions upon advance information content: ?this document contains information on one or mo re products under development at spansion inc. the information is intended to help you evaluate th is product. do not design in this product without contacting the factory. spansion inc. reserves t he right to change or discont inue work on this proposed product without notice.? preliminary the preliminary designation indicates that the produc t development has progressed such that a commitment to production has taken place. this designation covers several aspects of the product life cycle, including product qualification, initial produc tion, and the subsequent phases in t he manufacturing process that occur before full production is achieved. changes to the technical specifications presented in a preliminary document should be expected while keeping these as pects of production under consideration. spansion places the following conditions upon preliminary content: ?this document states the current technical sp ecifications regarding the spansion product(s) described herein. the preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this doc ument may be revised by subsequent versions or modifications due to changes in technical specifications.? combination some data sheets contain a combination of products with different designations (advance information, preliminary, or full production). this type of docum ent distinguishes these prod ucts and their designations wherever necessary, typically on the first page, t he ordering information page, and pages with the dc characteristics table and the ac erase and program ta ble (in the table notes). the disclaimer on the first page refers the reader to the notice on this page. full production (no designation on document) when a product has been in production for a period of time such that no changes or only nominal changes are expected, the preliminary designation is remove d from the data sheet. nominal changes may include those affecting the number of ordering part numbers available, such as t he addition or deletion of a speed option, temperature range, package type, or v io range. changes may also include those needed to clarify a description or to correct a typographical error or incorre ct specification. spansion inc. applies the following conditions to documents in this category: ?this document states the current technical sp ecifications regarding the spansion product(s) described herein. spansi on inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. however, typographical or specification corrections, or mo difications to the valid comb inations offered may occur.? questions regarding these docum ent designations may be directed to your local sales office.
this document contains information on one or more products under development at spansion inc. the information is intended to he lp you evaluate this product. do not design in this product without contacting the factory. spansion inc. reserves the right to change or discontinue work on this proposed pr oduct without notice. publication number s72ws-s_00 revision 02 issue date august 12, 2008 features ? power supply voltage of 1.7 to 1.95 v ? flash access time: 100 ns for nor flash ? flash burst frequency: 104 mhz, 133 mhz ? mobile sdram burst frequency: 133 mhz (sdr), 166 mhz (ddr) ? package: ? 13.0 x 11.0 mm mcp ? operating temperature ? ?25c to +85c (wireless) the s72ws series is a product line of stacked packages and consists of: ? one or two mirrorbit ? eclipse ? nor flash memory die ? separate bus for one or more mobile sdram die the products covered by this document are listed in the table below. note: for a full list of opns, please contact the local sales represen tative or refer to the ordering information valid combinations tables. for detailed specifications, please re fer to the individual data sheets. s72ws-s based mcp products 1.8 volt-only x16 flash memo ry and sdram on split bus simultaneous read/write, burst mode mirrorbit ? eclipse ? nor flash on bus 1 mobile sdram on bus 2 data sheet (advance information) device eclipse flash de nsity nand flash density s72ws01gsf0yhmj5 1 gb 512 mb (ddr) s72ws01gsf0yhmj3 1 gb 512 mb (ddr) s72ws01gsf0yhm15 1 gb 512 mb (sdr) document publication identification number (pid) s29ws-s s29ns-s_00 512 mb mobile ddr-dram type 5 dram_11 512 mb mobile sdr-dram type 5 dram_12
4 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) 1. product selector guide 1.1 nor flash + dram products 2. mcp block diagrams 2.1 nor flash + dram products figure 2.1 s72ws01gsf0yhmh5 device nor flash density nor flash speed dram density dram speed dram supplier package s72ws01gsf0yhmj5 1 gb 104 mhz 512 mb 166 mhz (ddr) type 5 mcp 13 x 11 mm s72ws01gsf0yhm15 133 mhz (sdr) s72ws01gsf0yhmj3 133 mhz 166 mhz (ddr) 5 1 q d - f - 0 q d - f 5 1 q d - 0 q d 5 2 a - 0 a 5 2 a - f - 0 a - f f-rdy rdy s s v - f s s v vss_bist f-cl k t s i b _ o i s s v k l c f-avd# o i s s v # d v a # e c # e c - f # e o # e o - f c c v - f c c v t s i b _ c c v # t e s e r # t s r - f t s i b _ o i c c v c c a c c a - f o i c c v # e w # e w - f 5 1 q d - d - 0 q d - d 5 1 q d - 0 q d 2 1 a - 0 a 2 1 a - d - 0 a - d 0 s q d - d s q d l k c k l c - d d-clk# 1 s q d - d s q d u # k c 0 m d - d m d l # s c # e c - d 1 m d - d m d u # s a r # s a r - d # s a c # s a c - d s s v - d s s v # e w # e w - d vssq 0 a b 0 a b - d c c v - d d d v 1 a b 1 a b - d q c c v - d q d d v e k c e k c - d ws01gs flash memory 512 mb ddr dram type 5
august 12, 2008 s72ws-s_00_02 s72ws-s based mcp products 5 data sheet (advance information) figure 2.2 s72ws01gsf0yhm15 5 1 q d - f - 0 q d - f 5 1 q d - 0 q d 4 2 a - 0 a 4 2 a - f - 0 a - f f-rdy rdy s s v - f s s v vss_bist f-cl k t s i b _ o i s s v k l c f-avd# o i s s v # d v a # e c - 1 f # 1 e c - f # e c - 2 f # 2 e c - f c c v - f c c v # e o # e o - f t s i b _ c c v # t e s e r # t s r - f t s i b _ o i c c v c c a c c a - f o i c c v # e w # e w - f 5 1 q d - d - 0 q d - d 5 1 q d - 0 q d 2 1 a - 0 a 2 1 a - d - 0 a - d k l c k l c - d 0 m d - d m q d l # s c # e c - d 1 m d - d m q d u # s a r # s a r - d # s a c # s a c - d s s v - d s s v # e w # e w - d vssq 0 a b 0 a b - d c c v - d d d v 1 a b 1 a b - d q c c v - d q d d v e k c e k c - d ws01gs flash memory 512 mb sdr dram type 5
6 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) 3. connection diagrams 3.1 s72ws01gsf0yhmj3, s72ws01gsf0yhmj5 note: ddr-only signals are rfus in the case of the sdr dram-based solutions. 3 2910 5 47 68 1 13 12 11 d-a8 nc d-dm1 d-vss d-a12 d-vss d-vss rfu rfu nc nc d-dq13 b d e f g h j k l m n p r t u a c d-vcc d-a7 d-dq8 d-dq9 rfu d-a11 d-vcc rfu rfu nc nc d-dq14 d-vccq d-a9 d-vss f-a16 f-a19 f-a9 f-a6 f-vss f-a12 f-we# d-a4 d-dq15 d-vss d-dq10 f-vss d-vcc f-a17 f-a18 f-a8 f-a5 f-vcc f-a11 f-a15 d-a5 d-vccq d-dqs1 f-a21 f-a3 f-a1 f-vss f-vcc f-a7 f-vcc f-a13 f-a10 f-a14 d-a6 d-dq12 f-a24 f-a22 f-a2 f-a0 f-a20 rfu f-a4 d-vss d-dq11 f-a25 f-a23 rfu rfu rfu rfu d-vcc d-vss rfu rfu rfu rfu rfu rfu d-cke d-vccq rfu rfu rfu rfu rfu f-acc d-clk d-dq7 rfu rfu rfu rfu rfu rfu d-clk# d-dq6 rfu rfu rfu rfu f-vss f-dq10 d-vss d-vss rfu rfu f-dq0 f-rdy f-vcc f-dq2 d-vcc d-vccq rfu f-dq7 f-dq9 f-dq8 f-vcc f-vss f-vss f-vcc f-vss f-vcc f-avd# rfu d-dqs0 f-dq15 f-dq14 f-dq1 d-vcc f-dq12 f-dq13 rfu f-dq11 f-vcc f-ce# f-clk d-a2 d-dq2 d-dq4 f-dq6 d-a10 d-vss f-dq4 f-dq5 f-rst# f-dq3 f-vss rfu f-oe# d-a3 d-dq0 d-vss d-dq5 d-vss d-vcc rfu d-vss d-ce# d-ba1 d-vccq d-cas# d-we nc nc d-vccq d-dq3 d-a1 nc d-vcc d-dm0 d-ba0 d-a0 d-vss d-ras# rfu nc nc nc d-dq1 legend no connect x16 nor only x16 ddr dram only reserved for future use 186-ball fine-pitch ball grid array (top view, balls facing down)
august 12, 2008 s72ws-s_00_02 s72ws-s based mcp products 7 data sheet (advance information) 3.2 s72ws01gsf0yhm15 3.2.0.1 special handling instructions for fbga package special handling is required for flash memory products in fbga packages. flash memory devices in fbga packages may be damaged if exposed to ultrasonic cleaning methods. the package and/or data integrity may be compromised if t he package body is exposed to temperatures above 150c for prolonged periods of time. 3 2910 5 47 68 1 13 12 11 d-a8 nc d-dm1 d-vss d-a12 d-vss d-vss rfu rfu nc nc d-dq13 b d e f g h j k l m n p r t u a c d-vcc d-a7 d-dq8 d-dq9 rfu d-a11 d-vcc rfu rfu nc nc d-dq14 d-vccq d-a9 d-vss f-a16 f-a19 f-a9 f-a6 f-vss f-a12 f-we# d-a4 d-dq15 d-vss d-dq10 f-vss d-vcc f-a17 f-a18 f-a8 f-a5 f-vcc f-a11 f-a15 d-a5 d-vccq rfu f-a21 f-a3 f-a1 f-vss f-vcc f-a7 f-vcc f-a13 f-a10 f-a14 d-a6 d-dq12 f-a24 f-a22 f-a2 f-a0 f-a20 rfu f-a4 d-vss d-dq11 rfu f-a23 rfu rfu rfu rfu d-vcc d-vss rfu rfu rfu rfu rfu rfu d-cke d-vccq rfu rfu rfu rfu rfu f-acc d-clk d-dq7 rfu rfu rfu rfu rfu rfu rfu d-dq6 rfu rfu rfu rfu f-vss f-dq10 d-vss d-vss rfu rfu f-dq0 f-rdy f-vcc f-dq2 d-vcc d-vccq rfu f-dq7 f-dq9 f-dq8 f-vcc f-vss f-vss f-vcc f-vss f-vcc f-avd# rfu rfu f-dq15 f-dq14 f-dq1 d-vcc f-dq12 f-dq13 rfu f-dq11 f-vcc f-ce1# f-clk d-a2 d-dq2 d-dq4 f-dq6 d-a10 d-vss f-dq4 f-dq5 f-rst# f-dq3 f-vss f-ce2# f-oe# d-a3 d-dq0 d-vss d-dq5 d-vss d-vcc rfu d-vss d-ce# d-ba1 d-vccq d-cas# d-we nc nc d-vccq d-dq3 d-a1 nc d-vcc d-dm0 d-ba0 d-a0 d-vss d-ras# rfu nc nc nc d-dq1 legend no connect x16 nor only x16 sdr dram only reserved for future use 186-ball fine-pitch ball grid array (top view, balls facing down)
8 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) 3.3 nor flash and dram input/output descriptions signal description flash dram f-amax-f-a0 nor flash address inputs x f-dq15-f-dq0 flash data input/output x f-ce2# nor flash chip-enable input #2. asynchronous relative to clk for burst mode x f-ce# nor flash chip-enable input #1. asynchronous relative to clk for burst mode. x f-oe# nor flash output enable input. asynchronous relative to clk for burst mode. x f-we# nor flash write enable input. x f-v cc nor flash device power supply (1.7 v - 1.95v). x f-v ss nor flash ground x rfu reserved for future use f-rdy flash ready output. indicates the status of the burst read. v ol = data valid. x f-clk nor flash clock. the first rising edge of cl k in conjunction with avd# low latches the address input and activates burst mode operation. after the initial word is output, subsequent rising edges of clk increment the internal address counter. clk should remain low during asynchronous access. x f-avd# nor flash address valid input. indicates to device that the valid address is present on the address inputs. v il = for asynchronous mode, indicates valid addre ss; for burst mode, causes starting address to be latched on rising edge of clk. v ih = device ignores address inputs x f-rst# nor flash hardware reset input. v il = device resets and returns to reading array data x f-acc nor flash accelerated input. at v hh , accelerates programming; automatically places device in unlock bypass mode. at v il , disables all program and erase functions. should be at v ih for all other conditions. x d-amax-d-a0 sdram address inputs x d-dq15-d-dq0 sdram data input/output x d-clk sdram system clock x d-ce# sdram chip select x d-cke sdram clock enable x d-ba1-ba0 sdram bank select x d-ras# sdram row address strobe x d-cas# sdram column address strobe x d-dm1-d-dm0 sdram data input/output mask x d-we# sdram write enable input x d-v ss sdram ground x d-clk# ddr sdram clock - in addition to d-clk, this signal is available for ddrams that need clk# for normal operations x d-v ccq sdram input/output buffer power supply x d-v cc sdram device power supply x d-dqs0 - d- dqs1 ddr sdram data strobe pins. dqs provides the read data strobes (as output) and the write data strobes (as input). each dqs pin corresponds to eight dq pins, respectively. x
august 12, 2008 s72ws-s_00_02 s72ws-s based mcp products 9 data sheet (advance information) 4. ordering information the order number is formed by a valid combinations of the following: 4.1 valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. notes 1. packing type 0 is standard. specify other options as required. 2. bga package marking omits leading s and packing type designator from ordering part number. s72ws 01g s f0 yh m j 3 0 packing type 0 = tray 2 = 7? tape and reel 3 = 13? tape and reel model number 2 3 = 133 mhz flash / 166 mhz ddr 5 = 104 mhz flash / 166 mhz ddr or 104 mhz flash / 133 mhz sdr model number 1 j = x16 ddr dram type 5 1 = x16 sdr dram type 5 package descriptor m = 13 x 11 mm, 186-ball package type & material set yh = 1.2 mm mcp fbga, low-halogen, pb-free dram & ornand flash density f0 = 512 mb dram process technology s = 65 nm, mirrorbit eclipse code flash density 01g = 1 gb product family s72ws stacked products 1.8v nor flash on bus 1 with mobile dram on bus 2 base ordering number nor flash speed dram supplier dram speed package type package markings s72ws01gsf0yhmj5 104 mhz type 5 166 mhz (ddr) 13 x 11 mm (mcp) (note 2) s72ws01gsf0yhm15 133 mhz (sdr) s72ws01gsf0yhmj3 133 mhz 166 mhz (ddr)
10 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) 5. physical dimensions 5.1 asg186?186-ball fine-pit ch ball grid array (fbga) 11 x 13 mm package package asg 186 jedec n/a d x e 13.00 mm x 11.00 mm package symbol min nom max note a --- --- 1.20 profile a1 0.20 --- --- ball height a2 0.79 --- 0.95 body thickness d 13.00 bsc body size e 11.00 bsc body size d1 10.40 bsc matrix footprint e1 7.80 bsc matrix footprint md 17 matrix size d direction me 13 matrix size e direction n 186 ball count ? b 0.325 0.375 0.425 ball diameter ee 0.65 bsc ball pitch ed 0.65 bsc ball pitch sd se 0.00 bsc solder ball placement depopulated solder balls 3700 \ 16-038.24 \ 6.24.8 notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jep95, section 4.3, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means.
august 12, 2008 s72ws-s_00_02 s72ws-s based mcp products 11 data sheet (advance information) 6. revision history section description revision 01 (july 1, 2008) initial release revision 02 (august 12, 2008) global added opn s72ws01gsf0yhmj3 features changed flash access time to 100 ns
12 s72ws-s based mcp products s72ws-s_00_02 august 12, 2008 data sheet (advance information) colophon the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, genera l office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for any use that includes fatal risks or dangers t hat, unless extremely high safety is secured, could have a s erious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic contro l, mass transport control, medical life support system, missile launch control in we apon system), or (2) for any use where chance of failure is intole rable (i.e., submersible repeater and artifi cial satellite). please note that spansion will not be liable to you and/or any third party for any claims or damages arising in connection with abo ve-mentioned uses of the products. any semic onductor devices have an inherent chance of failure. you must protect agains t injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document r epresent goods or technologies s ubject to certain restriction s on export under the foreign exchange and foreign trade law of japan, the us export ad ministration regulations or the applicable laws of any oth er country, the prior authorization by the respective government entity will be required for export of those products. trademarks and notice the contents of this document are subjec t to change without notice. this document ma y contain information on a spansion product under development by spansion. spansion reserves the right to change or discontinue work on any product without notice. the informati on in this document is provided as is without warran ty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. spansion assume s no liability for any damages of any kind arising out of the use of the information in this document. copyright ? 2008 spansion inc. all rights reserved. spansion ? , the spansion logo, mirrorbit ? , mirrorbit ? eclipse ? , ornand ? , ornand2 ? , hd-sim ? , ecoram ? and combinations thereof, are trademarks of spansion llc in the us and other countries. other names used are for informational purposes only and may be tr ademarks of their respective owners.


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