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r8c/13 group single-chip 16-bit cmos microcomputer rev.1.20 jan 27, 2006 page 1 of 27 rej03b0069-0120 rej03b0069-0120 rev.1.20 jan 27, 2006 1. overview this mcu is built using the high-performance silicon gate cmos process using a r8c/tiny series cpu core and is packaged in a 32-pin plastic molded lqfp. this mcu operates using sophisticated instructions featuring a high level of instruction efficiency. with 1m bytes of address space, it is capable of executing instructions at high speed. the data flash rom (2 kb x 2 blocks) is embedded. 1.1 applications electric household appliance, office equipment, housing equipment (sensor, security), general industrial equipment, audio, etc.
rev.1.20 jan 27, 2006 page 2 of 27 rej03b0069-0120 r8c/13 group 1. overview table 1.1 performance outline 1.2 performance overview table 1.1. lists the performance outline of this mcu. item performance cpu number of basic instructions 89 instructions minimum instruction execution time 50 ns (f(x in ) = 20 mh z , v cc = 3.0 to 5.5 v) 100 ns (f(x in ) = 10 mh z , v cc = 2.7 to 5.5 v) operating mode single-chip address space 1m bytes memory capacity see table 1.2. peripheral port input/output: 22 (including led drive port), input: 2 function led drive port i/o port: 8 timer timer x: 8 bits x 1 channel, timer y: 8 bits x 1 channel, timer z: 8 bits x 1 channel (each timer equipped with 8-bit prescaler) timer c: 16 bits x 1 channel (circuits of input capture and output compare) serial interface ? channel clock synchronous, uart ? channel uart a/d converter 10-bit a/d converter: 1 circuit, 12 channels watchdog timer 15 bits x 1 (with prescaler) reset start function selectable interrupt internal: 11 factors, external: 5 factors, software: 4 factors, priority level: 7 levels clock generation circuit 2 circuits ?ain clock generation circuit (equipped with a built-in feedback resistor) ?n-chip oscillator (high-speed, low-speed) on high-speed on-chip oscillator the frequency adjust- ment function is usable. oscillation stop detection function main clock oscillation stop detection function voltage detection circuit included power on reset circuit included electrical supply voltage v cc = 3.0 to 5.5v (f(x in ) = 20mh z ) characteristics v cc = 2.7 to 5.5v (f(x in ) = 10mh z ) power consumption typ.9 ma (v cc = 5.0v, (f(x in ) = 20mh z ) typ.5 ma (v cc = 3.0v, (f(x in ) = 10mh z ) typ.35 a (v cc = 3.0v, wait mode, peripheral clock stops) typ.0.7 a (v cc = 3.0v, stop mode) flash memory program/erase supply voltage v cc = 2.7 to 5.5 v program/erase endurance 10,000 times (data flash) 1,000 times (program rom) operating ambient temperature -20 to 85? -40 to 85? (d-version) package 32-pin plastic mold lqfp
rev.1.20 jan 27, 2006 page 3 of 27 rej03b0069-0120 r8c/13 group 1. overview 1.3 block diagram figure 1.1 shows this mcu block diagram. figure 1.1 block diagram t i m e r x ( 8 b i t s ) t i m e r y ( 8 b i t s ) t i m e r z ( 8 b i t s ) t i m e r c ( 1 6 b i t s ) w a t c h d o g t i m e r ( 1 5 b i t s ) m e m o r y r 8 c / t i n y s e r i e s c p u c o r e i / o p o r t p o r t p 0 8 p o r t p 1 8 port p3 5 m u l t i p l i e r s y s t e m c l o c k g e n e r a t o r x in -x out high-speed on-chip oscillator low-speed on-chip oscillator uart (8 bits ? 1 channel) p o r t p 4 1 2 pe r i p h e r a l f u n c t i o n s u a r t o r c l o c k s y n c h r o n o u s s e r i a l i / o ( 8 b i t s ? 1 c h a n n e l ) a / d c o n v e r t e r ( 1 0 b i t s ? 1 2 c h a n n e l s ) notes: 1. rom size depends on mcu type. 2. ram size depends on mcu type. r 0 l r 0 h r 1 hr 1 l r2 r3 a0 a1 f b s b isp usp intb pc flg t i m e r rom ram ( 2 ) (1)
rev.1.20 jan 27, 2006 page 4 of 27 rej03b0069-0120 r8c/13 group 1. overview 1.4 product information table 1.2 lists the product information. table 1.2 product information ram capacity rom capacity package type remarks type no. as of january 2006 flash memory version r5f21132fp plqp0032gb-a 8k bytes 512 bytes plqp0032gb-a 12k bytes 768 bytes plqp0032gb-a 16k bytes 1k bytes r5f21133fp r5f21134fp R5F21132DFP plqp0032gb-a 8k bytes 512 bytes plqp0032gb-a 12k bytes 768 bytes plqp0032gb-a 16k bytes 1k bytes r5f21133dfp r5f21134dfp d version program rom data flash 2k bytes x 2 2k bytes x 2 2k bytes x 2 2k bytes x 2 2k bytes x 2 2k bytes x 2 figure 1.2 type no., memory size, and package package type: fp : plqp0032gb-a rom capacity: 2 : 8 kbytes. 3 : 12 kbytes. 4 : 16 kbytes. memory type: f: flash memory version type no. r 5 f 21 13 4 d fp r8c/13 group r8c/tiny series classification: d: operating ambient temperature 40 c to 85 c no symbol: operating ambient temperature 20 c to 85 c renesas mcu renesas semiconductors
rev.1.20 jan 27, 2006 page 5 of 27 rej03b0069-0120 r8c/13 group 1. overview package: plqp0032gb-a (32p6u-a) figure 1.3 pin assignments (top view) pin assignments (top view) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 3 2 3 1 3 0 r8c/13 group x i n / p 4 6 v s s r e s e t v c c c n v s s p 1 7 / i n t 1 / c n t r 0 p 1 6 / c l k 0 p1 5 /rxd 0 p 1 4 / t x d 0 p 3 7 / t x d 1 0 / r x d 1 p 3 0 / c n t r 0 / c m p 1 0 p 3 3 / i n t 3 / p 3 1 / t z o u t / c m p 1 1 p 3 2 / i n t 2 / c n t r 1 / c m p 1 2 i v c c a v s s a v c c / v r e f p 0 3 / a n 4 p0 2 /an 5 p 0 1 / a n 6 p0 0 /an 7 /txd 11 p0 6 /an 1 p 0 5 / a n 2 p0 4 /an 3 p 4 5 / i n t 0 p 1 0 / k i 0 / a n 8 / c m p 0 0 p1 1 /ki 1 /an 9 /cmp0 1 p 1 2 / k i 2 / a n 1 0 / c m p 0 2 p 1 3 / k i 3 / a n 1 1 p 0 7 / a n 0 m o d e t c i n notes: 1. p4 7 functions only as an input port. 2. when using on-chip debugger, do not use p0 0 /an 7 /txd 11 and p3 7 /txd 10 /rxd 1 pins. 3. do not connect ivcc to vcc. x o u t / p 4 7 ( 1 ) ( 3 ) 1.5 pin assignments figure 1.3 shows the pin configuration (top view).
rev.1.20 jan 27, 2006 page 6 of 27 rej03b0069-0120 r8c/13 group 1. overview signal name pin name i/o type power supply vcc, i input vss ivcc ivcc o analog power avcc, avss i supply input reset input ___________ reset i cnvss cnvss i mode mode i main clock input x in i main clock output x out o _____ int interrupt input _______ _______ int 0 to int 3 i key input interrupt _____ _____ ki 0 to ki 3 i input timer x cntr 0 i/o __________ cntr 0 o timer y cntr 1 i/o timer z tz out o timer c tc in i cmp0 0 to cmp0 2 , o cmp1 0 to cmp1 2 serial interface clk 0 i/o rxd 0 , rxd 1 i txd 0 , txd 10 ,o txd 11 reference voltage v ref i input a/d converter an 0 to an 11 i i/o port p0 0 to p0 7 , i/o p1 0 to p1 7 , p3 0 to p3 3 , p3 7 , p4 5 input port p4 6 , p4 7 i function apply 2.7 v to 5.5 v to the vcc pin. apply 0 v to the vss pin. this pin is to stabilize internal power supply. connect this pin to vss via a capacitor (0.1 f). do not connect to vcc. power supply input pins for a/d converter. connect the avcc pin to vcc. connect the avss pin to vss. connect a capacitor between pins avcc and avss. input l on this pin resets the mcu. connect this pin to vss via a resistor. connect this pin to vcc via a resistor. these pins are provided for the main clock generat- ing circuit i/o. connect a ceramic resonator or a crys- tal oscillator between the x in and x out pins. to use an externally derived clock, input it to the x in pin and leave the x out pin open. ______ int interrupt input pins. key input interrupt pins. timer x i/o pin timer x output pin timer y i/o pin timer z output pin timer c input pin the timer c output pins transfer clock i/o pin. serial data input pins. serial data output pins. reference voltage input pin for a/d converter. con- nect the v ref pin to vcc. analog input pins for a/d converter these are 8-bit cmos i/o ports. each port has an i/o select direction register, allowing each pin in that port to be directed for input or output individually. any port set to input can select whether to use a pull- up resistor or not by program. p1 0 to p1 7 also function as led drive ports. port for input-only 1.6 pin description table 1.3 shows the pin description table 1.3 pin description
rev.1.20 jan 27, 2006 page 7 of 27 rej03b0069-0120 r8c/13 group 2. central processing unit (cpu) 2. central processing unit (cpu) figure 2.1 shows the cpu register. the cpu contains 13 registers. of these, r0, r1, r2, r3, a0, a1 and fb comprise a register bank. two sets of register banks are provided. 2.1 data registers (r0, r1, r2 and r3) r0 is a 16-bit register for transfer, arithmetic and logic operations. the same applies to r1 to r3. the r0 can be split into high-order bit (r0h) and low-order bit (r0l) to be used separately as 8-bit data registers. the same applies to r1h and r1l as r0h and r0l. r2 can be combined with r0 to be used as a 32-bit data register (r2r0). the same applies to r3r1 as r2r0. d a t a r e g i s t e r s ( 1 ) address registers (1) f r a m e b a s e r e g i s t e r s ( 1 ) p r o g r a m c o u n t e r i n t e r r u p t t a b l e r e g i s t e r user stack pointer i n t e r r u p t s t a c k p o i n t e r static base register f l a g r e g i s t e r n o t e s : 1 . a r e g i s t e r b a n k c o m p r i s e s t h e s e r e g i s t e r s . t w o s e t s o f r e g i s t e r b a n k s a r e p r o v i d e d r0h(high-order of r0) b 1 5 b 8 b 7 b0 r 3 i n t b h usp i s p sb c d z s b o i u i p l r 0 l ( l o w - o r d e r o f r 0 ) r1h(high-order of r1) r1l(low-order of r1) r 2 b 3 1 r3 r2 a1 a0 f b b 1 9 i n t b l b 1 5 b0 p c b 1 9 b0 b15 b0 f l g b 1 5 b0 b 1 5 b0 b 7 b8 reserved bit carry flag debug flag zero flag sign flag register bank select flag overflow flag interrupt enable flag stack pointer select flag reserved bit processor interrupt priority level the 4-high order bits of intb are intbh and the 16-low bits of intb are intbl. figure 2.1 cpu register
rev.1.20 jan 27, 2006 page 8 of 27 rej03b0069-0120 r8c/13 group 2. central processing unit (cpu) 2.2 address registers (a0 and a1) a0 is a 16-bit register for address register indirect addressing and address register relative addressing. they also are used for transfer, arithmetic and logic operations. the same applies to a1 as a0. a0 can be combined with a0 to be used as a 32-bit address register (a1a0). 2.3 frame base register (fb) fb is a 16-bit register for fb relative addressing. 2.4 interrupt table register (intb) intb is a 20-bit register indicates the start address of an interrupt vector table. 2.5 program counter (pc) pc, 20 bits wide, indicates the address of an instruction to be executed. 2.6 user stack pointer (usp) and interrupt stack pointer (isp) the stack pointer (sp), usp and isp, are 16 bits wide each. the u flag of flg is used to switch between usp and isp. 2.7 static base register (sb) sb is a 16-bit register for sb relative addressing. 2.8 flag register (flg) flg is a 11-bit register indicating the cpu state. 2.8.1 carry flag (c) the c flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic logic unit. 2.8.2 debug flag (d) the d flag is for debug only. set to 0 . 2.8.3 zero flag (z) the z flag is set to 1 when an arithmetic operation resulted in 0; otherwise, 0 . 2.8.4 sign flag (s) the s flag is set to 1 when an arithmetic operation resulted in a negative value; otherwise, 0 . 2.8.5 register bank select flag (b) the register bank 0 is selected when the b flag is 0 . the register bank 1 is selected when this flag is set to 1 . 2.8.6 overflow flag (o) the o flag is set to 1 when the operation resulted in an overflow; otherwise, 0 . 2.8.7 interrupt enable flag (i) the i flag enables a maskable interrupt. an interrupt is disabled when the i flag is set to 0 , and are enabled when the i flag is set to 1 . the i flag is set to 0 when an interrupt request is acknowledged. 2.8.8 stack pointer select flag (u) isp is selected when the u flag is set to 0 , usp is selected when the u flag is set to 1 . the u flag is set to 0 when a hardware interrupt request is acknowledged or the int instruction of software interrupt numbers 0 to 31 is executed. 2.8.9 processor interrupt priority level (ipl) ipl, 3 bits wide, assigns processor interrupt priority levels from level 0 to level 7. if a requested interrupt has greater priority than ipl, the interrupt is enabled. 2.8.10 reserved bit when write to this bit, set to 0 . when read, its content is indeterminate.
rev.1.20 jan 27, 2006 page 9 of 27 rej03b0069-0120 r8c/13 group 3. memory 3. memory figure 3.1 is a memory map of this mcu. this mcu provides 1-mbyte address space from addresses 00000 16 to fffff 16 . the internal rom (program rom) is allocated lower addresses beginning with address 0ffff 16 . for example, a 16-kbyte internal rom is allocated addresses from 0c000 16 to 0ffff 16 . the fixed interrupt vector table is allocated addresses 0ffdc 16 to 0ffff 16 . they store the starting address of each interrupt routine. the internal rom (data flash) is allocated addresses from 02000 16 to 02fff 16 . the internal ram is allocated higher addresses beginning with address 00400 16 . for example, a 1-kbyte internal ram is allocated addresses 00400 16 to 007ff 16 . the internal ram is used not only for storing data, but for calling subroutines and stacks when interrupt request is acknowledged. special function registers (sfr) are allocated addresses 00000 16 to 002ff 16 . the peripheral function control registers are located them. all addresses, which have nothing allocated within the sfr, are re- served area and cannot be accessed by users. figure 3.1 memory map 00000 16 0yyyy 16 0ffff 16 002ff 16 00400 16 internal rom (program rom) sfr (see chapter 4 for details.) 0ffdc 16 0ffff 16 undefined instruction overflow brk instruction address match single step watchdog timer,oscillation stop detection,voltage detection reset (reserved) type name 0xxxx 16 internal ram fffff 16 address 0xxxx 16 005ff 16 internal ram size 007ff 16 512 bytes 1k bytes 006ff 16 768 bytes address 0yyyy 16 0e000 16 internal rom size 0c000 16 8k bytes 16k bytes 0d000 16 12k bytes expansion area (reserved) r5f21134fp, r5f21134dfp r5f21133fp, r5f21133dfp r5f21132fp, R5F21132DFP 02000 16 02fff 16 internal rom (data flash) (1) notes: 1. the data flash block a (2k bytes) and block b (2k bytes) are shown. 2. blank spaces are reserved. no access is allowed.
rev.1.20 jan 27, 2006 page 10 of 27 rej03b0069-0120 r8c/13 group 4. special function register (sfr) w a t c h d o g t i m e r s t a r t r e g i s t e rw d t sx x 1 6 w a t c h d o g t i m e r c o n t r o l r e g i s t e rw d c0 0 0 1 1 1 1 1 2 processor mode register 0 pm0 00 16 s y s t e m c l o c k c o n t r o l r e g i s t e r 0c m 00 1 1 0 1 0 0 0 2 s y s t e m c l o c k c o n t r o l r e g i s t e r 1c m 10 0 1 0 0 0 0 0 2 a d d r e s s m a t c h i n t e r r u p t e n a b l e r e g i s t e ra i e rx x x x x x 0 0 2 p r o t e c t r e g i s t e rp r c r0 0 x x x 0 0 0 2 processor mode register 1 pm1 00 16 2 . s o f t w a r e r e s e t o r t h e w a t c h d o g t i m e r r e s e t d o e s n o t a f f e c t t h i s r e g i s t e r . 3 . o w i n g t o r e s e t i n p u t . 4 . i n t h e c a s e o f r e s e t p i n = h r e t a i n i n g . o s c i l l a t i o n s t o p d e t e c t i o n r e g i s t e ro c d0 0 0 0 0 1 0 0 2 int0 input filter select register int0f xxxxx000 2 0 0 0 0 1 6 0 0 0 1 1 6 0 0 0 2 1 6 0 0 0 3 1 6 0 0 0 4 1 6 0 0 0 5 1 6 0 0 0 6 1 6 0 0 0 7 1 6 0 0 0 8 1 6 0 0 0 9 1 6 0 0 0 a 1 6 0 0 0 b 1 6 0 0 0 c 1 6 0 0 0 d 1 6 0 0 0 e 1 6 0 0 0 f 1 6 0 0 1 0 1 6 0 0 1 1 1 6 0 0 1 2 1 6 0 0 1 3 1 6 0 0 1 4 1 6 0 0 1 5 1 6 0 0 1 6 1 6 0 0 1 7 1 6 0 0 1 8 1 6 0 0 1 9 1 6 0 0 1 a 1 6 0 0 1 b 1 6 0 0 1 c 1 6 0 0 1 d 1 6 0 0 1 e 1 6 0 0 1 f 1 6 0 0 2 0 1 6 0 0 2 1 1 6 0 0 2 2 1 6 0 0 2 3 1 6 0 0 2 4 1 6 0 0 2 5 1 6 0 0 2 6 1 6 0 0 2 7 1 6 0 0 2 8 1 6 0 0 2 9 1 6 0 0 2 a 1 6 0 0 2 b 1 6 0 0 2 c 1 6 0 0 2 d 1 6 0 0 2 e 1 6 0 0 2 f 1 6 0 0 3 0 1 6 0 0 3 1 1 6 0 0 3 2 1 6 0 0 3 3 1 6 0 0 3 4 1 6 0 0 3 5 1 6 0 0 3 6 1 6 0 0 3 7 1 6 0 0 3 8 1 6 0 0 3 9 1 6 0 0 3 a 1 6 0 0 3 b 1 6 0 0 3 c 1 6 0 0 3 d 1 6 0 0 3 e 1 6 0 0 3 f 1 6 a d d r e s s r e g i s t e rs y m b o l after reset a d d r e s s m a t c h i n t e r r u p t r e g i s t e r 0r m a d 00 0 1 6 0 0 1 6 x 0 1 6 a d d r e s s m a t c h i n t e r r u p t r e g i s t e r 1r m a d 10 0 1 6 0 0 1 6 x 0 1 6 w a t c h d o g t i m e r r e s e t r e g i s t e rw d t rx x 1 6 h i g h - s p e e d o n - c h i p o s c i l l a t o r c o n t r o l r e g i s t e r 0h r 00 0 1 6 h i g h - s p e e d o n - c h i p o s c i l l a t o r c o n t r o l r e g i s t e r 1h r 14 0 1 6 voltage detection register 1 vcr1 00001000 2 v o l t a g e d e t e c t i o n r e g i s t e r 2v c r 20 0 1 6 10 0 0 0 0 0 0 2 v o l t a g e d e t e c t i o n i n t e r r u p t r e g i s t e rd 4 i n t0 0 1 6 x : u n d e f i n e d n o t e s : 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . ( 1 ) ( 2 ) ( 2 ) ( 2 ) 01000001 2 ( 3 ) ( 4 ) ( 3 ) ( 4 ) 4. special function register (sfr) sfr(special function register) is the control register of peripheral functions. tables 4.1 to 4.4 list the sfr information table 4.1 sfr information(1) (1)
rev.1.20 jan 27, 2006 page 11 of 27 rej03b0069-0120 r8c/13 group 4. special function register (sfr) uart0 transmit interrupt control register s0tic xxxxx000 2 uart0 receive interrupt control register s0ric xxxxx000 2 uart1 transmit interrupt control register s1tic xxxxx000 2 uart1 receive interrupt control register s1ric xxxxx000 2 key input interrupt control register kupic xxxxx000 2 a d c o n v e r s i o n i n t e r r u p t c o n t r o l r e g i s t e ra d i cx x x x x 0 0 0 2 i n t 1 i n t e r r u p t c o n t r o l r e g i s t e ri n t 1 i cx x x x x 0 0 0 2 int2 interrupt control register int2ic xxxxx000 2 int0 interrupt control register int0ic xx00x000 2 i n t 3 i n t e r r u p t c o n t r o l r e g i s t e ri n t 3 i cx x x x x 0 0 0 2 0 0 4 0 1 6 0 0 4 1 1 6 0 0 4 2 1 6 0 0 4 3 1 6 0 0 4 4 1 6 0 0 4 5 1 6 0 0 4 6 1 6 0 0 4 7 1 6 0 0 4 8 1 6 0 0 4 9 1 6 0 0 4 a 1 6 0 0 4 b 1 6 0 0 4 c 1 6 0 0 4 d 1 6 0 0 4 e 1 6 0 0 4 f 1 6 0 0 5 0 1 6 0 0 5 1 1 6 0 0 5 2 1 6 0 0 5 3 1 6 0 0 5 4 1 6 0 0 5 5 1 6 0 0 5 6 1 6 0 0 5 7 1 6 0 0 5 8 1 6 0 0 5 9 1 6 0 0 5 a 1 6 0 0 5 b 1 6 0 0 5 c 1 6 0 0 5 d 1 6 0 0 5 e 1 6 0 0 5 f 1 6 0 0 6 0 1 6 0 0 6 1 1 6 0 0 6 2 1 6 0 0 6 3 1 6 0 0 6 4 1 6 0 0 6 5 1 6 0 0 6 6 1 6 0 0 6 7 1 6 0 0 6 8 1 6 0 0 6 9 1 6 0 0 6 a 1 6 0 0 6 b 1 6 0 0 6 c 1 6 0 0 6 d 1 6 0 0 6 e 1 6 0 0 6 f 1 6 0 0 7 0 1 6 0 0 7 1 1 6 0 0 7 2 1 6 0 0 7 3 1 6 0 0 7 4 1 6 0 0 7 5 1 6 0 0 7 6 1 6 0 0 7 7 1 6 0 0 7 8 1 6 0 0 7 9 1 6 0 0 7 a 1 6 0 0 7 b 1 6 0 0 7 c 1 6 0 0 7 d 1 6 0 0 7 e 1 6 0 0 7 f 1 6 a d d r e s s r e g i s t e r symbol a f t e r r e s e t timer x interrupt control register txic xxxxx000 2 timer y interrupt control register tyic xxxxx000 2 timer z interrupt control register tzic xxxxx000 2 timer c interrupt control register tcic xxxxx000 2 compare 1 interrupt control register cmp1ic xxxxx000 2 compare 0 interrupt control register cmp0ic xxxxx000 2 x : u n d e f i n e d n o t e s : 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . table 4.2 sfr information(2) (1)
rev.1.20 jan 27, 2006 page 12 of 27 rej03b0069-0120 r8c/13 group 4. special function register (sfr) 0 0 8 0 1 6 0 0 8 1 1 6 0 0 8 2 1 6 0 0 8 3 1 6 0 0 8 4 1 6 0 0 8 5 1 6 0 0 8 6 1 6 0 0 8 7 1 6 0 0 8 8 1 6 0 0 8 9 1 6 0 0 8 a 1 6 0 0 8 b 1 6 0 0 8 c 1 6 0 0 8 d 1 6 0 0 8 e 1 6 0 0 8 f 1 6 0 0 9 0 1 6 0 0 9 1 1 6 0 0 9 2 1 6 0 0 9 3 1 6 0 0 9 4 1 6 0 0 9 5 1 6 0 0 9 6 1 6 0 0 9 7 1 6 0 0 9 8 1 6 0 0 9 9 1 6 0 0 9 a 1 6 0 0 9 b 1 6 0 0 9 c 1 6 0 0 9 d 1 6 0 0 9 e 1 6 0 0 9 f 1 6 00a0 16 00a1 16 00a2 16 00a3 16 00a4 16 00a5 16 00a6 16 00a7 16 00a8 16 00a9 16 00aa 16 00ab 16 00ac 16 00ad 16 00ae 16 00af 16 00b0 16 00b1 16 00b2 16 00b3 16 00b4 16 00b5 16 00b6 16 00b7 16 00b8 16 00b9 16 00ba 16 00bb 16 00bc 16 00bd 16 00be 16 00bf 16 t i m e r x r e g i s t e rt xf f 1 6 t i m e r y s e c o n d a r y r e g i s t e rt y s cf f 1 6 external input enable register inten 00 16 p r e s c a l e r y r e g i s t e rp r e yf f 1 6 uart0 transmit/receive mode register u0mr 00 16 u a r t 0 t r a n s m i t b u f f e r r e g i s t e ru 0 t bx x 1 6 x x 1 6 uart0 receive buffer register u0rb xx 16 xx 16 u a r t 1 t r a n s m i t / r e c e i v e m o d e r e g i s t e r u 1 m r0 0 1 6 u a r t 1 t r a n s m i t b u f f e r r e g i s t e ru 1 t bx x 1 6 x x 1 6 u a r t 1 r e c e i v e b u f f e r r e g i s t e r u 1 r bx x 1 6 x x 1 6 u a r t 0 b i t r a t e r e g i s t e ru 0 b r gx x 1 6 u a r t 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0 u 0 c 00 0 0 0 1 0 0 0 2 u a r t 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1 u 0 c 10 0 0 0 0 0 1 0 2 u a r t 1 b i t r a t e r e g i s t e ru 1 b r gx x 1 6 u a r t 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0 u 1 c 00 0 0 0 1 0 0 0 2 u a r t 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1 u 1 c 10 0 0 0 0 0 1 0 2 u a r t t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 2 u c o n0 0 1 6 a d d r e s s r e g i s t e r symbol a f t e r r e s e t t i m e r y , z m o d e r e g i s t e rt y z m r0 0 1 6 t i m e r y p r i m a r y r e g i s t e rt y p rf f 1 6 t i m e r y , z w a v e f o r m o u t p u t c o n t r o l r e g i s t e rp u m0 0 1 6 p r e s c a l e r z r e g i s t e rp r e zf f 1 6 t i m e r z s e c o n d a r y r e g i s t e rt z s cf f 1 6 t i m e r z p r i m a r y r e g i s t e rt z p rf f 1 6 t i m e r y , z o u t p u t c o n t r o l r e g i s t e rt y z o c0 0 1 6 t i m e r x m o d e r e g i s t e rt x m r0 0 1 6 p r e s c a l e r x r e g i s t e rp r e xf f 1 6 c o u n t s o u r c e s e t r e g i s t e rt c s s0 0 1 6 t i m e r c r e g i s t e rt c0 0 1 6 0 0 1 6 k e y i n p u t e n a b l e r e g i s t e rk i e n0 0 1 6 timer c control register 0 tcc0 00 16 t i m e r c c o n t r o l r e g i s t e r 1t c c 10 0 1 6 capture, compare 0 register tm0 00 16 00 16 compare 1 register tm1 ff 16 ff 16 x : u n d e f i n e d n o t e s : 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . 2 . w h e n o u t p u t c o m p a r e m o d e ( t h e t c c 1 3 b i t i n t h e t c c 1 r e g i s t e r = 1 ) i s s e l e c t e d, t h e v a l u e a f t e r r e s e t i s s e t t o f f f f 1 6 . ( 2 ) table 4.3 sfr information(3) (1)
rev.1.20 jan 27, 2006 page 13 of 27 rej03b0069-0120 r8c/13 group 4. special function register (sfr) 0 0 c 0 1 6 0 0 c 1 1 6 0 0 c 2 1 6 0 0 c 3 1 6 0 0 c 4 1 6 0 0 c 5 1 6 0 0 c 6 1 6 0 0 c 7 1 6 0 0 c 8 1 6 0 0 c 9 1 6 0 0 c a 1 6 0 0 c b 1 6 0 0 c c 1 6 0 0 c d 1 6 0 0 c e 1 6 0 0 c f 1 6 0 0 d 0 1 6 0 0 d 1 1 6 0 0 d 2 1 6 0 0 d 3 1 6 0 0 d 4 1 6 0 0 d 5 1 6 0 0 d 6 1 6 0 0 d 7 1 6 0 0 d 8 1 6 0 0 d 9 1 6 0 0 d a 1 6 0 0 d b 1 6 0 0 d c 1 6 0 0 d d 1 6 0 0 d e 1 6 0 0 d f 1 6 0 0 e 0 1 6 0 0 e 1 1 6 0 0 e 2 1 6 0 0 e 3 1 6 0 0 e 4 1 6 0 0 e 5 1 6 0 0 e 6 1 6 0 0 e 7 1 6 0 0 e 8 1 6 0 0 e 9 1 6 0 0 e a 1 6 0 0 e b 1 6 0 0 e c 1 6 0 0 e d 1 6 0 0 e e 1 6 0 0 e f 1 6 0 0 f 0 1 6 0 0 f 1 1 6 0 0 f 2 1 6 0 0 f 3 1 6 0 0 f 4 1 6 0 0 f 5 1 6 0 0 f 6 1 6 0 0 f 7 1 6 0 0 f 8 1 6 0 0 f 9 1 6 0 3 f a 1 6 0 0 f b 1 6 0 0 f c 1 6 0 0 f d 1 6 0 0 f e 1 6 0 0 f f 1 6 0 1 b 3 1 6 0 1 b 4 1 6 0 1 b 5 1 6 0 1 b 6 1 6 0 1 b 7 1 6 a d r e g i s t e ra dx x 1 6 x x 1 6 a d c o n t r o l r e g i s t e r 0a d c o n 00 0 0 0 0 x x x 2 a d c o n t r o l r e g i s t e r 2a d c o n 20 0 1 6 a d c o n t r o l r e g i s t e r 1 a d c o n 10 0 1 6 p o r t p 0 r e g i s t e rp 0x x 1 6 p o r t p 0 d i r e c t i o n r e g i s t e rp d 00 0 1 6 p o r t p 1 r e g i s t e rp 1x x 1 6 p o r t p 1 d i r e c t i o n r e g i s t e rp d 10 0 1 6 p o r t p 3 r e g i s t e rp 3x x 1 6 p o r t p 3 d i r e c t i o n r e g i s t e rp d 30 0 1 6 p o r t p 4 r e g i s t e rp 4x x 1 6 p o r t p 4 d i r e c t i o n r e g i s t e rp d 40 0 1 6 p u l l - u p c o n t r o l r e g i s t e r 0 p u r 00 0 x x 0 0 0 0 2 p o r t p 1 d r i ve c a p a c i t y c o n t r o l r e g i s t e r d r r0 0 1 6 r e g i s t e r s y m b o la f t e r r e s e t a d d r e s s p u l l - u p c o n t r o l r e g i s t e r 1 p u r 1x x x x x x 0 x 2 f l a s h m e m o r y c o n t r o l r e g i s t e r 1 f m r 11 0 0 0 0 0 0 x 2 f l a s h m e m o r y c o n t r o l r e g i s t e r 0 f m r 00 0 0 0 0 0 0 1 2 t i m e r c o u t p u t c o n t r o l r e g i s t e r t c o u t0 0 1 6 f l a s h m e m o r y c o n t r o l r e g i s t e r 4 f m r 40 1 0 0 0 0 0 0 2 0 f f f f 1 6 o p t i o n f u n c t i o n s e l e c t r e g i s t e r o f s x : u n d e f i n e d n o t e s : 1 . b l a n k c o l u m n s , 0 1 0 0 1 6 t o 0 1 b 2 1 6 a n d 0 1 b 8 1 6 t o 0 2 f f 1 6 a r e a l l r e s e r v e d . n o a c c e s s i s a l l o w e d . 2 . t h e w a t c h d o g t i m e r c o n t r o l b i t i s a s s i g n e d . r e f e r t o " f i g u r e 1 1 . 2 o f s , w d c , w d t r a n d w d t s r e g i s t e r s " o f h a r d w a r e m a n u a l f o r d e t a i l s (2) ( n o t e 2 ) table 4.4 sfr information(4) (1)
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 14 of 27 rej03b0069-0120 5. electrical characteristics operating ambient temperature parameter unit supply voltage output voltage v o p d power dissipation storage temperature rated value v v condition v cc t stg t opr symbol mw v cc =av cc v av cc v -0.3 to 6.5 -65 to 150 300 -20 to 85 / -40 to 85 (d version) c topr=25 c analog supply voltage v cc =av cc -0.3 to 6.5 v i input voltage -0.3 to v cc +0.3 -0.3 to v cc +0.3 c table 5.1 absolute maximum ratings table 5.2 recommended operating conditions 2 . 75.5 t y p .m a x . u n i t p a r a m e t e r v c c s u p p l y v o l t a g e symbol m i n . s t a n d a r d a n a l o g s u p p l y v o l t a g e v c c (3 ) a v c c v v 0 0 a n a l o g s u p p l y v o l t a g e s u p p l y v o l t a g e v i h v s s a v s s 0 . 8 v c c v v v c c 0 . 2 v c c " l " i n p u t v o l t a g e " h " i n p u t v o l t a g e v f (x in ) m a i n c l o c k i n p u t o s c i l l a t i o n f r e q u e n c y v v i l 10 3.0v vcc 5.5v 2.7v vcc < 3.0v mhz mhz notes: 1. v cc = av cc = 2.7 to 5.5v at topr = -20 to 85 c / -40 to 85 c, unless otherwise specified. 2. the typical values when average output current is 100ms. 3. hold vcc=avcc. 0 i o h ( s u m ) " h " p e a k a l l o u t p u t c u r r e n t s conditions s u m o f a l l p i n s ' i o h ( p e a k ) - 6 0 . 0 ma i oh (peak) "h" peak output current - 1 0 . 0 ma i oh (avg) " h " a v e r a g e o u t p u t c u r r e n t - 5 . 0m a i o l ( s u m ) "l" peak all output currents sum of all pins' iol (peak) 60 ma i ol (peak) "l" peak output current except p1 0 to p1 7 p1 0 to p1 7 10 m a drive ability high d r i v e a b i l i t y l o w 3 0 10 m a m a i ol (avg) "l" average output current except p1 0 to p1 7 p1 0 to p1 7 d r i v e a b i l i t y h i g h drive ability low 5 15 5 ma m a ma 0 0 20
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 15 of 27 rej03b0069-0120 table 5.3 a/d conversion characteristics s t a n d a r d m i n .t y p .m a x . r e s o l u t i o n b i t v ref =v cc 1 0 symbol parameter measuring condition unit lsb 3 r l a d d e r t c o n v l a d d e r r e s i s t a n c e conversion time r e f e r e n c e v o l t a g e a n a l o g i n p u t v o l t a g e v v i a v r e f 0v r e f n o t e s : 1 . v c c = a v c c = 2 . 7 t o 5 . 5 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , u n l e s s o t h e r w i s e s p e c i f i e d . 2 . i f f a d e x c e e d s 1 0 m h z m o r e , d i v i d e t h e f a d a n d h o l d a / d o p e r a t i n g c l o c k f r e q u e n c y ( a d ) 1 0 m h z o r b e l o w . 3 . i f t h e a v c c i s l e s s t h a n 4 . 2 v , d i v i d e t h e f a d a n d h o l d a / d o p e r a t i n g c l o c k f r e q u e n c y ( a d ) f a d / 2 o r b e l o w . 4 . h o l d v c c = v r e f . a d = 1 0 m h z , v r e f = v c c = 5 . 0 v v r e f = v c c a b s o l u t e a c c u r a c y 1 0 b i t m o d e 8 b i t m o d e a d = 1 0 m h z , v r e f = v c c = 5 . 0 v 2 l s b 1 0 b i t m o d e 8 b i t m o d e a d = 1 0 m h z , v r e f = v c c = 3 . 3 v (3 ) 5l s b a d = 1 0 m h z , v r e f = v c c = 3 . 3 v ( 3 ) 2l s b 10 40 k ? 10 bit mode 8 b i t m o d e a d = 1 0 m h z , v r e f = v c c = 5 . 0 v a d = 1 0 m h z , v r e f = v c c = 5 . 0 v 3.3 2.8 s s v a / d o p e r a t i n g c l o c k f r e q u e n c y (2 ) w i t h o u t s a m p l e & h o l d with sample & hold 0 . 2 5 1 0 m h z 1.0 1 0 mhz v c c ( 4 ) figure 5.1 port p0 to p4 measurement circuit p0 p1 p2 p3 p4 30pf
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 16 of 27 rej03b0069-0120 table 5.4 flash memory (program rom) electrical characteristics byte program time b l o c k e r a s e t i m e p r o g r a m , e r a s e v o l t a g e r e a d v o l t a g e 5 0 0 . 4 s p a r a m e t e r standard min. t y p .m a x u n i t measuring condition s y m b o l p r o g r a m , e r a s e t e m p e r a t u r e 2 . 7 2 . 7 0 5 . 5 5 . 5 60 s v v c p r o g r a m / e r a s e e n d u r a n c e (2 ) 1000 (3) ti m e s t i m e d e l a y f r o m s u s p e n d r e q u e s t u n t i l e r a s e s u s p e n d 8 m s t d ( s r - e s ) d a t a h o l d t i m e ( 7 ) ambient temperature = 55 c y e a r 20 e r a s e s u s p e n d r e q u e s t i n t e r v a l 10 m s n o t e s : 1 . r e f e r e n c e d t o v c c = a v c c = 2 . 7 t o 5 . 5 v a t t o p r = 0 c t o 6 0 c u n l e s s o t h e r w i s e s p e c i f i e d . 2 . d e f i n i t i o n o f p r o g r a m / e r a s e t h e e n d u r a n c e o f p r o g r a m / e r a s e s h o w s a t i m e f o r e a c h b l o c k . i f t h e p r o g r a m / e r a s e n u m b e r i s n ( n = 1 0 0 0 , 1 0 0 0 0 ) , n t i m e s e r a s e c a n b e p e r f o r m e d f o r e a c h b l o c k . f o r e x a m p l e , i f p e r f o r m i n g o n e - b y t e w r i t e t o t h e d i s t i n c t a d d r e s s e s o n b l o c k a o f 2 k - b y t e b l o c k 2 0 4 8 t i m e s a n d t h e n e r a s i n g t h a t b l o c k , t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s i s o n e t i m e . h o w e v e r , p e r f o r m i n g m u l t i p l e w r i t e s t o t h e s a m e a d d r e s s b e f o r e a n e r a s e o p e r a t i o n i s p r o h i b i t e d ( o v e r w r i t i n g p r o h i b i t e d ) . 3 . n u m b e r s o f p r o g r a m / e r a s e c y c l e s f o r w h i c h a l l e l e c t r i c a l c h a r a c t e r i s t i c s i s g u a r a n t e e d . 4 . t o r e d u c e t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s , a b l o c k e r a s e s h o u l d i d e a l l y b e p e r f o r m e d a f t e r w r i t i n g i n s e r i e s a s m a n y d i s t i n c t a d d r e s s e s ( o n l y o n e t i m e e a c h ) a s p o s s i b l e . i f p r o g r a m m i n g a s e t o f 1 6 b y t e s , w r i t e u p t o 1 2 8 s e t s a n d t h e n e r a s e t h e m o n e t i m e . t h i s w i l l r e s u l t i n i d e a l l y r e d u c i n g t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s . a d d i t i o n a l l y , a v e r a g i n g t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s f o r b l o c k a a n d b w i l l b e m o r e e f f e c t i v e . i t i s i m p o r t a n t t o t r a c k t h e t o t a l n u m b e r o f b l o c k e r a s e s a n d r e s t r i c t t h e n u m b e r . 5 . i f e r r o r o c c u r s d u r i n g b l o c k e r a s e , a t t e m p t t o e x e c u t e t h e c l e a r s t a t u s r e g i s t e r c o m m a n d , t h e n t h e b l o c k e r a s e c o m m a n d a t l e a s t t h r e e t i m e s u n t i l t h e e r a s e e r r o r d i s a p p e a r s . 6 . c u s t o m e r s d e s i r i n g p r o g r a m / e r a s e f a i l u r e r a t e i n f o r m a t i o n s h o u l d c o n t a c t t h e i r r e n e s a s t e c h n i c a l s u p p o r t r e p r e s e n t a - t i v e . 7 . t h e d a t a h o l d t i m e i n c l u d e s t i m e t h a t t h e p o w e r s u p p l y i s o f f o r t h e c l o c k i s n o t s u p p l i e d .
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 17 of 27 rej03b0069-0120 table 5.5 flash memory (data flash block a, block b) electrical characteristics (4) b y t e p r o g r a m t i m e ( p r o g r a m / e r a s e e n d u r a n c e 1 0 0 0 t i m e s ) p r o g r a m , e r a s e v o l t a g e r e a d v o l t a g e 65 0.3 s p a r a m e t e r s t a n d a r d m i n .t y p .m a x u n i t n o t e s : 1 . r e f e r e n c e d t o v c c = a v c c = 2 . 7 t o 5 . 5 v a t t o p r = - 2 0 c t o 8 5 c / - 4 0 c t o 8 5 c u n l e s s o t h e r w i s e s p e c i f i e d . 2 . d e f i n i t i o n o f p r o g r a m / e r a s e t h e e n d u r a n c e o f p r o g r a m / e r a s e s h o w s a t i m e f o r e a c h b l o c k . i f t h e p r o g r a m / e r a s e n u m b e r i s n ( n = 1 0 0 0 , 1 0 0 0 0 ) , n t i m e s e r a s e c a n b e p e r f o r m e d f o r e a c h b l o c k . f o r e x a m p l e , i f p e r f o r m i n g o n e - b y t e w r i t e t o t h e d i s t i n c t a d d r e s s e s o n b l o c k a o f 2 k - b y t e b l o c k 2 0 4 8 t i m e s a n d t h e n e r a s i n g t h a t b l o c k , t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s i s o n e t i m e . h o w e v e r , p e r f o r m i n g m u l t i p l e w r i t e s t o t h e s a m e a d d r e s s b e f o r e a n e r a s e o p e r a t i o n i s p r o h i b i t e d ( o v e r w r i t i n g p r o h i b i t e d ) . 3 . n u m b e r s o f p r o g r a m / e r a s e c y c l e s f o r w h i c h a l l e l e c t r i c a l c h a r a c t e r i s t i c s i s g u a r a n t e e d . 4 . t a b l e 5 . 5 a p p l i e s f o r b l o c k a o r b w h e n t h e p r o g r a m / e r a s e c y c l e s a r e m o r e t h a n 1 0 0 0 . t h e b y t e p r o g r a m t i m e u p t o 1 0 0 0 c y c l e s a r e t h e s a m e a s t h a t o f t h e p r o g r a m a r e a ( s e e t a b l e 5 . 4 ) . 5 . t o r e d u c e t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s , a b l o c k e r a s e s h o u l d i d e a l l y b e p e r f o r m e d a f t e r w r i t i n g i n s e r i e s a s m a n y d i s t i n c t a d d r e s s e s ( o n l y o n e t i m e e a c h ) a s p o s s i b l e . i f p r o g r a m m i n g a s e t o f 1 6 b y t e s , w r i t e u p t o 1 2 8 s e t s a n d t h e n e r a s e t h e m o n e t i m e . t h i s w i l l r e s u l t i n i d e a l l y r e d u c i n g t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s . a d d i t i o n a l l y , a v e r a g i n g t h e n u m b e r o f p r o g r a m / e r a s e c y c l e s f o r b l o c k a a n d b w i l l b e m o r e e f f e c t i v e . i t i s i m p o r t a n t t o t r a c k t h e t o t a l n u m b e r o f b l o c k e r a s e s a n d r e s t r i c t t h e n u m b e r . 6 . i f e r r o r o c c u r s d u r i n g b l o c k e r a s e , a t t e m p t t o e x e c u t e t h e c l e a r s t a t u s r e g i s t e r c o m m a n d , t h e n t h e b l o c k e r a s e c o m m a n d a t l e a s t t h r e e t i m e s u n t i l t h e e r a s e e r r o r d i s a p p e a r s . 7 . c u s t o m e r s d e s i r i n g p r o g r a m / e r a s e f a i l u r e r a t e i n f o r m a t i o n s h o u l d c o n t a c t t h e i r r e n e s a s t e c h n i c a l s u p p o r t r e p r e s e n t a - t i v e . 8 . - 4 0 c f o r d v e r s i o n . 9 . t h e d a t a h o l d t i m e i n c l u d e s t i m e t h a t t h e p o w e r s u p p l y i s o f f o r t h e c l o c k i s n o t s u p p l i e d . m e a s u r i n g c o n d i t i o n symbol p r o g r a m / e r a s e t e m p e r a t u r e 2.7 2.7 - 2 0 ( - 4 0 ) (8 ) 5 . 5 5 . 5 8 5 s v v c p r o g r a m / e r a s e e n d u r a n c e (2 ) 1 0 0 0 0 (3 ) t i m e s t i m e d e l a y f r o m s u s p e n d r e q u e s t u n t i l e r a s e s u s p e n d m s t d ( s r - e s ) b y t e p r o g r a m t i m e ( p r o g r a m / e r a s e e n d u r a n c e >1 0 0 0 t i m e s ) b l o c k e r a s e t i m e ( p r o g r a m / e r a s e e n d u r a n c e 1 0 0 0 t i m e s ) b l o c k e r a s e t i m e ( p r o g r a m / e r a s e e n d u r a n c e > 1 0 0 0 t i m e s ) d a t a h o l d t i m e ( 9 ) a m b i e n t t e m p e r a t u r e = 5 5 c 50 0.2 4 0 0 9 8 2 0 s s y e a r e r a s e s u s p e n d r e q u e s t i n t e r v a l 10 m s fmr46 erase-suspend request (interrupt request) t d(sr-es) figure 5.2 time delay from suspend request until erase suspend
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 18 of 27 rej03b0069-0120 table 5.7 reset circuit electrical characteristics (when using hardware reset 2 (1, 3) ) s y m b o l standard t y p . u n i t measuring condition m i n .m a x . p a r a m e t e r v p o r 2 p o w e r - o n r e s e t v a l i d v o l t a g e v v d e t n o t e s : 1 . t h e v o l t a g e d e t e c t i o n c i r c u i t w h i c h i s e m b e d d e d i n a m i c r o c o m p u t e r i s a f a c t o r t o g e n e r a t e t h e h a r d w a r e r e s e t 2 . r e f e r t o 5 . 1 . 2 h a r d w a r e r e s e t 2 o f h a r d w a r e m a n u a l f o r d e t a i l s . 2 . t h i s c o n d i t i o n i s n o t a p p l i c a b l e w h e n u s i n g v c c 1 . 0 v . 3 . w h e n t u r n i n g p o w e r o n a f t e r t h e e x t e r n a l p o w e r h a s b e e n h e l d b e l o w t h e v a l i d v o l t a g e ( v p o r 1 ) f o r g r e a t e r t h a n 1 0 s e c o n d s , r e f e r t o t a b l e 5 . 8 r e s e t c i r c u i t e l e c t r i c a l c h a r a c t e r i s t i c s ( w h e n n o t u s i n g h a r d w a r e r e s e t 2 ) . 4 . t w ( p o r 2 ) i s t i m e t o h o l d t h e e x t e r n a l p o w e r b e l o w e f f e c t i v e v o l t a g e ( v p o r 2 ) . s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d (2 ) t w ( v p o r 2 - v d e t ) m s 1 0 0 2 0 c t o p r < 8 5 c 2 0 c t o p r < 8 5 c , t w ( p o r 2 ) 0 s (4 ) figure 5.3 reset circuit electrical characteristics table 5.8 reset circuit electrical characteristics (when not using hardware reset 2) v por1 v cc min v det (3) v det (3) t w(por1) t w(vpor1 vdet) sampling time (1,2) internal reset signal ( l effective) f ring-s 1 x 32 f ring-s 1 x 32 v por2 notes: 1. hold the voltage of the microcomputer operation voltage range (vccmin or above) within sampling time. 2. a sampling clock is selectable. refer to 5.4 voltage detection circuit of hardware manual for details. 3. v det shows the voltage detection level of the voltage detection circuit. refer to 5.4 voltage detection circuit of hardware manual for details. t w(por2) t w(vpor2 vdet) table 5.6 voltage detection circuit electrical characteristics symbol standard typ. unit measuring condition min. max. parameter vdet voltage detection level v 3.8 4.3 notes: 1. the measuring condition is vcc=avcc=2.7v to 5.5v and topr=-40 c to 85 c. 2. this shows the time until the voltage detection interrupt request is generated since the voltage passes vdet. 3. this shows the required time until the voltage detection circuit operates when setting to "1" again after setting the vc27 bit in the vcr2 register to 0 . voltage detection interrupt request generating time ( 2) 40 na voltage detection circuit self consumption current waiting time until voltage detection circuit operation starts ( 3) td(e-a) vc27=1, vcc=5.0v 3.3 20 600 s s vccmin microcomputer operation voltage minimum value 2.7 v symbol s t a n d a r d t y p . u n i t m e a s u r i n g c o n d i t i o n min. m a x . parameter 0 . 1 n o t e s : 1 . w h e n n o t u s i n g h a r d w a r e r e s e t 2 , u s e w i t h v c c 2 . 7 v . 2 . t w ( p o r 1 ) i s t i m e t o h o l d t h e e x t e r n a l p o w e r b e l o w e f f e c t i v e v o l t a g e ( v p o r 1 ) . 100 1 tw(vpor1- vdet) s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d 0 . 5 tw(vpor1- vdet) supply voltage rising time when power-on reset is canceled tw(vpor1- vdet) supply voltage rising time when power-on reset is canceled v v p o r 1 p o w e r - o n r e s e t v a l i d v o l t a g e ms ms ms tw(vpor1- vdet) supply voltage rising time when power-on reset is canceled 100 ms 0 c topr 85 c, t w (por1) 10s (2) 2 0 c t o p r < 0 c , t w ( p o r 1 ) 1 0 s (2 ) 0 c topr 85 c, t w (por1) 1s (2) 2 0 c t o p r < 8 5 c 20 c topr < 0 c, t w (por1) 30s (2)
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 19 of 27 rej03b0069-0120 table 5.11 electrical characteristics (1) [vcc=5v] s y m b o l v o h v o l " l " o u t p u t v o l t a g e " h " o u t p u t v o l t a g e s t a n d a r d typ. unit measuring condition v v v min. max. v cc - 2.0 p a r a m e t e r i o h = - 5m a v h y s t e r e s i s "h" input current i i h " l " i n p u t c u r r e n t i i l v r a m r a m r e t e n t i o n v o l t a g e v t + - v t - 0 . 2 v a at stop mode 2 . 0 v i = 5 v v i = 0 v r f x i n f e e d b a c k r e s i s t a n c e x i n m ? r p u l l u p p u l l - u p r e s i s t a n c e 1 6 7 k ? 3 0 12 5 n o t e s : 1 . r e f e r e n c e d t o v c c = a v c c = 4 . 2 t o 5 . 5 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 2 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . v cc except x out x out i oh = - 200a d r i v e c a p a c i t y h i g h drive capacity low v c c - 0 . 3 v c c v i oh = - 1 ma v c c - 2 . 0 v cc - 2.0 i oh = - 500a v v v cc v c c e x c e p t p 1 0 t o p 1 7 , x o u t p1 0 to p1 7 x o u t drive capacity high d r i v e c a p a c i t y l o w i ol = 5 ma i ol = 200 a i o l = 1 5 m a i ol = 5 ma 2 . 0 0.45 v 2 . 0 2.0 v drive capacity high drive capacity low i ol = 1 ma i ol =500 a 2 . 0 2 . 0 v r e s e t 0.2 1. 0 2.2 v 5. 0 - 5.0 a v i =0v 50 1.0 f r i n g - s l o w - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 40 2 5 0 k h z int 0 , int 1 , int 2 , int 3 , ki 0 , ki 1 , ki 2 , ki 3 , cntro, cntr 1 , tc in , rxd 0 , rxd 1 , p4 5 drive capacity low i ol = 200 a 0.45 v v s y m b o l s t a n d a r d t y p . u n i t m e a s u r i n g c o n d i t i o n min. m a x . p a r a m e t e r h i g h - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 1 / { t d ( h r o f f s e t ) + t d ( h r ) } w h e n t h e r e s e t i s r e l e a s e d n o t e s : 1 . t h e m e a s u r i n g c o n d i t i o n i s v c c = a v c c = 5 . 0 v a n d t o p r = 2 5 c . h i g h - s p e e d o n - c h i p o s c i l l a t o r p e r i o d a d j u s t e d u n i t m h z n s v c c = 5 . 0 v , t o p r = 2 5 c s e t " 0 0 1 6 " i n t h e h r 1 r e g i s t e r 8 6 1 differences when setting "01 16 " and "00 16 " in the hr register s e t t a b l e h i g h - s p e e d o n - c h i p o s c i l l a t o r m i n i m u m p e r i o d high-speed on-chip oscillator frequency temperature dependence(1) t d ( h r o f f s e t ) td(hr) v c c = 5 . 0 v , t o p r = 2 5 c s e t " 4 0 1 6 " i n t h e h r 1 r e g i s t e r 1 n s f r e q u e n c y f l u c t u a t i o n i n t e m p e r a t u r e r a n g e o f - 1 0 c t o 5 0 c 5 % % h i g h - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y t e m p e r a t u r e d e p e n d e n c e ( 2 ) f r e q u e n c y f l u c t u a t i o n i n t e m p e r a t u r e r a n g e o f - 4 0 c t o 8 5 c 1 0 table 5.9 high-speed on-chip oscillator circuit electrical characteristics symbol standard typ. unit measuring condition min. max. parameter 2000 notes: 1. the measuring condition is vcc=avcc=2.7 to 5.5 v and topr=25 c. 2. this shows the wait time until the internal power supply generating circuit is stabilized during power-on. 3. this shows the time until bclk starts from the interrupt acknowledgement to cancel stop mode. 150 td(r-s) stop release time ( 3) s td(p-r) time for internal power supply stabilization during powering-on ( 2) s 1 table 5.10 power circuit timing characteristics
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 20 of 27 rej03b0069-0120 s y m b o l standard t y p . u n i t m e a s u r i n g c o n d i t i o n min. m a x . p a r a m e t e r n o di v i s i on m a i n s i n g l e - c h i p m o d e , t h e o u t p u t p i n s a r e o p e n a n d o t h e r p i n s a r e v s s 91 5 x in =20 mh z ( square wave ) m a high-speed mode i c c p o w e r s u p p l y c u r r e n t ( v c c =3 . 3 t o 5 . 5 v ) 4 7 0 n o t e s : 1 . t i m e r y i s o p e r a t e d w i t h t i m e r m o d e . 2. r e f e r e n c e d t o v c c = a v c c = 4 . 2 t o 5 . 5 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 2 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . wait mode a m a medium-speed mode high-speed on-chip oscillator mode l o w - s p e e d o n - c h i p o s c i l l a t o r m o d e h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z x in =16 mh z ( square wave ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o di v i s i on 8 x i n = 2 0 m h z ( s q u a r e w a v e ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l ow-spee d on-c hi p osc ill ator on=125 kh z d i v i s i o n b y 8 4 x in =16 mh z ( square wave ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 3 m a m a i n c l o c k o f f h i g h - s p e e d o n - c h i p o s c i l l a t o r o n = 8 m h z l ow-spee d on-c hi p osc ill ator on=125 kh z n o di v i s i on 48 m a m a i n c l oc k o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 ma 1.5 m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z d i v i s i o n b y 8 m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d ( 1 ) p er i p h era l c l oc k operat i on 40 hi g h -spee d on-c hi p osc ill ator on=8 mh z m a x in =10 mh z ( square wave ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o di v i s i on 5 x i n = 1 0 m h z ( s q u a r e w a v e ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 2 m a 1 4 900 8 0 p e r i p h e r a l c l o c k o f f a s t o p m o d e m a i n c l o c k o f f , t o p r = - 2 5 c hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator o ff cm 10="1" p er i p h era l c l oc k o ff 0.8 3.0 v c 2 7 = " 0 " a w a i t m o d e m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z when a wait instruction is executed (1) 38 76 v c 2 7 = " 0 " v c 2 7 = " 0 " a table 5.12 electrical characteristics (2) [vcc=5v]
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 21 of 27 rej03b0069-0120 timing requirements [v cc =5v] (unless otherwise noted: v cc = 5v, v ss = 0v at topr = 25 ?) table 5.13 x in input ________ table 5.14 cntr0 input, cntr1 input, int2 input ________ table 5.15 tcin input, int3 input symbol t c (x in ) t wh (x in ) t wl (x in ) parameter x in input cycle time x in input high pulse width x in input low pulse width min. 50 25 25 max. unit ns ns ns standard symbol t c ( cntr0 ) t wh ( cntr0 ) t wl ( cntr0 ) parameter cntr0 input cycle time cntr0 input high pulse width cntr0 input low pulse width min. 100 40 40 max. unit ns ns ns standard symbol t c ( tcin ) t wh ( tcin ) t wl ( tcin ) parameter tcin input cycle time tcin input high pulse width tcin input low pulse width min. 400 (1) 200 (2) 200 (2) max. unit ns ns ns standard notes: 1. when using the timer c input capture mode, adjust the cycle time above ( 1/ timer c count source frequency x 3). 2. when using the timer c input capture mode, adjust the pulse width above ( 1/ timer c count source frequency x 1.5). notes: ________ ________ 1. when selecting the digital filter by the int0 input filter select bit, use the int0 input high pulse width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. ________ ________ 2. when selecting the digital filter by the int0 input filter select bit, use the int0 input low pusle width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. table 5.5 serial interface ________ table 5.17 external interrupt int0 input symbol t c ( ck ) t w ( ckh ) t w ( ckl ) t d ( c-q ) t h ( c-q ) t su ( d-c ) t h ( c-d ) parameter clki input cycle time clki input high pulse width clki input low pulse width txdi output delay time txdi hold time rxdi input setup time rxdi input hold time min. 200 100 100 0 35 90 max. unit ns ns ns ns ns ns ns standard 80 symbol t w ( inh ) t w ( inl ) parameter ________ int0 input high pulse width ________ int0 input low pulse width min. 250 (1) 250 (2) max. unit ns ns standard
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 22 of 27 rej03b0069-0120 figure 5.4 vcc=5v timing diagram clk i txd i rxd i int i t w(ckh) t c(ck) t w(ckl) t h(c-q) t h(c-d) t su(d-c) t d(c-q) t w(inl) t w(inh) x in input t wh(xin) t c(xin) t wl(xin) tcin input t wh(tcin) t c(tcin) t wl(tcin) cntr0 input t wh(cntr0) t c(cntr0) t wl(cntr0) v cc = 5v
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 23 of 27 rej03b0069-0120 s y m b o l v o h v o l " l " o u t p u t v o l t a g e " h " o u t p u t v o l t a g e s t a n d a r d t y p . u n i t measuring condition v v v m i n .m a x . v c c - 0 . 5 p a r a m e t e r i oh = - 1ma v h y s t e r e s i s " h " i n p u t c u r r e n t i i h " l " i n p u t c u r r e n t i i l v r a m r a m r e t e n t i o n v o l t a g e v t + - v t - 0.2 v a at stop mode 2 . 0 v i = 3 v r f x i n f e e d b a c k r e s i s t a n c e x i n m ? r p u l l u p p u l l - u p r e s i s t a n c e k ? 66 125 n o t e s : 1 . r e f e r e n c e d t o v c c = a v c c = 2 . 7 t o 3 . 3 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 1 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . v cc e x c e p t x o u t x o u t drive capacity high drive capacity low i o h = - 0 . 1 m av c c - 0 . 5 v c c - 0 . 5 i o h = - 50 a v v v cc v cc except p1 0 to p1 7 , x out p 1 0 t o p 1 7 x o u t drive capacity high drive capacity low i ol = 1 ma i o l = 2 m a i o l = 1 m a 0 . 5 v 0 . 5 0 . 5 v drive capacity high drive capacity low i o l = 0 . 1 m a i o l = 5 0 a 0 . 5 0 . 5 v r e s e t 0.2 0 . 8 1 . 8 v 4. 0 - 4. 0 a v i =0v 160 3. 0 f r i n g - s l o w - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 40 2 5 0 khz v i =0v 5 0 0 i n t o , i n t 1 , i n t 2 , i n t 3 , k i 0 , k i 1 , k i 2 , k i 3 , c n t r 0 , c n t r 1 , t c i n , r x d 0 , r x d 1 , p 4 5 table 5.18 electrical characteristics (3) [vcc=3v]
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 24 of 27 rej03b0069-0120 table 5.19 electrical characteristics (4) [vcc=3v] s y m b o l s t a n d a r d t y p . u n i t m e a s u r i n g c o n d i t i o n m i n .m a x . parameter n o d i v i s i o n m a i n s i n g l e - c h i p m o d e , t h e o u t p u t p i n s a r e o p e n a n d o t h e r p i n s a r e v s s 81 3 x in =20 mh z ( square wave ) m a high-speed mode i c c p o w e r s u p p l y c u r r e n t ( v c c = 2 . 7 t o 3 . 3 v ) 4 2 0 n o t e s : 1 . t i m e r y i s o p e r a t e d w i t h t i m e r m o d e . 2. r e f e r e n c e d t o v c c = a v c c = 2 . 7 t o 3 . 3 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 1 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . w a i t m o d e a m a m e d i u m - s p e e d m o d e h i g h - s p e e d o n - c h i p o s c i l l a t o r m o d e l o w - s p e e d o n - c h i p o s c i l l a t o r m o d e hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z x i n = 1 6 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z n o d i v i s i o n 7 x i n = 2 0 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 3 x i n = 1 6 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 2 . 5 m a m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator on=8 mh z l ow-spee d on-c hi p osc ill ator on=125 kh z n o di v i s i on 3 . 5 7 . 5 m a m a i n c l o c k o f f l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 m a 1.5 m a i n c l o c k o f f h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d (1 ) p e r i p h e r a l c l o c k o p e r a t i o n 37 hi g h -spee d on-c hi p osc ill ator on=8 mh z m a x i n = 1 0 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z n o d i v i s i o n 5 x i n = 1 0 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 1 . 6 m a 1 2 800 7 4 a w a i t m o d e m a i n c l oc k o ff hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z when a wait instruction is executed (1) p er i p h era l c l oc k o ff a stop mode m a i n c l o c k o f f , t o p r = - 2 5 c hi g h -spee d on-c hi p osc ill ator o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o f f cm 10="1" p er i p h era l c l oc k o ff 0.7 3.0 vc 27="0" 3 5 7 0 vc 27="0" vc 27="0" a
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 25 of 27 rej03b0069-0120 timing requirements [v cc =3v] (unless otherwise noted: v cc = 3v, v ss = 0v at topr = 25 ?) table 5.20 x in input ________ table 5.21 cntr0 input, cntr1 input, int2 input ________ table 5.22 tcin input, int3 input symbol t c (x in ) t wh (x in ) t wl (x in ) parameter x in input cycle time x in input high pulse width x in input low pulse width min. 100 40 40 max. unit ns ns ns standard symbol t c ( cntr0 ) t wh ( cntr0 ) t wl ( cntr0 ) parameter cntr0 input cycle time cntr0 input high pulse width cntr0 input low pulse width min. 300 120 120 max. unit ns ns ns standard symbol t c ( tcin ) t wh ( tcin ) t wl ( tcin ) parameter tcin input cycle time tcin input high pulse width tcin input low pulse width min. 1200 (1) 600 (2) 600 (2) max. unit ns ns ns standard notes: 1. when using the timer c input capture mode, adjust the cycle time above ( 1/ timer c count source frequency x 3). 2. when using the timer c input capture mode, adjust the pulse width above ( 1/ timer c count source frequency x 1.5). notes: ________ ________ 1. when selecting the digital filter by the int0 input filter select bit, use the int0 input high pulse width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. ________ ________ 2 . when selecting the digital filter by the int0 input filter select bit, use the int0 input low pusle width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. table 5.23 serial interface ________ table 5.24 external interrupt int0 input symbol t c ( ck ) t w ( ckh ) t w ( ckl ) t d ( c-q ) t h ( c-q ) t su ( d-c ) t h ( c-d ) parameter clki input cycle time clki input high pulse width clki input low pulse width txdi output delay time txdi hold time rxdi input setup time rxdi input hold time min. 300 150 150 0 55 90 max. unit ns ns ns ns ns ns ns standard 160 symbol t w ( inh ) t w ( inl ) parameter ________ int0 input high pulse width ________ int0 input low pulse width min. 380 (1) 380 (2) max. unit ns ns standard
r8c/13 group 5. electrical characteristics rev.1.20 jan 27, 2006 page 26 of 27 rej03b0069-0120 figure 5.5 vcc=3v timing diagram clk i txd i rxd i int i t w(ckh) t c(ck) t w(ckl) t h(c-q) t h(c-d) t su(d-c) t d(c-q) t w(inl) t w(inh) x in input t wh(xin) t c(xin) t wl(xin) tcin input t wh(tcin) t c(tcin) t wl(tcin) cntr0 input t wh(cntr0) t c(cntr0) t wl(cntr0) v cc = 3v
r8c/13 group package dimensions rev.1.20 jan 27, 2006 page 27 of 27 rej03b0069-0120 package dimensions 2. 1. dimensions " * 1" and " * 2" do not include mold flash. note) dimension " * 3" does not include trim offset. y index mark * 3 f 32 25 24 17 16 9 8 1 * 1 * 2 x b p e h e e d h d z d z e detail f l 1 l a c a 2 a 1 previous code jeita package code renesas code plqp0032gb-a 32p6u-a mass[typ.] 0.2g p-lqfp32-7x7-0.80 1.0 0.125 0.35 0.7 0.7 0.20 0.20 0.145 0.09 0.42 0.37 0.32 max nom min dimension in millimeters symbol reference 7.1 7.0 6.9 d 7.1 7.0 6.9 e 1.4 a 2 9.2 9.0 8.8 9.2 9.0 8.8 1.7 a 0.2 0.1 0 0.7 0.5 0.3 l x 8 0 c 0.8 e 0.10 y h d h e a 1 b p b 1 c 1 z d z e l 1 terminal cross section b 1 c 1 bp c
revision history r8c/13 group datasheet rev. date description page summary a-1 0.10 oct 28, 2003 first edition issued 0.20 dec05, 2003 5 figure 1.3 revised chapter 4, notes revised table 5.4 revised table 5.5 revised table 5.6 revised figure 5.3 added table 5.8 revised table 5.10 revised figure 5.3 revised to figure 5.4 table 5.17 revised figure 5.4 revised to figure 5.5 10 16 18 21 22 25 17 1.00 sep 30, 2004 all pages 2 5 6 9 10-13 12 14 15 16 17 18 19 20 22 23 24 words standardized (on-chip oscillator, serial interface, a/d) table 1.1 revised figure 1.3, notes 3 added table 1.3 revised figure 3.1, notes added one body sentence in chapter 4 added ; titles of table 4.1 to 4.4 added table 4.3 revised ; table 4.4 revised table 5.2 revised table 5.3 revised table 5.4 and table 5.5 revised table 5.6, 5.7 and 5.8 revised ; figure 5.3 revised table 5.9 and 5.11 revised table 5.12 revised table 5.13 revised table 5.18 revised table 5.19 revised table 5.20 and table 5.24 revised 1.10 apr.27.2005 4 table 1.2, figure 1.2 pa ckage name revised 5 figure 1.3 package name revised 10 table 4.1 revised 12 table 4.3 revised 15 table 5.3 partly revised 16 table 5.4, table 5.5 partly added
revision history r8c/13 group datasheet rev. date description page summary a-2 1.10 apr.27.2005 17 table 5.7, 5.8 revised 18 table 5.10, table 5.11 partly revised 22 table 5.18 partly revised 26 package dimensions revised 1.20 jan.27.2006 2 table 1.1 performance outline revised 3 figure 1.1 block diagram partly revised 4 1.4 product information, title of table 1.2 product list product informaton revised rom capacity; program area program rom , data area data flash revised figure 1.2 type no., memory size, and package partly revised 6 table 1.3 pin description revised 7-8 2 central processing unit (cpu) revised figure 2.1 cpu register revised 9 3 memory, figure 3.1 memory map; program area program rom , data area data flash revised 10 table 4.1 sfr information(1) notes:1 revised 11 table 4.2 sfr information(2) notes:1 revised 12 table 4.3 sfr information(3); 0081 16 : prescaler y prescaler y register 0082 16 : timer y secondary timer y secondary register 0083 16 : timer y primary timer y primary register 0085 16 : prescaler z prescaler z register 0086 16 : timer z secondary timer z secondary register 0087 16 : timer z primary timer z primary register 008c 16 : prescaler x prescaler x register revised notes:1, 2 revised 13 table 4.4 sfr information(4) notes:1 revised 14 table 5.2 recommended operating conditions; notes: 1, 2, 3 revised 15 table 5.3 a/d conversion characteristics; a/d operation clock frequency a/d operating clock frequency revised notes: 1, 2, 3, 4 revised 16 table 5.4 flash memory (program rom) electrical characteristics; data retention duration data hold time revised topr ambient temperature notes: 1 to 7 added measuring condition of byte program time and block erase time deleted 17 table 5.5 flash memory (data flash block a, block b) electrical characteristics data retention duration data hold time revised topr ambient temperature notes: 1, 3 revised, notes: 9 added measuring condition of byte program time and block erase time deleted 18 table 5.7 reset circuit electrical characteristics (when using hardware reset 2) notes: 3 revised 19 table 5.9 high-speed on-chip oscillator circuit electrical characteristics; high-speed on-chip oscillator temperature dependence high-speed on-chip oscillator frequency temperature dependence revised table 5.11 electrical characteristics (1) [v cc =5v]; p1 0 to p1 7 except x out except p1 0 to p1 7 , x out revised
revision history r8c/13 group datasheet rev. date description page summary a-3 1.20 jan.27.2006 20 table 5.12 electrical characteristics (2) [v cc =5v]; notes: 1, 2 revised measuring condition stop mode: topr=-25 c added 23 table 5.18 electrical characteristics (3) [v cc =3v] p1 0 to p1 7 except x out except p1 0 to p1 7 , x out revised 24 table 5.19 electrical characteristics (4) [v cc =3v] notes: 1, 2 revised measuring condition stop mode: topr=-25 c added
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