View APU3137M_6790013.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

apu3137 200510061-1/17 data and specifications subject to change without notice. description the apu3137 controller ic is designed to provide a low cost and high performance synchronous buck regulator for on-board dc to dc converter applications. the out- put voltage can be set as low as 0.8v and higher voltage can be obtained with an external voltage divider. high peak current gate drivers provide fast switching transi- tion for applications requiring high output current in the range of 15a to 20a. this device features an internal 200khz oscillator, un- der-voltage lockout for both vcc and vc supplies, an external programmable soft-start function as well as output under-voltage detection that latches off the de- vice when an output short is detected. 1a peak output drive capability 0.8v reference voltage shuts off both drivers at shorted output and shutdown operating with single 5v or 12v supply voltage stable with ceramic capacitors internal 200khz oscillator soft-start function protects the output when control fet is shorted synchronous controller in 8-pin package package order information features 8-pin synchronous pwm controller applications ddr memory application low voltage distributed dc-dc graphic cards low cost on-board dc to dc such as 5v to 2.5v, 1.8v or 0.8v rohs complaint t a (c) device package frequency 0 to 70 APU3137M 8-pin plastic soic nb (m) 200khz technology licensed from international rectifier figure 1 - typical application of apu3137. typical application apu3137 u1 vcc vc hdrv ldrv fb gnd comp ss/sd c3 1uf c4 1uf c8 0.1uf c9 3300pf r4 30k q1 irf7832 q2 irf7832 r5 1k, 1% r3 2.15k l2 2.2uh l1 1uh c2 4x 150uf c1 47uf 2.5v @ 15a c7 3x 330uf 40m ? , poscap 12v 5v optional d1 optional
2/17 apu3137 absolute maximum ratings vcc supply voltage .................................................. -0.5v - 25v vc supply voltage .................................................... -0.5v - 25v storage temperature range ...................................... -65c to 150c operating junction temperature range ..................... 0c to 125c caution: stresses above those listed in "absolute maximum ratings" may cause permanent damage to the device. parameter sym test condition min typ max units fb vcc ldrv gnd hdrv vc comp ss 4 3 2 1 5 6 7 8 reference voltage fb voltage fb voltage line regulation uvlo uvlo threshold - vcc uvlo hysteresis - vcc uvlo threshold - vc uvlo hysteresis - vc uvlo threshold - fb uvlo hysteresis - fb supply current vcc dynamic supply current vc dynamic supply current vcc static supply current vc static supply current soft-start section charge current 5 apu3137 3/17 parameter sym test condition min typ max units pin descriptions this pin is connected directly to the output of the switching regulator via resistor divider to provide feedback to the error amplifier. this pin provides biasing for the internal blocks of the ic as well as power for the low side driver. a minimum of 1 e f, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. output driver for the synchronous power mosfet. this pin serves as the ground pin and must be connected directly to the ground plane. a high frequency capacitor (0.1 to 1 e f) must be connected from vcc and vc pins to this pin for noise free operation. output driver for the high side power mosfet. this pin should not go negative (below ground), this may cause problem for the gate drive circuit. it can happen when the inductor current goes negative (source/sink), soft-start at no load and for the fast load transient from full load to no load. to prevent negative voltage at gate drive, a low forward voltage drop diode might be connected between this pin and ground. this pin is connected to a voltage that must be at least 4v higher than the bus voltage of the switcher (assuming 5v threshold mosfet) and powers the high side output driver. a minimum of 1 e f, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. compensation pin of the error amplifier. an external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. this pin provides soft-start for the switching regulator. an internal current source charges an external capacitor that is connected from this pin to ground which ramps up the output of the switching regulator, preventing it from overshooting as well as limiting the input current. the converter can be shutdown by pulling this pin below 2.8v. error amp fb voltage input bias current fb voltage input bias current transconductance oscillator frequency ramp-amplitude voltage output drivers rise time fall time dead band time max duty cycle min duty cycle ss=3v, fb=1v ss=0v, fb=1v note 1 c l =3000pf (10% to 90%) c l =3000pf (90% to 10%) fb=0.7v, freq=200khz fb=1.5v 600 180 85 0.1 50 850 1.25 35 35 100 90 e a e a e mho khz v ns ns ns % % pin# pin symbol pin description 1 2 3 4 5 6 7 8 fb vcc ldrv gnd hdrv vc comp ss / sd i fb1 i fb2 gm freq v ramp tr t f t db t on t off 1100 240 70 70 0 note 1: guaranteed by design but not tested in production.
4/17 apu3137 block diagram figure 2 - simplified block diagram of the apu3137. 20ua 64ua max por oscillator error amp ct error comp reset dom por 0.4v fblo comp vc hdrv vcc ldrv gnd vcc 4.25v vc 3.5v bias generator 3v 0.8v por ss/sd fb comp 25k 25k 0.8v 3v r s q 8 1 7 4 3 2 5 6 2.8v ss
apu3137 5/17 theory of operation introduction the apu3137 is a fixed frequency, voltage mode syn- chronous controller and consists of a precision refer- ence voltage, an error amplifier, an internal oscillator, a pwm comparator, 1a peak gate driver, soft-start and shutdown circuits (see block diagram). the output voltage of the synchronous converter is set and controlled by the output of the error amplifier; this is the amplified error signal from the sensed output voltage and the reference voltage. this voltage is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulses of variable duty-cycle, which drives the two n-channel ex- ternal mosfets.the timing of the ic is provided through an internal oscillator circuit which uses on-chip capaci- tor to set the oscillation frequency to 200 khz. soft-start the apu3137 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. to ensure correct start-up, the soft-start se- quence initiates when the vc and vcc rise above their threshold (3.5v and 4.25v respectively) and generates the power on reset (por) signal. soft-start function operates by sourcing an internal current to charge an external capacitor to about 3v. initially, the soft-start func- tion clamps the e/a?s output of the pwm converter and disables the short circuit protection. during the power up, the output starts at zero and voltage at fb is below 0.4v. the feedback uvlo is disabled during this time by injecting a current (64 e a) into the fb. this generates a voltage about 1.6v (64 e a 25k) across the negative input of e/a and positive input of the feedback uvlo comparator (see fig3). figure 3 - soft-start circuit for apu3137. the magnitude of this current is inversely proportional to the voltage at soft-start pin. the 20 e a current source starts to charge up the exter- nal capacitor. in the mean time, the soft-start voltage ramps up, the current flowing into fb pin starts to de- crease linearly and so does the voltage at the positive pin of feedback uvlo comparator and the voltage nega- tive input of e/a. when the soft-start capacitor is around 1v, the current flowing into the fb pin is approximately 32 e a. the volt- age at the positive input of the e/a is approximately: the e/a will start to operate and the output voltage starts to increase. as the soft-start capacitor voltage contin- ues to go up, the current flowing into the fb pin will keep decreasing. because the voltage at pin of e/a is regu- lated to reference voltage 0.8v, the voltage at the fb is: the feedback voltage increases linearly as the injecting current goes down. the injecting current drops to zero when soft-start voltage is around 2v and the output volt- age goes into steady state. as shown in figure 4, the positive pin of feedback uvlo comparator is always higher than 0.4v, therefore, feed- back uvlo is not functional during soft-start. figure 4 - theoretical operational waveforms during soft-start. 32 e a 25k = 0.8v v fb = 0.8-25k (injected current) 20ua 64ua max por error amp 64ua 25k=1.6v when ss=0 por 0.4v feeback uvlo comp ss/sd fb comp 25k 0.8v 25k hdrv ldrv 3v soft-start voltage voltage at negative input of error amp and feedback uvlo comparator voltage at fb pin current flowing into fb pin 64ua 0ua 0v 0.8v ? ? ?
6/17 apu3137 short-circuit protection the outputs are protected against the short-circuit. the apu3137 protects the circuit for shorted output by sens- ing the output voltage (through the external resistor di- vider). the apu3137 turns off both drivers, when the out- put voltage drops below 0.4v. the apu3137 also protects the output from over-voltaging when the control fet is shorted. this is done by turning on the sync fet with the maximum duty cycle. under-voltage lockout the under-voltage lockout circuit assures that the mosfet driver outputs remain in the off state whenever the supply voltage drops below set parameters. lockout occurs if vc and vcc fall below 3.5v and 4.25v respec- tively. normal operation resumes once vc and vcc rise above the set values. shutdown the converter can be shutdown by pulling the soft-start pin below 2.8v. this can be easily done by using an external small signal transistor. during shutdown both mosfet drivers turn off. the output start-up time is the time period when soft- start capacitor voltage increases from 1v to 2v. the start- up time will be dependent on the size of the external soft-start capacitor. the start-up time can be estimated by: for a given start up time, the soft-start capacitor can be estimated as: mosfet drivers the driver capabilities of both high and low side drivers are optimized to maintain fast switching transitions. they are sized to drive a mosfet that can deliver up to 20a output current. the low side mosfet driver is supplied directly by v cc while the high side driver is supplied by v c . an internal dead time control is implemented to prevent cross-conduction and allows the use of several kinds of mosfets. c ss 20 e a t start /1v 20 e a t start /c ss = 2v-1v
apu3137 7/17 application information design example: the following example is a typical application for apu3137, the schematic is figure 13 on page 15. output voltage programming output voltage is programmed by reference voltage and external voltage divider. the fb pin is the inverting input of the error amplifier, which is referenced to the voltage on non-inverting pin of error amplifier. the output voltage is defined by using the following equation: when an external resistor divider is connected to the output as shown in figure 5. figure 5 - typical application of the apu3137 for programming the output voltage. equation (7) can be rewritten as: choose r 5 = 1k this will result to ---(7) v ref = 0.8v r 6 r 5 ( ) r 6 = r 5 - 1 v out v ref ( ) fb apu3137 v out r 5 r 6 l2 apu3137 c1 vc hdrv q1 q2 c2 v bus d2 d1 css = 20 ?
8/17 apu3137 for higher efficiency, a low esr capacitor is recom- mended. choose four poscap from sanyo 6tpc150m (6.3v, 150 e f, 40m 1 ) with a maximum allowable ripple current of 7.6a. inductor selection the inductor is selected based on operating frequency, transient performance and allowable output voltage ripple. low inductor value results to faster response to step load (high i/ t) and smaller size but will cause larger output ripple due to increase of inductor ripple current. as a rule of thumb, select an inductor that produces a ripple current of 10-40% of full load dc. for the buck converter, the inductor value for desired operating ripple current can be determined using the fol- lowing relation: if i = 20%(i o ), then the output inductor will be: the panasonic pccn6b series provides a range of in- ductors in different values, low profile suitable for large currents, 2.17 e h, 17a is a good choice for this applica- tion. this will result to a ripple approximately 19.2% of output current. output capacitor selection the criteria to select the output capacitor is normally based on the value of the effective series resistance (esr). in general, the output capacitor must have low enough esr to meet output ripple and load transient l = 2 e h 2 2 p cond (upper switch) = i load r ds(on) d i p cond (lower switch) = i load r ds(on) (1 - d) i i = r ds(on) temperature dependency for v in =5v, i out =15a and d=0.5, the i rms =7.5a i rms = i out d (1-d) ---(9) where: d is the duty cycle, d=v out /v in. i rms is the rms value of the input capacitor current. i out is the output current for each channel. v in - v out = l ; t = d ; d = 1 f s v out v in i t l = (v in - v out ) ---(11) v out v in i f s where: v in = maximum input voltage v out = output voltage i = inductor ripple current f s = switching frequency t = turn on time d = duty cycle where: v o = output voltage ripple i = inductor ripple current v o = 75mv and i 20% of 15a = 3a this results to: esr=25m 1 esr 6 ---(10) v o i o requirements, yet have high enough esr to satisfy sta- bility requirements. the esr of the output capacitor is calculated by the following relationship: the sanyo tpc series, poscap capacitor is a good choice. the 6tpc330m, 330 e f, 6.3v has an esr 40m 1 . se- lecting three of these capacitors in parallel, results to an esr of 13.3m 1 which achieves our low esr goal. the capacitor value must be high enough to absorb the inductor's ripple current. the larger the value of capaci- tor, the lower will be the output ripple voltage. power mosfet selection the apu3137 uses two n-channel mosfets. the se- lections criteria to meet power transfer requirements is based on maximum drain-source voltage (v dss ), gate- source drive voltage (v gs ), maximum output current, on- resistance r ds(on) and thermal management. the mosfet must have a maximum operating voltage (v dss ) exceeding the maximum input voltage (v in ). the gate drive requirement is almost the same for both mosfets. logic-level transistor can be used and cau- tion should be taken with devices at very low v gs to pre- vent undesired turn-on of the complementary mosfet, which results a shoot-through current. the total power dissipation for mosfets includes con- duction and switching losses. for the buck converter, the average inductor current is equal to the dc load cur- rent. the conduction loss is defined as: the r ds(on) temperature dependency should be consid- ered for the worst case operation. this is typically given in the mosfet data sheet. ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget.
apu3137 9/17 choose irf7832 for both control mosfet and synchro- nous mosfet. this device provides low on-resistance in a compact soic 8-pin package. the mosfet has the following data: the total conduction losses will be: the switching loss is more difficult to calculate, even though the switching transition is well understood. the reason is the effect of the parasitic components and switching times during the switching procedures such as turn-on / turnoff delays and rise and fall times. the control mosfet contributes to the majority of the switch- ing losses in synchronous buck converter. the synchro- nous mosfet turns on under zero voltage conditions, therefore, the turn on losses for synchronous mosfet can be neglected. with a linear approximation, the total switching loss can be expressed as: the switching time waveform is shown in figure 7. figure 7 - switching time waveforms. from irf7832 data sheet we obtain: these values are taken under a certain condition test. for more details please refer to the irf7466 and irf7458 data sheets. by using equation (12), we can calculate the total switch- ing losses. feedback compensation the apu3137 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. to achieve fast transient response and accurate output regulation, a compensa- tion circuit is necessary. the goal of the compensation network is to provide a closed loop transfer function with the highest 0db crossing frequency and adequate phase margin (greater than 45 ). the output lc filter introduces a double pole, ?40db/ decade gain slope above its corner resonant frequency, and a total phase lag of 180 (see figure 8). the reso- nant frequency of the lc filter is expressed as follows: figure 9 shows gain and phase of the lc filter. since we already have 180 phase shift just from the output filter, the system risks being unstable. figure 8 - gain and phase of lc filter. p con(total) = p con(upper) + p con(lower) p con(total) = 1.166w p sw(total) = 250mw irf7832 v dss = 30v i d = 20a @ 25 c r ds(on) = 4m 1 @ v gs =10v where: v ds(off) = drain to source voltage at off time t r = rise time t f = fall time t = switching period i load = load current p sw = i load ---(12) v ds(off) 2 t r + t f t irf7832 t r = 12.3ns t f = 21ns f lc = ---(13) 1 2 h l o c o v ds v gs 10% 90% t d (on) t d (off) t r t f gain f lc 0db phase 0 f lc -180 frequency frequency -40db/decade
10/17 apu3137 the apu3137?s error amplifier is a differential-input transconductance amplifier. the output is available for dc gain control or ac phase compensation. the e/a can be compensated with or without the use of local feedback. when operated without local feedback, the transconductance properties of the e/a become evi- dent and can be used to cancel one of the output filter poles. this will be accomplished with a series rc circuit from comp pin to ground as shown in figure 9. note that this method requires that the output capacitor should have enough esr to satisfy stability requirements. in general, the output capacitor?s esr generates a zero typically at 5khz to 50khz which is essential for an acceptable phase margin. the esr zero of the output capacitor expressed as fol- lows: figure 9 - compensation network without local feedback and its asymptotic gain plot. the transfer function (ve / v out ) is given by: the (s) indicates that the transfer function varies as a function of frequency. this configuration introduces a gain and zero, expressed by: |h(s)| is the gain at zero cross frequency. first select the desired zero-crossover frequency (fo): use the following equation to calculate r 4 : to cancel one of the lc filter poles, place the zero be- fore the lc filter resonant frequency pole: using equations (17) and (19) to calculate c 9 , we get: one more capacitor is sometimes added in parallel with c 9 and r 4 . this introduces one more pole which is mainly used to suppress the switching noise. the additional pole is given by: the pole sets to one half of switching frequency which results in the capacitor c pole: c 9 2006pf; choose c 9 =3300pf f esr = ---(14) 1 2 h esr co h(s) = g m ---(15) ( ) r 5 r 6 + r 5 1 + sr 4 c 9 sc 9 r 4 = ---(18) fo f esr f lc 2 v osc v in r 5 + r 6 r 5 1 g m fo > f esr and f o 6 (1/5 ~ 1/10) f s for: lo = 2.17 e h co = 990 e f f z 75%f lc f z 0.75 1 2 h l o c o ---(19) f z = 2.57khz r 4 = 20k f p = 2 h r 4 1 c 9 c pole c 9 + c pole f z = ---(17) 1 2 h r 4 c 9 |h(s=j 2 h f o )| = g m r 4 ---(16) r 5 r 6 r 5 v out vp=v ref r 5 r 6 r 4 c 9 ve e/a f z h(s) db frequency gain(db) fb comp optional f lc = 3.43khz r 5 = 1k r 6 = 2.15k g m = 600 e mho for: v in = 5v v osc = 2.5v fo = 20khz f esr = 12khz this results to r 4 =26.7k choose r 4 =30k where: v in = maximum input voltage v osc = oscillator ramp voltage fo = crossover frequency f esr = zero frequency of the output capacitor f lc = resonant frequency of the output filter r 5 and r 6 = resistor dividers for output voltage programming g m = error amplifier transconductance for f p << f s /2 r 4 =30k and f s =200khz will result to c pole =53pf. choose c pole =47pf. c pole = 1 h r 4 f s h r 4 f s - 1 1 c 9
apu3137 11/17 for a general solution for unconditionally stability for ceramic capacitor with very low esr and any type of output capacitors, in a wide range of esr values we should implement local feedback with a compensation network. the typically used compensation network for voltage-mode controller is shown in figure 10. figure 10 - compensation network with local feedback and its asymptotic gain plot. in such configuration, the transfer function is given by: the error amplifier gain is independent of the transcon- ductance under the following condition: by replacing z in and z f according to figure 7, the trans- former function can be expressed as: as known, transconductance amplifier has high imped- ance (current source) output, therefore, consider should be taken when loading the e/a output. it may exceed its source/sink output current capability, so that the ampli- fier will not be able to swing its output voltage over the necessary range. the compensation network has three poles and two ze- ros and they are expressed as follows: cross over frequency: the stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. the consideration has been taken to satisfy condition (20) regarding transconduc- tance error amplifier. these design rules will give a crossover frequency ap- proximately one-tenth of the switching frequency. the higher the band width, the potentially faster the load tran- sient speed. the gain margin will be large enough to provide high dc-regulation accuracy (typically -5db to - 12db). the phase margin should be greater than 45 for overall stability. based on the frequency of the zero generated by esr versus crossover frequency, the compensation type can be different. the table below shows the compensation type and location of crossover frequency. v out vp=v ref r 5 r 6 r 8 c 10 c 12 c 11 r 7 ve f z 1 f z 2 f p 2 f p 3 e/a z f z in frequency gain(db) h(s) db fb comp h(s) = 1+sr 7 (1+sr 8 c 10 ) (1+sr 7 c 11 ) [1+sc 10 (r 6 +r 8 )] [ ( )] 1 sr 6 (c 12 +c 11 ) c 12 c 11 c 12 +c 11 g m z f >> 1 and g m z in >>1 ---(20) 1 - g m z f 1 + g m z in v e v out = where: v in = maximum input voltage v osc = oscillator ramp voltage lo = output inductor co = total output capacitors f o = r 7 c 10 v in v osc 1 2 h lo co ---(21) f p1 = 0 1 2 h c 10 (r 6 + r 8 ) f z2 = 1 2 h c 10 r 6 f z1 = 1 2 h r 7 c 11 f p3 = 1 2 h r 7 1 2 h r 7 c 12 f p2 = 1 2 h r 8 c 10 ( ) c 12 c 11 c 12 +c 11 detail information is dicussed in application note an- 1043 which can be downloaded from the ir web-site. compensator type type ii (pi) type iii (pid) method a type iii (pid) method b location of zero crossover frequency (f o ) f po < f zo < f o < f s /2 f po < f o < f zo < f s /2 f po < f o < f s /2 < f zo typical output capacitor electrolytic, tantalum tantalum, ceramic ceramic table - the compensation type and location of zero crossover frequency.
12/17 apu3137 layout consideration the layout is very important when designing high fre- quency switching converters. layout will affect noise pickup and can cause a good design to perform with less than expected results. start to place the power components. make all the con- nections in the top layer with wide, copper filled areas. the inductor, output capacitor and the mosfet should be close to each other as possible. this helps to reduce the emi radiated by the power traces due to the high switching currents through them. place input capacitor directly to the drain of the high-side mosfet. to reduce the esr, replace the single input capacitor with two par- allel units. the feedback part of the system should be kept away from the inductor and other noise sources and be placed close to the ic. in multilayer pcb, use one layer as power ground plane and have a separate control circuit ground (analog ground), to which all sig- nals are referenced. the goal is to localize the high cur- rent path to a separate loop that does not interfere with the more sensitive analog control function. these two grounds must be connected together on the pc board layout at a single point.
apu3137 13/17 typical application single supply 5v input figure 11 - typical application of apu3137 in an on-board dc-dc converter using a single 5v supply. apu3137 u1 vcc vc hdrv ldrv fb gnd comp ss/sd c3 0.1uf c4 1uf c8 0.1uf c9 3.3nf r4 18k q1 irf7457 q2 irf7457 r5 1k, 1% r6 3.16k, 1% l2 l1 1uh c2 3x 6tpb150m, 150uf, 40m 1 c1 47uf 3.3v @ 12a c7 2x 6tpc330m, 330uf, 40m 1 c5 0.1uf d1 bat54s d3 bat54 5v 3.3uh c6 68pf d2 bat54
14/17 apu3137 typical application figure 12 - typical application of apu3137 for ddr memory when the termination voltage, generated by apu3038, tracks the core voltage. apu3137 u1 vcc vc hdrv ldrv fb comp ss c1 0.1uf c2 1uf c6 0.1uf c8 3300pf r2 20k q1 irf3711s l2 l1 1uh c4 47uf v ddq 1.8v @ 15a c7 3x 330uf 6tpc330m 12v 5v apu3038 u2 vcc vc hdrv ldrv fb gnd comp ss c9 0.1uf c10 1uf c12 0.15uf c14 6800pf r6 12k q3 irf7460 q4 irf7457 l3 2.2uh v tt (0.9v @ 10a) c13 3x 330uf 6tpc330m 12v pgnd rt v p v ref r4 1k r5 1k r3 1k 5v 5v gnd r1 1k 2.2uh c11 3x 150uf 6tpb150m d2 1n4148 c15 68pf c16 47pf d1 1n4148 q2 irf3711s c5 4x 150uf 6tpb150m
apu3137 15/17 demo-board application 5v to 2.5v @ 15a ref desig description value qty part# manuf 2 1 1 1 1 5 3 1 4 1 1 1 1 1 1 1 q1, q2 u1 d3 l1 l2 c1,c18,c19,c20,c23 c10,c11,c21 c8 c3,c4,c12,c6 c9 c15 c13 r8 r6 r11 r9 mosfet controller diode inductor inductor capacitor, poscap capacitor, poscap capacitor, ceramic capacitor, ceramic capacitor, ceramic capacitor, ceramic capacitor, ceramic resistor resistor resistor resistor irf7832 apu3137 bat54 d03316p-102hc etqp6f2r5bfa 6tpc150m 6tpc330m ecj-2vf1e104z ecj-3yb1e105k ecj-2vb2d471k ecj-2vb1h332k ecj-2vc1h470j ir apec ir coilcraft panasonic sanyo sanyo panasonic panasonic panasonic panasonic panasonic application parts list 30v, 4m 1 , 15a synchronous pwm fast switching 1 e h, 10a 2.17 e h, 17a 150 e f, 6.3v, 40m 1 330 e f, 6.3v, 40m 1 0.1 e f, y5v, 25v 1 e f, y5v, 16v 470pf, x7r 3300pf, x7r, 50v 47pf, npo 2.15k, 1% 4.7 1 , 5% 1k, 1% 30k, 1% figure 13 - demo-board application of apu3137. c9 470pf apu3137 u1 vcc vc hdrv ldrv fb gnd comp ss/sd l2 l1 gnd gnd v in 5v r8 q2 irf7832 irf7832 c18 150uf c23 150uf r9 30k c1 150uf d3 2.17uh r6 4.7 1 c10 330uf c12 1uf 1uh c4 1uf c6 1uf c3 1uf c8 0.1uf c15 3300pf 2.15k v out 2.5v @ 15a r11 1k c11 330uf 12v c13 47pf q1 c21 330uf c19 150uf c20 150uf
16/17 apu3137 figure 17 - normal condition at 15a. ch1: output voltage ripple (20mv/div) ch2: hdrv ch3: ldrv ch4: inductor current (5a/div) figure 15 - normal condition at n/l. ch1: output voltage ripple (20mv/div) ch2: hdrv ch3: ldrv ch4: inductor current (2a/div) figure 16 - transient load response at i out =0a - 15a. ch1: v out ch4: i out (5a/div) figure 14 - transient load response at i out =0a - 8a. ch1: v out ch4: i out (5a/div) typical operating characteristics
apu3137 17/17 figure 18 - shutdown by pulling down the soft-start pin. ch1: v out ch2: hdrv ch3: ldrv ch4: i out (10a/div) typical operating characteristics figure 19 - start-up. ch2: v ss (soft-start voltage) ch3: v out ch4: i out (5a/div) figure 20 - application circuit efficiency at ambient temperature. 5v to 2.5v 0 20 40 60 80 100 120 0 2 4 6 8 10 12 14 16 18 output current (a) efficiency (%)

▲Up To Search▲

Price & Availability of APU3137M

	To Download APU3137M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .