the information provided herein is believed to be reliable at press time. sirenza microdevices assumes no responsibility for in accuracies or omissions. sirenza microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user?s own risk. prices and specifications are subject to change without notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. sirenza microdevices does not authorize or warrant any sirenza microdevices product for use in life-support devices and/or systems. copyright 2003 s irenza microdevices, inc. all worldwide rights reserved. 303 s. technology court, phone: (800) smi-mmic http://ww w.sirenza.com broomfield, co 80021 1 eds-102932 rev e sirenza mi crodevices? xd010-24s-d2f 12w power module is a robust 2- stage class a/ab amplifier module for use in the driver stages of cdma rf power amplifiers. the power transis tors are fabricated using sirenza?s latest, high performance ldmos process. this unit operates from a single voltage and has internal temperature compensation of the bias voltage to ensure consistant performance over the full temperature range. it is inter- nally matched to 50 ohms. key specifications symbol parameter unit min. typ. max. frequency frequency of operation mhz 1930 1990 p 1db output power at 1db compression w 10 12 gain gain at 1w output power db 26 28 gain flatness peak to peak gain variation, 1930-1990mhz db 0.4 1.0 irl input return loss 1w output power, 1930-1990mhz db 10 14 efficiency drain efficiency at 10w cw output % 20 26 drain efficiency at 2w cdma (single carrier is-95, 9 ch fwd) % 12 drain efficiency at 1w cdma (single carrier is-95, 9 ch fwd) % 6.5 linearity acpr at 1w cdma power output (single carrier is-95, 9 ch fwd, offset=750khz, acpr integrated bandwidth) db -58 alt-1 at 2w cdma (single carrier is-95, 9 ch fwd, offset=1980 khz, acpr integrated bandwidth) db -70 3 rd order imd at 10w pep (two tone; 1mhz) dbc -27 -32 delay signal delay from pin 1 to pin 5 ns 2.9 phase linearity deviation from linear phase (peak to peak) deg 0.5 r th, j-l thermal resistance stage 1 (junction to case) oc/w 11 r th, j-2 thermal resistance stage 2 (junction to case) oc/w 4 xd010-24s-d2f xd010-24s-d2fy 1930-1990 mhz class a/ab 12w cdma driver amplifier product features applications ? available in rohs compliant packaging ? 50 w rf impedance ? 12w output p 1db ? single supply operation : nominally 28v ? high gain: 28 db at 1960 mhz ? high efficiency: 26% at 1960 mhz ? advanced, xemos ldmos ii fets ? temperature compensation ? base station pa driver ? repeater ? cdma ? gsm / edge product description test conditions: z in = z out = 50 ? , v dd = 28.0v, i dq1 = 230ma, i dq2 = 150ma, t flange = 25oc functional bl ock diagram 4 temperature compensation 5 3 2 1 stage 1 stage 2 rf in rf out v d1 d2 v temperature compensation case flange = ground pb rohs compliant & green package
xd010-24s-d2f 1930-1990 mhz 12w power amp module 303 s. technology court phone: (800) smi-mmic http://www.sirenza.com broomfield, co 80021 2 eds-102932 rev e pin out description pin # function description 1 rf input module rf input. care must be taken to protect against video transients that ma y damage the active devices. 2v d1 this is the bias feed for the 1 st stage of the amplifier module. the gate bias is temperature compensated to maintain con- stant current over the operating temperature range. see note 1. 3,4 v d2 this is the bias feed for the 2 nd stage of the amplifier module. the gate bias is temperature compensated to maintain con- stant current over the operating temperature range. see note 1. 5 rf output module rf output. care must be taken to protect against video transients that may damage the active devices. flange gnd exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for optimum thermal and rf performance. see mounting instructions for recommendation. simplified device schematic absolute maximum ratings parameters value unit 1 st stage bias voltage (v d1 )35v 2 nd stage bias voltage (v d2 )35v rf input power +20 dbm load impedance for continuous operation without damage 5:1 vswr output device channel temperature +200 oc operating temperature range -20 to +90 oc storage temperature range -40 to +100 oc operation of this device beyond any one of these limits may cause permanent damage. for reliable continuous operation see typical setup values specified in the table on page one. caution: esd sensitive appropriate precaution in handling, packaging and testing devices must be observed. note 1: the internally generated gate vo ltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. no compensation is provided for gain changes with temperature. this can only be accomplished with agc external to the module. note 2: internal rf decoupling is incl uded on all bias leads. no addi- tional bypass elements are required, however some applica- tions may require energy storage on the drain leads to accommodate time-varying waveforms. note 3: this module was designed to hav e its leads hand soldered to an adjacent pcb. the maximum so ldering iron tip temperature should not exceed 700 f, and the soldering iron tip should not be in direct contact with the lead for longer than 10 seconds. refer to app note an060 (www.sirenza.com) for further installa- tion instructions. quality specifications parameter unit typical esd rating human body model, jedec document - jesd22-a114-b v 8000 mttf 85 o c baseplate, 200 o c channel h 1.2 x 10 6 temperature compensation rf in 1 q1 q2 2 3 5 rf out case flange = ground d1 vv d2 temperature compensation 4
xd010-24s-d2f 1930-1990 mhz 12w power amp module 303 s. technology court phone: (800) smi-mmic http://www.sirenza.com broomfield, co 80021 3 eds-102932 rev e two tone imd vs. output power and temperature freq=1960, 1961 mhz, vdd=28 v, t flange =-20 o c, 25 o c, 90 o c -60 -50 -40 -30 -20 -10 0 0123456 output power, avg (w) imd (dbc) imd @ 25 c imd @ 90 imd @ -20 acpr and alt1 vs. output power and temperature freq=1960 mhz is-95 vdd=28 v, t flange =-20c, 25c, 90c acpr 885 khz, 30 khz alt1 1.25 mhz, 30 khz -70 -60 -50 -40 -30 -20 -10 0 0 0.5 1 1.5 2 2.5 output power (w) acpr (db) -100 -90 -80 -70 -60 -50 -40 -30 alt1 (db) acpr @ 25c acpr @-20c acpr @ 90c alt1 @-20c alt1 @ 25c alt1 @ 90c gain and efficiency vs. output power and temperature freq=1960 mhz, vdd=28 v, t flange =-20c, 25c, 90c 0 5 10 15 20 25 30 35 024681012 output power (w) gain (db) 0 5 10 15 20 25 30 35 efficiency (%) gain @-20c gain @ 25c gain @ 90c efficiency @-20c efficiency @ 25c efficiency @ 90c gain, efficiency and acpr vs. frequency freq=1960 mhz, vdd=28 v, t flange = 25c output power=2 watts 0 5 10 15 20 25 30 35 1920 1930 1940 1950 1960 1970 1980 1990 2000 frequency (mhz) gain (db), efficiency (%) -60 -55 -50 -45 -40 -35 -30 -25 acpr (db) gain efficiency acpr gain, output power and efficiency vs. input power freq=1960 mhz, vdd=28 v, t flange = 25c 0 5 10 15 20 25 30 35 0 0.002 0.004 0.006 0.008 0.01 0.012 input power (w) gain (db), output power (w), efficiency (%) pout gain efficiency typical performance curves gain and efficiency vs. output power and voltage freq=1960 mhz, vdd=24v, 28 v, 32 v t flange = 25c 0 5 10 15 20 25 30 35 024681012 output power (w) gain (db), efficiency (%) gain @ 24 vdc gain @ 28 vdc gain @ 32 vdc efficiency @ 24 vdc efficiency @ 28 vdc efficiency @ 32 vdc
xd010-24s-d2f 1930-1990 mhz 12w power amp module 303 s. technology court phone: (800) smi-mmic http://www.sirenza.com broomfield, co 80021 4 eds-102932 rev e test board schematic with module attachments shown test board layout to receive gerber files, dxf drawings, a detailed bom, and assem bly recommendations for the test board with fixture, contact ap plications support at support@sirenza.com. data sheet for evaluation circuit (xd010-eval) available from sirenza website. component description manufacturer pcb rogers 4350, e r = 3 . 5 thickness=30mils rogers j1, j2 sma, rf, panel mount tab w / flange johnson j3 mta post header, 6 pin, rect- angle, polarized, surface mount amp c1, c10 cap, 10 m f, 35v, 10%, tant, elect, d kemet c2, c20 cap, 0.1 m f, 100v, 10%, 1206 johanson c3, c30 cap, 1000pf, 100v, 10%, 1206 johanson c25, c26 cap, 68pf, 250v, 5%, 0603 atc c21, c22 cap, 0.1 m f, 100v, 10%, 0805 panasonic c23, c24 cap, 1000pf, 100v, 10%, 0603 avx mounting screws 4-40 x 0.250? various test board bill of materials
xd010-24s-d2f 1930-1990 mhz 12w power amp module 303 s. technology court phone: (800) smi-mmic http://www.sirenza.com broomfield, co 80021 5 eds-102932 rev e package outline drawing recommended pcb cutout and la nding pads for the d2f package note 3: dimensions are in inches refer to application note an-060 ?installation instructions for xd module series? for additional mounting info. app note avail bale at at www.sirenza.com
|
