june 21 , 201 3 | final | v1.0 9 1 digital multi - p hase buck controller ir3536/38 CHL8326/28 features ? 6 - phase & 8 - phase dual output pwm controller ? phases are flexibly assigned between loops 1 & 2 ? intel? vr12, amd? 3.4mhz svi/pvi & memory modes ? overclocking & gaming mode with vmax setting ? switching frequency from 200khz to 1.2mhz per phase ? ir effi ciency shaping features including variable gate drive and dynamic phase control ? programmable 1 - phase or 2 - phase for light loads and active diode emulation for very light loads ? ir adaptive transient algorithm (ata) on both loops minimizes output bulk capaci tors and system cost ? auto - phase detection with auto - compensation ? per - loop fault protection: ovp, uvp, ocp, otp, cfp ? i2c/smbus/pmbus system interface for telemetry of temperature, voltage, current & power for both loops ? non - volatile memory (nvm) for cust om configuration ? compatible with ir atl and 3.3v t ri - state drivers ? +3.3v supply voltage; - 20oc to 85oc ambient operation ? pb - free, rohs, 7x7 48 - pin & 8x8 56 - pin qfn , msl2 package applications ? intel ? vr12 & amd? svi & pvi based systems ? ddr memory with vtt trac king ? overclocked & gaming platforms pin diagram figure 1: ir3536/CHL8326 package top view description the ir3536/ CHL8326 and ir3538/ chl8328 are dual - loop digital multi - phase buck controllers. the ir3536/ CHL8326 drive up to 6 phases and the ir3538/ chl 8328 drives up to 8 phases. the ir3536/ CHL8326 and ir3538/ chl8328 are fully intel? vr12 and amd? svi/pvi comp liant on both loops and provide a vtt tracking function for ddr memory. the ir3536/ CHL8326 and ir3538/ chl8328 include the ir efficiency shaping te chnology to deliver exceptional efficiency at minimum cost across the entire load range. ir variable gate drive optimizes the mosfet gate drive voltage based on real - time load current. ir dynamic phase control adds/drops phases based upon load current. the ir3536/ CHL8326 and ir3538/ chl8328 can be configured to enter 1 - phase operation and active diode emulation mode automatically or by command. irs unique adaptive transient algorithm (ata), based on proprietary non - linear digital pwm algorithms, minimize s output bulk capacitors. the i2c/pmbus interface can communicate with up to 16 ir3536/ CHL8326 and ir3538/ chl8328 based vr loops. device configuration and fault parameters are easily defined using the ir intuitive power designer ( dpdc ) gui and stored in on - chip nvm. the ir3536/ CHL8326 and ir3538/ chl8328 provides extensive ovp, uvp, ocp and otp fault protection and includes thermistor based temperature sensing with vr_hot signal. nvm storage saves pins and enables a small package size. the ir3536/ CHL8326 a nd ir3538/ chl8328 also include numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying vrd design and enabling fastest time - to - market with its set - and - forget methodology . figure 2 : ir3538/ ch l8328 package top view 4 9 g n d c h l 8 3 2 6 4 8 p i n 7 x 7 q f n t o p v i e w 1 2 7 8 5 6 3 4 1 0 9 1 2 1 1 3 6 3 5 3 0 2 9 3 2 3 1 3 4 3 3 2 7 2 8 2 5 2 6 4 7 4 3 4 5 4 0 4 6 4 2 4 4 3 9 4 1 4 8 3 8 3 7 1 4 1 8 1 6 2 1 1 5 1 9 1 7 2 2 2 0 1 3 2 3 2 4 s m b _ d i o p w m 5 i s e n 6 e n a b l e v r t n r c s m i s e n 5 i s e n 4 i s e n 3 p w m 6 v s e n s m b _ c l k p w m 4 v r _ r e a d y 1 / p w r g d 2 i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t # 1 / v r h o t _ i c r i t # 2 p w m 3 v i n s e n s m b _ a l e r t # v 1 8 a r r e s v c c i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 g p o _ a 1 / c b o u t 2 r c s m _ l 2 r c s p _ l 2 s v _ a d d r _ g p o _ d 1 / v i d [ 1 ] 2 c f p 1 / v f i x e n _ p s i 2 p m _ a d d r _ g p o _ c 1 / p m _ a d d r _ v i d [ 0 ] 2 s v _ d i o 1 / s v d _ v i d [ 2 ] 2 s v _ c l k 1 / s v c _ v i d [ 3 ] 2 s v _ a l e r t 1 / v i d [ 4 ] 2 v r _ r e a d y _ l 2 1 / p w r o k 2 v c c p s i 1 / v i d [ 5 ] 2 v a r _ g a t e v r t n _ l 2 v s e n _ l 2 s m b _ d i o p w m 5 i s e n 6 e n a b l e v r t n r c s m i s e n 5 i s e n 4 i s e n 3 p w m 6 v s e n s m b _ c l k p w m 4 v r _ r e a d y 1 / p w r g d 2 i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t # 1 / v r h o t _ i c r i t # 2 p w m 3 v i n s e n s m b _ a l e r t # v 1 8 a r r e s v c c i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 g p o _ a 1 / c b o u t 2 r c s m _ l 2 r c s p _ l 2 s v _ a d d r _ g p o _ d 1 / v i d [ 1 ] 2 c f p 1 / v f i x e n _ p s i 2 p m _ a d d r _ g p o _ c 1 / p m _ a d d r _ v i d [ 0 ] 2 s v _ d i o 1 / s v d _ v i d [ 2 ] 2 s v _ c l k 1 / s v c _ v i d [ 3 ] 2 s v _ a l e r t 1 / v i d [ 4 ] 2 v r _ r e a d y _ l 2 1 / p w r o k 2 v c c p s i ( m p o l ) 1 / v i d [ 5 ] 2 p w m 7 v r t n _ l 2 v s e n _ l 2 5 7 g n d c h l 8 3 2 8 5 6 p i n 8 x 8 q f n t o p v i e w 5 5 5 1 5 3 4 8 5 4 5 0 5 2 4 7 4 9 5 6 4 6 4 5 4 3 4 4 1 2 7 8 5 6 3 4 1 0 9 1 2 1 1 1 4 1 3 1 6 2 0 1 8 2 3 1 7 2 1 1 9 2 4 2 2 1 5 2 5 2 6 2 8 2 7 4 2 4 1 3 6 3 5 3 8 3 7 4 0 3 9 3 3 3 4 3 1 3 2 2 9 3 0 i s e n 8 g p o _ b t s e n 2 v a r _ g a t e p w m 8 i s e n 7 i r t n 7 i r t n 8 1 i n t e l / m p o l m o d e 2 a m d m o d e
june 21 , 201 3 | final | v1.0 9 2 digital multi - p hase buck controller ir3536/38 CHL8326/28 ordering information ir353 ? m ? ? ? ? ? ? ? ? ? chl832 ? D ? ? ? ? ? figure 3: ir3536/CHL8326 package top view, enlarged package packing qty part number programming qfn tr=3000 ty=2600 ir3536 mtr pbf ir3536 mt ypbf default qfn tr=3000 ty=2600 ir3538 mtr pbf ir3538 mt ypbf default qfn tr= 3000 ir353 6m xxyytr p 1 customer configuratio n qfn tr= 3000 ir3538m xxyytr p 1 customer configuratio n notes: 1 . customer specific configuration file, where xx = customer id and yy = configuration file (codes assigned by ir marketing) . package packing qty part number qfn t=3000 ty=2600 CHL8326 - 00crt CHL8326 - 00crty qfn t=3000 CHL8326 - xxcrt 1 qfn t=3000 ty=2600 chl8328 - 00crt chl8328 - 00crty qfn t=3000 chl8328 - xxcrt 1 notes: 1 . xx indicates a customer specific configuration file . figure 4: ir3538/chl8328 package t op view, enlarged t C tape & reel / ty - tray r C package type ( qfn ) c C operating temperature, commercial xx C configuration file p art C 6 : CHL8326 8 : chl8328 p/pbf C lead free t r C tape & reel / ty - tray yy C configuration file id xx C customer id package type (qfn) part C : ir3536 8 : ir3538 4 9 g n d c h l 8 3 2 6 4 8 p i n 7 x 7 q f n t o p v i e w 1 2 7 8 5 6 3 4 1 0 9 1 2 1 1 3 6 3 5 3 0 2 9 3 2 3 1 3 4 3 3 2 7 2 8 2 5 2 6 4 7 4 3 4 5 4 0 4 6 4 2 4 4 3 9 4 1 4 8 3 8 3 7 1 4 1 8 1 6 2 1 1 5 1 9 1 7 2 2 2 0 1 3 2 3 2 4 s m b _ d i o p w m 5 i s e n 6 e n a b l e v r t n r c s m i s e n 5 i s e n 4 i s e n 3 p w m 6 v s e n s m b _ c l k p w m 4 v r _ r e a d y 1 / p w r g d 2 i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t # 1 / v r h o t _ i c r i t # 2 p w m 3 v i n s e n s m b _ a l e r t # v 1 8 a r r e s v c c i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 g p o _ a 1 / c b o u t 2 r c s m _ l 2 r c s p _ l 2 s v _ a d d r _ g p o _ d 1 / v i d [ 1 ] 2 c f p 1 / v f i x e n _ p s i 2 p m _ a d d r _ g p o _ c 1 / p m _ a d d r _ v i d [ 0 ] 2 s v _ d i o 1 / s v d _ v i d [ 2 ] 2 s v _ c l k 1 / s v c _ v i d [ 3 ] 2 s v _ a l e r t 1 / v i d [ 4 ] 2 v r _ r e a d y _ l 2 1 / p w r o k 2 v c c p s i 1 / v i d [ 5 ] 2 v a r _ g a t e v r t n _ l 2 v s e n _ l 2 s m b _ d i o p w m 5 i s e n 6 e n a b l e v r t n r c s m i s e n 5 i s e n 4 i s e n 3 p w m 6 v s e n s m b _ c l k p w m 4 v r _ r e a d y 1 / p w r g d 2 i r t n 3 i r t n 4 i r t n 6 i r t n 5 r c s p t s e n v r _ h o t # 1 / v r h o t _ i c r i t # 2 p w m 3 v i n s e n s m b _ a l e r t # v 1 8 a r r e s v c c i s e n 2 i s e n 1 i r t n 1 i r t n 2 p w m 2 p w m 1 g p o _ a 1 / c b o u t 2 r c s m _ l 2 r c s p _ l 2 s v _ a d d r _ g p o _ d 1 / v i d [ 1 ] 2 c f p 1 / v f i x e n _ p s i 2 p m _ a d d r _ g p o _ c 1 / p m _ a d d r _ v i d [ 0 ] 2 s v _ d i o 1 / s v d _ v i d [ 2 ] 2 s v _ c l k 1 / s v c _ v i d [ 3 ] 2 s v _ a l e r t 1 / v i d [ 4 ] 2 v r _ r e a d y _ l 2 1 / p w r o k 2 v c c p s i ( m p o l ) 1 / v i d [ 5 ] 2 p w m 7 v r t n _ l 2 v s e n _ l 2 5 7 g n d c h l 8 3 2 8 5 6 p i n 8 x 8 q f n t o p v i e w 5 5 5 1 5 3 4 8 5 4 5 0 5 2 4 7 4 9 5 6 4 6 4 5 4 3 4 4 1 2 7 8 5 6 3 4 1 0 9 1 2 1 1 1 4 1 3 1 6 2 0 1 8 2 3 1 7 2 1 1 9 2 4 2 2 1 5 2 5 2 6 2 8 2 7 4 2 4 1 3 6 3 5 3 8 3 7 4 0 3 9 3 3 3 4 3 1 3 2 2 9 3 0 i s e n 8 g p o _ b t s e n 2 v a r _ g a t e p w m 8 i s e n 7 i r t n 7 i r t n 8 1 i n t e l / m p o l m o d e 2 a m d m o d e
june 21 , 201 3 | final | v1.0 9 3 digital multi - p hase buck controller ir3536/38 CHL8326/28 functional block dia gram figure 5 : ir3536/CHL8326 and chl8328 functional block diagram ir3538/chl8328 ir3538/chl8328 ir3538/ ir3536/ ir3538/ CHL8326 chl8328 i s e n 1 i r t n 1 i s e n x i r t n x i s e n y i r t n y i s e n z i r t n z t s e n v i n s e n v o l t a g e a d c v s e n v r t n c o n t r o l a n d m o n i t o r i n g v o u t 1 _ e r r o r v o u t 2 _ e r r o r p w m 1 p w m 2 p w m 3 p w m 4 p w m 5 r e f e r e n c e , o s c i l l a t o r , s t a t e c o n t r o l , i n t e r f a c e s , r e g i s t e r s a n d n v m s v _ c l k 1 / s v c _ v i d [ 3 ] 2 a d c c l o c k s m u x c l o c k s p h a s e _ p e r i o d _ 1 p h a s e _ p e r i o d _ 2 v 3 _ 3 i o u t v i n t e m p f a u l t b u s s y s t e m c l o c k i o u t v i n t e m p v o u t f a u l t b u s s y s t e m c l o c k v i d _ 1 v i d _ 2 c u r r e n t a d c i t o t _ 1 i t o t _ 2 i p 1 i p x i p y i p 1 i p 6 i p 7 i p 8 m o d e c o n t r o l i p z v a r _ g a t e l d o v c c 1 . 8 v v 1 8 a s v _ d i o 1 / s v d _ v i d [ 2 ] 2 s m b _ a l e r t v r _ h o t # 1 / v r h o t _ i c r i t # 2 v r _ r e a d y 1 / p w r g d 2 v r _ r e a d y _ l 2 1 / p w r o k 2 p h a s e _ p e r i o d _ 1 p h a s e _ p e r i o d _ 2 r r e s r c s p r s c m a f e _ 1 v i d _ 1 s m b _ d i o s m b _ c l k s v _ a d d r 1 / v i d [ 1 ] 2 c f p 1 / v f i x e n _ p s i 2 p m _ a d d r 1 / p m _ a d d r _ v i d [ 0 ] 2 p s i 1 / v i d [ 5 ] 2 e n p w m 6 p w m 7 p w m 8 o n l y f o r c h l 8 3 2 8 p w m g e n e r a t o r . . . . . . . . . . . . . . . . . . . . . . . . o n l y f o r c h l 8 3 2 8 c h l 8 3 2 6 c h l 8 3 2 8 x 3 4 y 4 5 z 6 8 s v _ a l e r t # 1 / v i d [ 4 ] 2 g p o _ a g p o _ b o n l y f o r c h l 8 3 2 8 1 i n t e l / m p o l m o d e 2 a m d m o d e t s e n 2 v s e n _ l 2 v r t n _ l 2 r c s p _ l 2 r s c m _ l 2 a f e _ 2 v i d _ 2 i t o t _ 2 m o n i t o r a d c
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