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acpl-570xl, acpl-573xl, acpl-177xl, 5962-08227 hermetically sealed 3.3v, low i f , wide v cc , high gain optocouplers data sheet caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. description these devices are single, dual, and quad channel, hermeti - cally sealed optocou p lers. the products are capable of operation and storage over the full military temperature range and can be purchased as either standard product or with full mil-prf-38534 class level h or k testing or from dscc drawing 5962-08227. all devices are manufac - tured and tested on a mil-prf-38534 certifed line and are included in the dscc qualifed products database sup - plemental information sheets qpdsis-38534 as hybrid microcircuits. each channel contains a gaasp light emitting diode which is optically coupled to an integrated high gain photon detector. the high gain output stage features an open collector output providing both lower saturation voltage and higher signaling speed than possible with conven - tional photo-darlin g ton optocouplers. the supply voltage can be operated as low as 3.0 v without adversely afecting the parametric performance. these devices have a 300% minimum ctr at an input current of only 0.5 ma making them ideal for use in low input current applications such as mos, cmos, low power logic interfaces or line receivers. the connection of a 0.1 f bypass capacitor between v cc and gnd is recommended. features ? low power consumption ? 3.3v supply voltages ? dual marked with device part number and dscc drawing number ? manufactured and tested on a mil-prf-38534 certifed line ? qpdsis-38534, class h and k ? three hermetically sealed package confgurations ? performance guaranteed over full military temperature range: -55c to +125c ? low input current requirement: 0.5 ma ? high current transfer ratio: 1500% typical @ i f = 0.5 ma ? low output saturation voltage: 0.11 v typical ? 1500 vdc withstand test voltage ? hcpl-4701/31, -070a/31 function compatibility applications ? military and aerospace ? high reliability systems ? telephone ring detection ? microprocessor system interface ? transportation, medical, and life critical systems ? isolated input line receiver ? eia rs-232-c line receiver ? voltage level shifting ? isolated input line receiver ? isolated output line driver ? logic ground isolation ? harsh industrial environments ? current loop receiver ? system test equipment isolation ? process control input/output isolation
2 functional diagram multiple channel devices available package styles for these parts are 8 and 16 pin dip through hole (case outlines p and e respe c tively). devices may be purchased with a variety of lead bend and plating options. see selection guide table for details. standard military drawing (smd) parts are available for each package and lead style. because the same electrical die (emitters and detectors) are used for each channel of each device listed in this data sheet, absolute maximum ratings, recommended operating conditions, electrical specifcations, and perfor - mance characteristics shown in the fgures are similar for all parts except as noted. additionally, the same package assembly processes and materials are used in all devices. these similarities justify the use of a common data base for die related reliability. truth table (positive logic) input output on (h) l of (l) h 7 5 6 8 2 3 4 1 selection guide C package styles and lead confguration options package 16 pin dip 8 pin dip 8 pin dip lead style through hole through hole through hole channels 4 1 2 common channel wiring vcc, gnd none vcc, gnd avago part # & options commercial acpl-1770l acpl-5700l acpl-5730l mil-prf-38534, class h acpl-1772l acpl-5701l acpl-5731l mil-prf-38534, class k acpl-177kl acpl-570kl acpl-573kl standard lead finish gold plate gold plate gold plate solder dipped* option -200 option -200 option -200 butt cut/gold plate option -100 option -100 option -100 gull wing/soldered* option -300 option -300 option -300 class h smd part # prescript for all below 5962- 5962- 5962- either gold or solder 0822703hex 0822701hpx 0822702hpx gold plate 0822703hec 0822701hpc 0822702hpc solder dipped* 0822703hea 0822701hpa 0822702hpa butt cut/gold plate 0822703huc 0822701hyc 0822702hyc butt cut/soldered* 0822703hua 0822701hya 0822702hya gull wing/soldered* 0822703hta 0822701hxa 0822702hxa class k smd part # prescript for all below 5962- 5962- 5962- either gold or solder 0822703kex 0822701kpx 0822702kpx gold plate 0822703kec 0822701kpc 0822702kpc solder dipped* 0822703kea 0822701kpa 0822702kpa butt cut/gold plate 0822703kuc 0822701kyc 0822702kyc butt cut/soldered* 0822703kua 0822701kya 0822702kya gull wing/soldered* 0822703kta 0822701kxa 0822702kxa * solder contains lead.
3 outline drawings 16 pin dip through hole, 4 channels device marking functional diagrams 16 pin dip 8 pin dip 8 pin dip through hole through hole through hole 4 channels 1 channel 2 channels 16 11 10 9 7 5 6 8 2 1 3 4 12 14 15 13 7 5 6 8 2 3 4 1 7 5 6 8 2 3 4 1 a qyywwz xxxxxx xxxxxxx xxx xxx 50434 avago logo avago p/n dscc smd* dscc smd* pin one/ esd ident compliance indicator,* date code, suffix (if needed) country of mfr. avago cage code* *qualified parts only s 8 pin dip through hole, 1 and 2 channel note: dimensions in millimeters (inches). 3.81 (0.150) min. 4.32 (0.170) max. 9.40 (0.370) 9.91 (0.390) 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.76 (0.030) 1.27 (0.050) 8.13 (0.320) max. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 7.16 (0.282) 7.57 (0.298) 4.45 (0.175) max. 20.06 (0.790) 20.83 (0.820) 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.89 (0.035) 1.65 (0.065) 8.13 (0.320) max. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 3.81 (0.150) min.
4 hermetic optocoupler options option description 100 surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. this option is available on com - mercial and hi-rel product in 8 and 16 pin dip (see drawings below for details). 200 lead fnish is solder dipped rather than gold plated. this option is available on commercial and hi-rel product in 8 and 16 pin dip. dscc drawing part numbers contain provisions for lead fnish. 300 surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. this option is available on commercial and hi-rel product in 8 and 16 pin dip (see drawings below for details). this option has solder dipped leads. solder contains lead. note: dimensions in millimeters (inches). 1.14 (0.045) 1.40 (0.055) 4.32 (0.170) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 1.14 (0.045) 1.40 (0.055) 4.32 (0.170) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) note: dimensions in millimeters (inches). 1.40 (0.055) 1.65 (0.065) 4.57 (0.180) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.51 (0.020) min. 4.57 (0.180) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 1.40 (0.055) 1.65 (0.065) 9.65 (0.380) 9.91 (0.390) 5 max. 4.57 (0.180) max. 0.20 (0.008) 0.33 (0.013)
5 absolute maximum ratings parameter symbol min. max. units notes storage temperature t s -65 +150 c operating temperature t a -55 +125 c case temperature t c +170 c junction temperature t j +175 c lead solder temperature 260 for 10 sec c output current (each channel) i o 40 ma output voltage (each channel) v o -0.5 20 v 1 supply voltage v cc -0.5 20 v 1 output power dissipation (each channel) 50 mw 2 peak input current (each channel, <1 ms duration) 20 ma average input current (each channel) i f 10 ma 3 reverse input voltage (each channel) v r 5 v package power dissipation (each channel) p d 200 mw esd classifcation (mil-std-883, method 3015) acpl-5700l/01l/0kl ( ), class 2 acpl-5730l/31l/3kl ( a), class 3a acpl-1770l/2l/kl ( b), class 3b 8 pin ceramic dip single channel schematic recommended operating conditions parameter symbol min. max. units input current, low level (each channel) i f(off) 2.0 a input current, high level (each channel) i f(on) 0.5 5 ma supply voltage v cc 3.0 7.0 v output voltage v o 3.0 7.0 v anode 3 cathode 6 5 v cc v o i cc gnd i o i f 2 + ? v f 8
6 electrical characteristics, t a = -55c to +125c, unless otherwise specifed parameter symbol test conditions group a [13] subgroup limits units fig. note min. typ.* max. current transfer ratio ctr i f = 0.5 ma, v o = 0.4 v, v cc = 3.0 v 1, 2, 3 300 1500 % 3 4, 5 i f = 1.6 ma, v o = 0.4 v, v cc = 3.0 v 300 1300 i f =5 ma, v o = 0.4 v, v cc = 3.0 v 200 800 logic low output voltage v ol i f = 0.5 ma, i ol = 1.5 ma, v cc = 3.0 v 1, 2, 3 0.05 0.4 v 2 4 i f = 1.6 ma, i ol = 4.8 ma, v cc = 3.0 v 0.06 0.4 4 i f =5 ma, i ol = 10 ma, v cc = 3.0 v 0.09 0.4 4 logic high output current i oh i f =2 a, v o = 7 v, v cc = 7 v 1, 2, 3 1.0 100 a 4 i ohx 100 a 4, 6 logic low supply current i ccl i f =1.6 ma, v cc = 7 v i f1 =i f2 = 1.6 ma, v cc = 7 v 1, 2, 3 0.8 0.8 2 4 ma 4 i f1 = i f2 =i f3 =i f4 =1.6 ma, v cc = 7 v 1.3 4 logic high supply current i cch i f =0 ma, v cc = 7 v i f1 =i f2 = 0 ma, v cc = 7 v 1, 2, 3 0.01 20 40 a i f1 = i f2 =i f3 =i f4 =0 ma, v cc = 7 v 40 input forward voltage v f i f = 1.6 ma 1, 2, 3 1.0 1.4 1.8 v 1 4 input reverse breakdown voltage b vr i r = 10 a 1, 2, 3 5 v 4 input-output insulation leakage current i i-o 65% relative humidity t a =25c, t = 5 s, v i-o = 1500 vdc 1 1.0 a 7, 12 capacitance between input-output c i-o f = 1 mhz, t a =25c 4 4 pf 4, 8, 14 * all typical values are at v cc = 3.3 v, t a = 25c. single channel dual channel quad channel single channel dual channel quad channel
7 typical characteristics, t a = 25c parameter sym. typ. units test conditions note input capacitance c in 60 pf v f =0 v, f = 1 mhz 4 input diode temperature coefcient v f / t a -1.8 mv/c i f = 1.6 ma 4 resistance (input-output) r i-o 10 12 v i-o = 500 v 4, 8 capacitance (input-output) c i-o 2.0 pf f = 1 mhz 4, 8 dual and quad channel product only input-input leakage current i i-i 0.5 na relative humidity = 65%, v i-i = 500 v, t = 5 s 9 resistance (input-input) r i-i 10 12 v i-i = 500 v 9 capacitance (input-input) c i-i 1.0 pf f = 1 mhz 9 electrical characteristics (cont), t a = -55c to +125c, unless otherwise specifed parameter symbol test conditions group a [13] subgroup limits units fig. note min. typ.* max. propagation delay time to logic low at output t phl i f = 0.5 ma, r l = 2.2 k , v cc = 3.3 v 9, 10, 11 40 100 s 5, 6, 7, 8 4 t phl i f = 1.6 ma, r l = 680 , v cc = 3.3 v 9, 10, 11 9 30 4 t phl i f =5 ma, r l = 330 , v cc = 3.3 v 9 2 5 4 10, 11 10 propagation delay time to logic high at output t plh i f = 0.5 ma, r l = 2.2 k , v cc = 3.3 v 9, 10, 11 10 60 s 5, 6, 7, 8 4 t plh i f = 1.6 ma, r l = 680 , v cc = 3.3 v 9, 10, 11 8 50 4 t plh i f =5 ma, r l = 330 , v cc = 3.3 v 9 6 20 4 10, 11 30 common mode transient immunity at low output level |cm l | v cc = 3.3 v, i f = 1.6 ma r l = 680 k |v cm |= 50 v p-p 9, 10, 11 500 1000 v/ s 9 4, 10 11, 14 common mode transient immunity at high output level |cm h | v cc = 3.3 v , i f =0 ma r l = 680 k |v cm |= 50 v p-p 9, 10, 11 500 1000 v/ s 9 4, 10 11, 14 * all typical values are at v cc = 3.3 v, t a = 25c.
8 notes: 1. gnd pin should be the most negative voltage at the detector side. keeping v cc as low as possible, but greater than 2.0 v, will provide lowest total i oh over temperature. 2. output power is collector output power plus total supply power for the single channel device. for the dual channel device, output power is collector output power plus one half the total supply power. for the quad channel device, output power is collector output power plus one fourth of total supply power. derate at 1.66 mw/c above 110c. 3. derate i f at 0.33 ma/c above 110c. 4. each channel. 5. current transfer ratio is defned as the ratio of output collector current, i o , to the forward led input current, i f , times 100%. 6. i ohx is the leakage current resulting from channel to channel optical crosstalk. i f = 2 a for channel under test. for all other channels, i f = 10 ma. 7. all devices are considered two-terminal devices; measured between all input leads or terminals shorted together and all output leads or terminals shorted together. 8. measured between each input pair shorted together and all output connections for that channel shorted together. 9. measured between adjacent input pairs shorted together for each multi-channel device. 10. cm l is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (v o < 0.8 v). cm h is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic high state (v o > 2.0 v). 11. in applications where dv/dt may exceed 50,000 v/ s (such as a static discharge) a series resistor, r cc , should be included to protect the detector ics from destructively high surge currents. the recommended value is: 1 (v) r cc = k 0.15 i f (ma) for single channel; 1 (v) r cc = k 0.3 i f (ma) for dual channel; 1 (v) r cc = k 0.6 i f (ma) for quad channel. 12. this is a momentary withstand test, not an operating condition. 13. standard parts receive 100% testing at 25c (subgroups 1 and 9). smd and 883b parts receive 100% testing at 25,125, and -55c (subgroups 1 and 9, 2 and 10, 3 and 11, respectively). 14. parameters tested as part of device initial characterization and after design and process changes. parameters guaranteed to limits specifed for all lots not specifcally tested.
9 0 1 2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v o - output voltage - v i o - n o m i n a l i z e d o u t p u t c u r r e n t 1.0 ma 4.5 ma 5.0 ma 4.0 ma 3.5 ma 3.0 ma 2.5 ma 2.0 ma 1.5 ma nominalized at: i o at i f = 0.5 ma i f = 0.5 ma v cc = 3 . 3 v t a = 25c 0.0 0.5 1.0 1.5 0.1 1 10 i f -input diode forward current ma ctr-norminalized current transfer ratio t a = 55c t a = 0c t a = 25c t a = 125c t a = 100c norminalized at: ctr at i f = 0.5 ma t a = 25c v cc = 3.3v v o = 0.4v 0.01 0.1 1 10 100 0.1 1 10 100 i f - input diode forward current ma i cc - nominalized supply current v cc = 3.3v v cc = 18v norminalized at: i cc at i f = 1.6 ma (all channels) v cc = 18v t a = 25c 0.1 1 10 100 0.1 1 10 100 t - input pulse period ms t phl - propagation delay to logic low s i f = 0.5 ma, r l = 2.2 kohm i f = 1.6 ma, r l = 680 ohm i f = 5.0 ma, r l = 330 ohm v cc = 3.3v t a = 25c width = 50 s figure 2. normalized dc transfer characteristics. figure 3. normalized current transfer ratio vs. input diode forward current. figure 1. input diode forward current vs. forward voltage. figure 4. normalized supply current vs. input diode forward current. figure 5. propagation delay to logic low vs. input pulse period.
10 figure 8. switching test circuit. figure 9. test circuit for transient immunity and typical waveforms. i f r l r cc * 56 ? 1.0 f +3 v v o * see note 11 rm i f monitor pulse gen. z o = 50 ? t r , t f = 5.0 ns f = 100 hz t pulse = 0.5ms c l ** ** c l includes probe and stray wiring capacitance. 7 5 6 8 2 3 4 1 v ff i f v cm r l r cc * 56 ? 1.0 f +3 v v o + ? pulse gen. * see note 11 a b 7 5 6 8 2 3 4 1 figure 6. propagation delay vs. temperature. figure 7. propagation delay vs. input diode forward current. 0 10 20 30 40 50 60 -80 -60 -40 -20 0 20 40 60 80 100 120 140 160 t a - temperaturec t p - propagation delay s i f = 0.5ma, r l = 2.2kohm i f = 1.6ma, r l = 680ohm i f = 5.0ma, r l =330ohm 0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 10 12 i f - input diode forward current ma t p - propagation delay s t phl , r l = 330ohm to 2.2kohm t plh , r l = 2.2kohm t plh , r l = 680ohm t plh , r l = 330ohm v cc = 3.2v t a = 25c pulse width = 50 s period = 10ms tphl tplh tplh tplh tphl tphl
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2009 avago technologies. all rights reserved. av02-1819en - march 25, 2009 mil-prf-38534 class h, class k, and dscc smd test program avagos hi-rel optocouplers are in compliance with mil- prf-38534 class h and k. class h and class k devices are also in compliance with dscc drawing 5962-08227. testing consists of 100% scree n ing and quality confor - mance inspection to mil-prf-38534. figure 11. operating circuit for burn-in and steady state life tests. * all channels tested simultaneously. v oc conditions: i f = 5 ma i o = 10 ma t a = +125c v cc + 18 v v in + ? (each output) (each input) 0.01 f 2 3 4 1 7 5 6 8 figure 10. recommended drive circuitry using ttl open-collector logic. i leak r 2 may be omitted if additional fanout is not used. r 1 r 2 v cc r 2 2.4 v f i f 7 5 6 8 2 3 4 1 r 1 v cc v f i f r 2 i f + i leak

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