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tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 1 (13) www.vishay .de ? faxback +1-408-970-5600 document number 82516 fast infrared transceiver module family (1.152 mbit/s) for 3.3 v and 5.0 v operation description the tfdu5100, tfds5500, and tfdt5500 are a family of lowpower infrared transceiver modules compliant to the irda 1.2 standard for fast infrared data communication, supporting irda speeds up to 1.152 mbit/s (medium ir, mir), hp-sir, sharp ask and carrier based remote control modes up to 500 khz. integrated within the transceiver modules are a photo pin diode, infrared emitter (ired), and a lowpower cmos control ic to provide a total frontend solution in a single package. vishay semiconductors transceivers are available in three package options, including our baby face package (as tfdu5100), the smallest mir transceiver available on the market. this wide selection provides flexibility for a variety of applications and space constraints. the transceivers are capable of directly interfacing with a wide variety of i/o chips which perform the modulation/ demodulation function, including national semiconductor's pc87338, pc87108 and pc87109, smc's fdc37c669, fdc37n769 and cam35c44, and hitachi's sh3. at a minimum, a currentlimiting resistor in series with the infrared emitter and a v cc bypass capacitor are the only external components required to implement a complete solution. features compliant to irda 1.2 (up to 1.152 mbit/s), hpsir ? , sharp ask ? and tv remote operating in 3.3 v and 5 v applications low power consumption (3 ma supply current) power shutdown mode (1 a shutdown current) three surface mount package options universal (9.7 4.7 4.0 mm) side view (13.0 5.95 5.3 mm) top view (13.0 7.6 5.95 mm) high efficiency emitter baby face (universal) package capable of surface mount solderability to side and top view orientation directly interfaces with various super i/o and controller devices builtin emi protection no external shielding necessary few external components required backward compatible to all v ishay semiconductors sir and fir infrared transceivers applications notebook computers, desktop pcs, palmtop computers (win ce, palm pc), pdas digital still and video cameras printers, fax machines, photocopiers, screen projectors telecommunication products (cellular phones, pagers) internet tv boxes, video conferencing systems external infrared adapters (dongles) medical and industrial data collection package options tfdu5100 tfds5500 tfdt5500 baby face (universal) side view top view this product is currently in development. inquiries regarding the status of this product should be directed to vishay semiconductors marketing.
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 2 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 ordering information part number qty / reel description tfdu5100tr3 1000 pcs oriented in carrier tape for side view surface mounting tfdu5100tt3 1000 pcs oriented in carrier tape for top view surface mounting tfds5500tr3 750 pcs tfdt5500tr3 750 pcs functional block diagram comparator amplifier agc logic driver open drain driver v cc sd/mode txd gnd rxd 14871 ired anode ired cathode figure 1. functional block diagram pin description pin number function description i/o active auo and ato option aso option function descri tion i/o active 1 8 ired anode ired anode, to be externally connected to v cc through a current control resistor 2 1 ired cathode ired cathode, internally connected to driver transistor 3 7 txd transmit data input i high 4 2 rxd received data output, pushpull cmos driver output capable of driving a stan- dard cmos or ttl load. no external pullup or pulldown resistor is required (pin is floating when device is in shut- down mode) o low 5 6 sd/mode shutdown/mode i high 6 3 v cc supply voltage 7 5 mode high: high speed mode, mir; low: low speed mode, sir only (see chapter amode switchingo) i 8 4 gnd ground
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 3 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 auo option baby face (universal) aso option side view ato option top view ired detector ired detector ired detector 14885 figure 2. pinnings absolute maximum ratings reference point pin gnd unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions symbol min. typ. max. unit supply voltage range v cc 0.5 6 v input currents for all pins, except ired anode pin 10 ma output sinking current 25 ma power dissipation see derating curve p d 350 mw junction temperature t j 125 5 c ambient temperature range (operating) t amb 25 +85 5 c storage temperature range t stg 25 +85 5 c soldering temperature see recommended solder profile (see figure 9) 240 5 c average output current i ired (dc) 135 ma repetitive pulsed output current <90 m s, t on <20% i ired (rp) 600 ma ired anode voltage v ireda 0.5 v cc +1.5 v transmitter data input voltage v txd 0.5 v cc +0.5 v receiver data output voltage v rxd 0.5 v cc +0.5 v virtual source size method: (11/e) encircled energy d 2.5 2.8 mm maximum intensity for class 1 operation of iec8251 or en608251 (worst case irda fir pulse pattern) en60825, 1997 320 mw/sr
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 4 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 electrical characteristics . t amb = 25 c, v cc = 3.0 v to 5.25 vunless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions / pins symbol min. typ. max. unit transceiver supply voltage v cc 3 3.3 5.25 v dynamic supply current sd = low, e e = 0 klx sd = low, e e = 1 klx *) receive mode only. in transmit mode, add additional 100 ma (typ) for ired current. i cc 3 3 4.5 4.5 ma standby supply current sd = high **) mode = floating, txd = 0 v t = 25 5 c, e e = 0 klx t = 25 5 c, e e = 1 klx *) i sd 1 1.5 m a m a sd = high **) mode = floating, txd = 0 v, t = 85 5 c not ambient light sensitive i sd 5 m a operating temperature range t a 25 +85 5 c output voltage low r load = 2.2 k c load = 15 pf v ol 0.5 0.8 v output voltage high r load = 2.2 k c load = 15 pf v oh v cc 0.5 v input voltage low (txd, sd/mode, mode) v il 0 0.8 v input voltage high (txd, sd/mode, mode) cmos level v ih 0.9 y v cc v (txd , sd/mode , mode) ttl level, v cc . 4.5 v ih 2.4 v input leakage current (txd, sd/mode, mode) i l 10 +10 m a input capacitance c i 5 pf *) standard illuminant a **) cmos level only, not ttl
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 5 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 optoelectronic characteristics t amb = 25 c, v cc = 3.0 v to 5.25 v unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions symbol min. typ. max. unit receiver minimum detection threshold irradiance sir mode tfds5500/tfdt5500 9.6 kbit/s to 115.2 kbit/s, 3.0 v = 850 nm 900 nm e e 20 35 mw/m 2 sir mode tfdu5100 9.6 kbit/s to 115.2 kbit/s, 3.0 v = 850 nm 900 nm e e 25 40 mw/m 2 minimum detection threshold irradiance mir mode tfds5500/tfdt5500, 3.0 v 1.152 mbit/s = 850 nm 900 nm e e 65 90 mw/m 2 mir mode tfdu5100, 3.0 v 1.152 mbit/s, = 850 nm 900 nm e e 85 100 mw/m 2 maximum detection threshold irradiance v cc = 3.0 v = 850 nm 900 nm e e 5 10 kw/m 2 logic low receiver input irradiance e e 4 mw/m 2 rise time of output signal 10% to 90%, @2.2 k w , 15 pf t r (rxd) 10 40 ns fall time of output signal 90% to 10%, @2.2 k w , 15 pf t f (rxd) 10 40 ns rxd pulse width of input pulse length 20 m s, 9.6 kbit/s t pw 1.2 10 20 m s rxd pulse width of output signal, 50%, sir mode input pulse length 1.41 m s, 115.2 kbit/s t pw 1.2 1/2 bit lenght m s rxd pulse width of output signal, 50%, mir mode input pulse length 217 ns, 1.152 mbit/s t pw 110 260 ns jitter, leading edge, mir mode input irradiance = 100 mw/m 2 , 1.152 mbit/s mode 10 ns latency t l 120 m s transmitter ired operating cur- rent r1 = 7.2 w, v cc = 5.0 v i d 0.4 0.55 a output radiant inten- vcc = 5.0 v, a = 0 , 15 i e 100 140 320 mw/sr out ut radiant inten sity, (see fig. 3) vcc 5.0 v, a 0 , 15 txd = high, sd = low, r1 = 7.2 w i e 100 140 320 mw/sr output radiant inten- sity vcc = 5.0 v, a = 0 , 15 txd = low, or sd = high (receiver is inactive as long as sd = high) r1 = 7.2 w i e 0.04 mw/sr output radiant inten- sity, angle of half intensity + 24 peak emission wavelength p 880 900 nm optical rise time, fall time t ropt , t fopt 10 40 ns optical overshoot 10 %
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 6 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 recommended circuit diagram the only required component for designing an irda 1.2 compatible design using vishay semiconductors fir transceivers is a current limiting resistor, r1, to the ired. however, depending on the entire system design and board layout, additional components may be required (see figure 3). mode txd sd/mode gnd v cc ired cathode rxd ired anode tfdx5x00 r1 c1 c2 r2 v cc rxd txd gnd sd/mode note: outlined components are optional depending on the quality of the power supply. 14911 figure 3. recommended application circuit vishay semiconductors transceivers integrate a sensitive receiver and a builtin power driver. the combination of both needs a careful circuit board layout. the use of thin, long resistive and inductive wiring should be avoided. the inputs (txd, sd/mode) and the output rxd should be directly (dc) coupled to the i/o circuit. r1 is used for controlling the current through the ir emitter. for increasing the output power of the ired, the value of the resistor should be reduced. similarly, to reduce the output power of the ired, the value of the resistor should be increased. for typical values of r1 see figure 4. for irda compliant operation, a current control resistor of 7.2 w is recommended. the upper drive current limitation is dependent on the duty cycle and is given by the absolute maximum ratings on the data sheet. r2, c1 and c2 are optional and dependent on the quality of the supply voltage v cc and injected noise. an unstable power supply with dropping voltage during transmission may reduce sensitivity (and transmission range) of the transceiver. 0 100 200 300 400 500 0246810121416 current control resistor ( ) 14379 intensity (mw/sr) min. intensity in emission cone 15 5 max.r dson , max.v f max. intensity in emission cone 15 5 v cc =4.75v min. r dson , min. v f 5.0v 5.0v 5.25v figure 4. intensity i e vs. current control resistor r1 the placement of these parts is critical. it is strongly recommended to position c2 as near as possible to the transceiver power supply pins. an electrolytic capacitor should be used for c1 while a ceramic capacitor is used for c2. also, when connecting the described circuit to the power supply, low impedance wiring should be used. table 1. recommended application circuit components component recommended value vishay part number c1 4.7 f, 16 v 293d 475x9 016b 2t c2 0.1 m f, ceramic vj 1206 y 104 j xxmt r1 5 v supply voltage: 7.2 w , 0.25 w (recommend using two 3.6 , 0.125 w resistors in series) 3.3 v supply voltage: 3.6 w , 0.25 w (recommend using two 1.8 , 0.125 w resistors in series) crcw12063r60frt1 crcw12061r80frt1 r2 47 w , 0.125 w crcw120647r0frt1
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 7 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 mode switching the tfdu5100, tfds5500 and tfdt5500 do not power on with a default mode, therefore the data trans- fer rate has to be set by a programming sequence using the txd and sd/mode inputs as described below or selected by setting the mode pin. the mode pin can be used to statically set the mode (mode pin: low: sir, high: 0.576 mbit/s to 1.152 mbit/s). when using the mode pin, the standby current may increase to about 50 a to 60 a when high or low. if not used or in standby mode, the mode input should float to mini- mize standby current. the low frequency mode covers speeds up to 115.2 kbit/s. signals with higher data rates should be detected in the high frequency mode. lower frequency data can also be received in the high frequency mode but with reduced sensitivity. to switch the transceivers from low frequency mode to the 1.152 mbit/s mode and vice versa, the programming sequences described below are required. txd sd/mode t s t h 50% high : mir low : sir 50% 50% 14920 figure 5. mode switching timing diagram setting to the high bandwidth mode (0.576 mbit/s to 1.152 mbit/s) 1. set sd/mode input to logic ahigho. 2. set txd input to logic ahigho. wait t s . 200 ns. 3. set sd/mode to logic alowo (this negative edge latches state of txd, which determines speed setting). 4. after waiting t h . 200 ns txd can be set to logic alowo. the hold time of txd is limited by the maximum allowed pulse length. txd is now enabled as normal txd input for the high bandwidth mode. setting to the lower bandwidth mode (2.4 kbit/s to 115.2 kbit/s) 1. set sd/mode input to logic ahigho. 2. set txd input to logic alowo. wait t s . 200 ns. 3. set sd/mode to logic alowo (this negative edge latches state of txd, which determines speed setting). 4. txd must be held for t h . 200 ns. txd is now enabled as normal txd input for the lower bandwidth mode.
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 8 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 recommended smd pad layout the leads of the device should be soldered in the center position of the pads. 15067 0.6 7 x 1 = 7 8 1 1 2.5 figure 6. tfdu5100 baby face (universal) 8765 2.5 2.5 5.1 11.8 1.8 1.1 1.0 2.2 1 0.63 0.6 12 34 2.5 2.5 5.08 8.3 15069 figure 7. tfds5500 side view package note: leads of the device should be at least 0.3mm within the ends of the pads. pad 1 is longer to designate pin 1 connection to transceiver 1.27 0.8 18 8.89 1.8 15068 figure 8. tfdt5500 top view package note: leads of the device should be at least 0.3mm within the ends of the pads. pad 1 is longer to designate pin 1 connection to transceiver.
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 9 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 recommended solder profile time ( s ) temperature ( c ) 14874 5 0 30 60 90 120 150 180 210 240 0 50 100 150 200 250 300 350 2 - 4 5 c/s 10 s max. @ 230 5 c 90 s max. 120 - 180 s 2 - 4 5 c/s figure 9. recommended solder profile current derating diagram 0 100 200 300 400 500 600 40 20 0 20 40 60 80 100 120 140 peak operating current ( ma ) temperature ( 5 c ) 14875 current derating as a function of the maximum forward current of ired. maximum duty cycle: 25%. figure 10. current derating diagram
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 10 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 tfdu5100 baby face (universal) package (mechanical dimensions) 12249 issue: 8; 10.7.98
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 11 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 tfds5500 side view package (mechanical dimensions) 14322
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 12 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 tfdt5500 top view package (mechanical dimensions) 14325
tfdu5100/tfds5500/tfdt5500 vishay semiconductors not for new design rev. 1, 01-apr-99 13 (13) www.vishay .de w faxback +1-408-970-5600 document number 82516 ozone depleting substances policy statement it is the policy of vishay semiconductor gmbh to 1. meet all present and future national and international statutory requirements. 2. regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. it is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (odss). the montreal protocol (1987) and its london amendments (1990) intend to severely restrict the use of odss and forbid their use within the next ten years. various national and international initiatives are pressing for an earlier ban on these substances. vishay semiconductor gmbh has been able to use its policy of continuous improvements to eliminate the use of odss listed in the following documents. 1. annex a, b and list of transitional substances of the montreal protocol and the london amendments respectively 2. class i and ii ozone depleting substances in the clean air act amendments of 1990 by the environmental protection agency (epa) in the usa 3. council decision 88/540/eec and 91/690/eec annex a, b and c (transitional substances) respectively. vishay semiconductor gmbh can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. we reserve the right to make changes to improve technical design and may do so without further notice. parameters can vary in different applications. all operating parameters must be validated for each customer application by the customer. should the buyer use vishay semiconductors products for any unintended or unauthorized application, the buyer shall indemnify vishay semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. vishay semiconductor gmbh, p.o.b. 3535, d-74025 heilbronn, germany telephone: 49 (0)7131 67 2831, fax number: 49 (0)7131 67 2423
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.

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