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uc1707 uc2707 uc3707 description the uc1707 family of power drivers is made with a high-speed schottky process to interface between low-level control functions and high-power switching devices - particularly power mosfets. these devices contain two independent channels, each of which can be activated by either a high or low input logic level signal. each output can source or sink up to 1.5a as long as power dissipation limits are not exceeded. although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high sig- nal at the shutdown terminal or a differential low-level analog signal. the shutdown command from either source can either be latching or not, de- pending on the status of the latch disable pin. supply voltage for both vin and vc can independently range from 5v to 40v. these devices are available in two-watt plastic "bat-wing" dip for operation over a 0c to 70c temperature range and, with reduced power, in a her- metically sealed cerdip for C55c to +125c operation. also available in surface mount dw, q, l packages. dual channel power driver features two independent drivers 1.5a totem pole outputs inverting and non-inverting inputs 40ns rise and fall into 1000pf high-speed, power mosfet compatible low cross-conduction current spike analog shutdown with optional latch low quiescent current 5v to 40v operation thermal shutdown protection 16-pin dual-in-line package 20-pin plcc and clcc package 03/99 block diagram inv. n.i. out out = inv and n.i. h h l out = inv or n.i. lhh hll lll truth table (each channel)
2 uc1707 uc2707 uc3707 supply voltage, vin, n/j-pkg . . . . . . . . . . . . . . . . . . . . . . . 40v collector supply voltage, vc, n/j-pkg . . . . . . . . . . . . . . . 40v output current (each output, source or sink) steady-state, n/j-pkg. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ma peak transient n-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5a j-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0a capacitive discharge energy n-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mj j-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mj digital inputs (see note), n/j-pkg . . . . . . . . . . . . . . . . . . . 5.5v analog stop inputs, n/j-pkg . . . . . . . . . . . . . . . . . . . . . . . . vin power dissipation at t a = 25c (see note) n-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2w j-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1w power dissipation at t (leads/case) = 25c (see note) n-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5w j-pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2w operating temperature range . . . . . . . . . . . . C55c to +125c storage temperature range . . . . . . . . . . . . . C65c to +150c lead temperature (soldering, 10 seconds) . . . . . . . . . . 300c absolute maximum ratings note: all voltages are with respect to the four ground pins which must be connected together. all currents are positive into, negative out of the specified terminal. digital drive can ex- ceed 5.5v if input current is limited to 10ma. consult pack- aging section of databook for thermal limitations and considerations of package. connection diagrams dil-16, soic-16 (top view) j or n package, 3 18 17 16 n/c 1 22019 15 14 4 5 6 7 8 911 10 12 13 input b inv. input b i.n. input a inv. input a non inv. vin ground n/c ground output b latch disable ground n/c ground output a analog stop inv. analog stop non inv. n/c shutdown vc plcc-20, lcc-20 (top view) q, l packages note: all four ground pins must be connected to a common ground.
3 uc1707 uc2707 uc3707 electrical characteristics: unless otherwise stated, these specifications apply for t a = C55c to +125c for the uc1707, C25c to +85c for the uc2707 and 0c to +70c for the uc3707; v in = v c = 20v. t a =t j . parameters test conditions min typ max units v in supply current v in = 40v 12 15 ma v c supply current v c = 40v, outputs low 5.2 7.5 ma v c leakage current v in =0, vc =30v, no load .05 0.1 ma digital input low level 0.8 v digital input high level 2.2 v input current v i = 0 C0.06 C1.0 ma input leakage v i = 5v .05 0.1 ma output high sat., v c -v o i o = C50ma 2.0 v i o = C500ma 2.5 v output low sat., v o i o = C50ma 0.4 v i o = C500ma 2.5 v analog threshold v cm = 0 to 15v 100 130 160 mv input bias current v cm = 0 C10 C20 m a thermal shutdown 155 c shutdown threshold pin 7 input 0.4 1.0 2.2 v latch disable threshold pin 3 input 0.8 1.2 2.2 v typical switching characteristics: v in = v c = 20v, t a = 25c. delays measured to 10% output change. parameters test conditions output cl = units from inv. input to output open 1.0 2.2 nf rise time delay 40 50 60 ns 10% to 90% rise 25 40 50 ns fall time delay 30 40 50 ns 90% to 10% fall 25 40 50 ns from n.i. input to output rise time delay 30 40 50 ns 10% to 90% rise 25 40 50 ns fall time delay 45 55 65 ns 90% to 10% fall 25 40 50 ns v c cross-conduction current spike duration output rise 25 ns output fall 0 ns analog shutdown delay stop non-inv. = 0v 180 ns stop inv. = 0 to 0.5v 180 ns digital shutdown delay 2v input on pin 7 50 ns
4 uc1707 uc2707 uc3707 the input zener may be used to clamp input signal voltages higher than 5v as long as the zener current is limited to 10ma max. external pull-up resistors are not required. simplified internal circuitry figure 1. typical digital input gate. figure 3. latch disable. the shutdown latch is disabled when pin 3 is open. an im- pedance of 4k or less from pin 3 to ground will allow a shut- down signal to set the latch which can then be reset by either recycling the vin supply or by momentarily (>200ns) raising pin 3 high. the input common-mode voltage range is from ground to (vin-3v). when not used both inputs shoul1d be grounded. activate time is a function of overdrive with a typical value of 180ns. pin 7 serves both as a comparator output and as a common digital shutdown input. a high signal here will accomplish the fastest turn off of both outputs. note that "off" is defined as the outputs low. pulling shutdown low defeats the latch operation regardless of its status. figure 2. typical digital input gate.
5 uc1707 uc2707 uc3707 figure 5. current limiting. the analog shutdown can give pulse-by-pulse current limiting with a reset pulse from the clock output of the uc1524. r1c1 is used to filter leading edge spikes. simplified internal circuitry (cont.) figure 4. transformer coupled push-pull mosfet drive circuit.
6 uc1707 uc2707 uc3707 figure 9. power bipolar drive circuit. d1, d2: uc3611 schottky diodes figure 6. over-voltage protection. applications with an external reference, the shutdown comparator can be used for over-voltage protection. r1 and r2 set the shutdown level while r3 adds positive feedback for hyster- esis. figure 7. power mosfet drive circuit. d1, d2: uc3611 schottky diodes figure 8. charge pump circuits. when driven with a ttl square wave drive, the low output impedance of the uc1707 allows ready implementation of charge pump voltage converters.
7 uc1707 uc2707 uc3707 unitrode corporation 7 continental blvd. ? merrimack, nh 03054 tel. (603) 424-2410 ? fax (603) 424-3460 figure 11. power mosfet drive circuit using negative bias voltage and level shifting to ground reference pwm. d1, d2: uc3611 schottky diode figure 10. transformer coupled mosfet drive circuit. transformer coupling d1, d2: uc3611 schottky diode
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1999, texas instruments incorporated
1 of 3 search power portal power management home > > power management > power supply support > mosfet and power drivers uc1707, dual channel power driver device status: active description features > description > features > datasheets > pricing/samples/availability > application notes > applications parameter name uc1707 internal regulator yes (5v) the uc1707 family of power drivers is made with a high - speed schottky process to interface between low - level control functions and high - power switching devices - particularly power mosfets. these devices contain two independent channels, each of which can be activated by either a high or low input logic level signal. each output can source or sink up to 1.5a as long as power dissipation limits are not exceeded. although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the shutdown terminal or a differential low - level analog signal. the shutdown command from either source can either be latching or not, depending on the status of the latch disable pin. supply voltage for both vin and vc can independently range from 5v to 40v. these devices are available in two - watt plastic "bat - wing" dip for operation over a 0 c to 70 c temperature range and, with reduced power, in a hermetically sealed cerdip for ? 55 c to +125 c operation. also available in surface mount dw, q, l packages. l two independent drivers l 1.5a totem pole outputs
2 of 3 to view the following documents, acrobat reader 3.x is required. to download a document to your hard drive, right - click on the link and choose 'save'. datasheets full datasheet in acrobat pdf: slus177.pdf (335 kb) pricing/samples/availability application reports l electrostatic discharge application note (ssya008 - updated: 05/05/1999 ) l thermal characteristics of linear and logic packages using jedec pcb designs (szza017a - updated: 09/10/1999 ) l u - 111, practical considerations in current mode power supplies (slua110 - updated: 12/02/1999 ) u - 118 new driver ics optimize high - speed power mosfet switching l 1.5a totem pole outputs l inverting and non - inverting inputs l 40ns rise and fall into 1000pf l high - speed, power mosfet compatible l low cross - conduction current spike l analog shutdown with optional latch l low quiescent current l 5v to 40v operation l thermal shutdown protection l 16 - pin dual - in - line package l 20 - pin plcc and clcc package orderable device package pins temp ( o c) status price/unit usd (100 - 999) pack qty dscc number availability / samples 5962 - 87619012a l 20 - 55 to 125 active 48.40 1 check stock or order 5962 - 8761901ea j 16 - 55 to 125 active 29.84 1 check stock or order 5962 - 8761901vea j 16 - 55 to 125 active 148.29 1 check stock or order uc1707j j 16 -55 to 125 active 19.01 1 check stock or order uc1707j/80900 j 16 -55 to 125 active 29.84 1 check stock or order uc1707j883b j 16 -55 to 125 active 24.60 1 check stock or order uc1707jqmlv j 16 -55 to 125 active 148.29 1 check stock or order uc1707l l 20 -55 to 125 active 58.68 1 check stock or order uc1707l883b l 20 -55 to 125 active 45.79 1 check stock or order
3 of 3 l u - 118 new driver ics optimize high - speed power mosfet switching characteristics (slua054 - updated: 11/04/1999 ) l u - 137 practical considerations in high performance mosfet, igbt and mct gate (slua105 - updated: 12/02/1999 ) table data updated on: 8/16/2000 ? copyright 2000 texas instruments incorporated. all rights reserved. trademarks | privacy policy

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