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rev.3.1 _00 2-wire cmos serial e 2 prom s-24c01b/02b/04b seiko instruments inc. 1 the s-24c01b/02b/04b is a 2-wired, low power and wide range operation 1k bit, 2k bit, 4k bit e 2 prom organized as 128 words 8 bits, 256 words 8 bits, and 512 words 8 bits in each. page write and sequential read are available. ? ? ? ? features ? low power consumption standby : 1.0 a max. (v cc = 5.5 v) oprating : 0.8 ma max. (v cc = 5.5 v) 0.3 ma max. (vcc = 3.3 v) ? wide operating voltage range : 2.0 to 5.5 ? page write : 8 bytes / page (s-24c01b/02b) 16 bytes / page (s-24c04b) ? sequential read ? operating frequency : 400 khz (v cc = 5 v 10 %) ? endurance : 10 6 cycles/word ? data retention : 10 years ? write protection s-24c01b : 100% s-24c02b/04b : 50% ? s-24c01b : 1k bit ? s-24c02b : 2k bit ? s-24c04b : 4k bit ? package drawing code package name package tape reel dp008-a ? ? dp008-c ? ? 8-pin dip dp008-e ? ? fj008-a fj008-d fj008-d 8-pin sop(jedec) fj008-a fj008-e fj008-e 8-pin msop fn008-a fn008-a fn008-a remark for details, please refer to ?product code structure? . caution this product is intended to use in general electronic devices such as consumer electronics, office equipment, and communications devices. before using the product in medical equipment or automobile equipment including car audio, keyless entry and engine control unit, contact to sii is indispensable.
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 2 seiko instruments inc. ? pin assignment 8-pin dip top view table 1 pin number pin name function 1 nc no connection ? ? ? ? 1 2 nc no connection ? ? ? ? 1 3 nc no connection ? ? ? ? 1 4 gnd ground 5 sda serial data input/output 6 scl serial clock input 7 wp write protection pin connected to vcc: protection valid connected to gnd: protection invalid 8 vcc power supply ? ? ? ? 1. connect to gnd or vcc. 1 2 3 4 8 7 6 5 vcc wp scl sda nc nc gnd nc figure 1 s-24c01bdp s-24c02bdp s-24c04bdp remark see dimensions for details of the package drawings. 8-pin sop(jedec) top view table 2 pin number pin name function 1 nc no connection ? ? ? ? 1 2 nc no connection ? ? ? ? 1 3 nc no connection ? ? ? ? 1 4 gnd ground 5 sda serial data input/output 6 scl serial clock input 7 wp write protection pin connected to vcc: protection valid connected to gnd: protection invalid 8 vcc power supply ? ? ? ? 1. connect to gnd or vcc. 1 2 3 4 8 7 6 5 vcc wp scl sda nc nc gnd nc figure 2 s-24c01bfj s-24c02bfj s-24c04bfj remark see dimensions for details of the package drawings.
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 3 8-pin msop top view table 3 pin number name function 8 nc no connection ? ? ? ? 1 7 nc no connection ? ? ? ? 1 6 nc no connection ? ? ? ? 1 5 gnd ground 4 sda serial data input/output 3 scl serial clock input 2 wp write protection pin connected to vcc: protection valid connected to gnd: protection invalid 1 vcc power supply ? ? ? ? 1. connect to gnd or vcc. figure 3 s-24c01bmfn s-24c02bmfn s-24c04bmfn remark see dimensions for details of the package drawings. 1 2 3 4 8 7 6 5 vcc wp scl sda nc nc nc gnd
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 4 seiko instruments inc. ? ? ? ? block diagram vcc gnd serial clock controller device address comparator address counter y decoder data output ack output controller start / stop detector data register e 2 prom x decoder selector high-voltage generator scl sda d in d out r / w load inc comp load wp figure 4
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 5 ? ? ? ? absolute maximum ratings table 4 parameter symbol ratings unit power supply voltage v cc ? 0.3 to +7.0 input voltage v in ? 0.3 to v cc +0.3 output voltage v out ? 0.3 to v cc v storage temperature t stg ? 65 to +150 c caution the absolute maximum ratings are rated values exceeding which the product could suffer physical damage. these values must therefore not be exceeded under any condition. ? ? ? ? recommended operating conditions table 5 parameter symbol conditions min. typ. max. unit power supply voltage v cc ? 2.0 ? 5.5 v cc = 2.5 to 5.5 v 0.7 v cc ? v cc high level input voltage v ih v cc = 2.0 to 2.5 v 0.8 v cc ? v cc v cc = 2.5 to 5.5 v 0.0 ? 0.3 v cc low level input voltage v il v cc = 2.0 to 2.5 v 0.0 ? 0.2 v cc v operating temperature t opr ? ? 40 ? +85 c ? ? ? ? pin capacitance table 6 (ta = 25 c, f = 1.0 mhz, vcc = 5 v) parameter symbol conditions min. typ. max. unit input capacitance c in v in = 0 v (scl, wp) ? ? 10 pf input/output capacitance c i/o v i/o = 0 v (sda) ? ? 10 pf ? ? ? ? endurance table 7 parameter symbol operating temperatrue min. typ. max. unit endurance n w ? 40 to + 85 c 10 6 ? ? cycles/word
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 6 seiko instruments inc. ? ? ? ? dc electrical characteristics table 8 vcc = 4.5 to 5.5 v v cc = 2.5 to 4.5 v v cc = 2.0 to 2.5 v parameter symbol conditions min. typ. max. min. typ. max. min. typ. max. unit current consumption (read) i cc1 ? ? ? 0.8 ? ? 0.3 ? ? 0.2 ma current consumption (program) i cc2 ? ? ? 4.0 ? ? 1.5 ? ? 1.5 ma table 9 v cc = 4.5 to 5.5 v v cc = 2.5 to 4.5 v v cc = 2.0 to 2.5 v parameter symbol conditions min. typ. max. min. typ. max. min. typ. max. unit standby current consumption i sb v in = v cc or gnd ? ? 1.0 ? ? 0.6 ? ? 0.4 a input leakage current i li v in = gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 a output leakage current i lo v out = gnd to v cc ? 0.1 1.0 ? 0.1 1.0 ? 0.1 1.0 a i ol = 3.2 ma ? ? 0.4 ? ? 0.4 ? ? ? v low level output voltage v ol i ol = 1.5 ma ? ? 0.3 ? ? 0.3 ? ? 0.5 v current address hold voltage v ah ? 1.5 ? 5.5 1.5 ? 4.5 1.5 ? 2.5 v
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 7 ? ? ? ? ac electrical characteristics table 10 measurement conditions input pulse voltage 0.1 v cc to 0.9 v cc input pulse rising/falling time 20 ns output judgment voltage 0.5 v cc output load 100 pf+ pullup resistance 1.0 k ? sda c=100 pf v cc r=1.0 k ? figure 5 output load circuit table 11 v cc = 4.5 to 5.5 v v cc = 2.0 to 4.5 v parameter symbol min. typ. max. min. typ. max. unit scl clock frequency f scl 0 ? 400 0 ? 100 khz scl clock time ?l? t low 1.0 ? ? 4.7 ? ? s scl clock time ?h? t high 0.9 ? ? 4.0 ? ? s sda output delay time t aa 0.1 ? 0.9 0.1 ? 3.5 s sda output hold time t dh 50 ? ? 100 ? ? ns start condition setup time t su.sta 0.6 ? ? 4.7 ? ? s start condition hold time t hd.sta 0.6 ? ? 4.0 ? ? s data input setup time t su.dat 100 ? ? 200 ? ? ns data input hold time t hd.dat 0 ? ? 0 ? ? ns stop condition setup time t su.sto 0.6 ? ? 4.7 ? ? s scl ? sda rising time t r ? ? 0.3 ? ? 1.0 s scl ? sda falling time t f ? ? 0.3 ? ? 0.3 s bus release time t buf 1.3 ? ? 4.7 ? ? s noise suppression time t i ? ? 50 ? ? 100 ns scl sda in sda out t buf t r t su.sto t su.dat t hd.dat t dh t aa t high t low t hd.sta t su.sta t f figure 6 bus timing
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 8 seiko instruments inc. table 12 item symbol min. typ. max. unit write time t wr ? 4.0 10.0 ms scl sda d0 write data acknowledge stop condition start condition t wr figure 7 write cycle timing
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 9 ? ? ? ? pin functions 1. sda (serial data input/output) pin the sda pin is used for bilateral transmission of serial data. it consists of a signal input pin and an nch open-drain transistor output pin. usually pull up the sda line via resistance to the v cc , and use it with other open-drain or open-collector output devices connected in a wired or configuration. 2. scl (serial clock input) pin the scl pin is used for serial clock input. it is capable of processing signals at the rising and falling edges of the scl clock input signal. make sure the rising time and falling time conform to the specifications. 3. wp pin the wp pin is used for write protection. when there is no need for write protection, connect the pin to the gnd; when there is a need for write protection, connect the pin to the vcc. remark please refer to the application note ? tips,tricks and traps when using the s-24c/24cs series ? for equivalent circuit of each pin.
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 10 seiko instruments inc. ? ? ? ? operation 1. start condition when the scl line is ?h? the sda line changes from ?h? to ?l?. this allows the device to go to the start condition. all operations begin from the start condition. 2. stop condition when the scl line is ?h? the sda line changes from ?l? to ?h?. this allows the device to go to the stop condition. when the device receives the stop condition signal during a read sequence, the read operation is interrupted, and the device goes to standby mode. when the device receives the stop condition signal during write sequence, the retrieval of write data is halted, and the e 2 prom initiates rewrite. t su.sta t hd.sta t su.sto start condition stop condition scl sda figure 8 start/stop condition
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 11 3. data transmission changing the sda line while the scl line is ?l? allows the data to be transmitted. a start or stop condition is recognized when the sda line changes while the scl line is ?h?. t su.dat t hd.dat scl sda figure 9 data transmission timing 4. acknowledgment the unit of data transmission is 8 bits. by turning the sda line ?l? the slave device mounted on the system bus which receives the data during the 9th clock cycle outputs the acknowledgment signal verifying the data reception. when the e 2 prom is rewriting, the device does not output the acknowledgment signal. 1 8 9 acknowledge output t aa t dh start condition scl (e 2 prom input) sda (master output) sda (e 2 prom output) figure 10 acknowledge output timing
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 12 seiko instruments inc. 5. device addressing to perform data communications, the master device mounted on the system outputs the start condition signal to the slave device. next, the master device outputs 7-bit length device address and a 1-bit length read/write instruction code onto the sda bus. upper 4 bits of the device address are called the ?device code?, and set to ?1010?. successive 3 bits are ?don?t care? bits. when the comparison results match, the slave device outputs the acknowledgment signal during the 9th clock cycle. don?t care 1 0 1 0 x x x r/w device code lsb msb s-24c01b/02b slave / page address device code s-24c04b 1 0 1 0 x x p0 r/w lsb msb figure 11 device address in the s-24c04b, 7th bit becomes ?p0?. ?p0? is a page address bit and is equivalent to an additional uppermost bit of the word address. accordingly, when p0 = ?0?, the former half area corresponding to 2 k bits (addresses from 000h to 0ffh) in the entire memory are selected; when p0 = ?1?, the latter half area corresponding to 2 k bits (addresses from 100h to 1ffh) in all areas of the memory are selected.
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 13 6. write 6.1 byte write when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?0?, following the start condition signal, it outputs the acknowledgment signal. next, when the e 2 prom receives an 8-bit length word address, it outputs the acknowledgment signal. after the e 2 prom receives 8-bit write data and outputs the acknowledgment signal, it receives the stop condition signal. next, the e 2 prom at the specified memory address starts to rewrite. when the e 2 prom is rewriting, all operations are prohibited and the acknowledgment signal is not output. x x p0 s t a r t 1 0 1 0 w r i t e device address r / w m s b sda line adr inc ( address increment ) a c k l s b 0 word address s t o p data w7 w6 w5 w4 w3 w2 w1 w0 d7 d6 d5 d4 d3 d2 d1 d0 a c k a c k remark1. w7 is optional in the s-24c01b. 2. p0 is ?don?t care? in the s-24c01b/02b. figure 12 byte write
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 14 seiko instruments inc. 6.2 page write up to 8 bytes per page can be written in the s-24c01/02b. up to 16 bytes per page can be written in the s-24c04b. basic data transmission procedures are the same as those in the ?byte write?. however, when the e 2 prom receives 8-bit write data which corresponds to the page size, the page can be written. when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?0?, following the start condition signal, it outputs the acknowledgment signal. when the e 2 prom receives an 8-bit length word address, it outputs the acknowledgment signal. after the e 2 prom receives 8-bit write data and outputs the acknowledgment signal, it receives 8-bit write data corresponding to the next word address, and outputs the acknowledgment signal. the e 2 prom repeats reception of 8-bit write data and output of the acknowledgment signal in succession. it is capable of receiving write data corresponding to the maximum page size. when the e 2 prom receives the stop condition signal, it starts to rewrite, corresponding to the size of the page, on which write data, starting from the specified memory address, is received. s t a r t 1 0 1 0 w r i t e s t o p device address word address (n) r / w m s b sda line x x p0 a c k l s b a c k a c k 0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d0 d7 d0 a c k adr inc adr inc a c k data ( n ) data ( n+1 ) data ( n+x ) w7 w6 w5 w4 w3 w2 w1 w0 adr inc remark . 1. w7 is optional in the s-24c01b. 2. p0 is ?don?t care? in the s-24c01b/02b. figure 13 page write in the s-24c01/02b, the lower 3 bits of the word address are automatically incremented each when the e 2 prom receives 8-bit write data. even if the write data exceeds 8 bytes, the upper 5 bits at the word address remain unchanged, the lower 3 bits are rolled over and overwritten. in the s-24c04b, the lower 4 bits at the word address are automatically incremented each when the e 2 prom receives 8-bit write data. even when the write data exceeds 16 bytes, the upper 4 bits of the word address and page address p0 remain unchanged, and the lower 4 bits are rolled over and overwritten .
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 15 6.3 acknowledgment polling acknowledgment polling is used to know when the rewriting of the e 2 prom is finished. after the e 2 prom receives the stop condition signal and once it starts to rewrite, all operations are prohibited. also, the e 2 prom cannot respond to the signal transmitted by the master device. accordingly, the master device transmits the start condition signal and the device address read/write instruction code to the e 2 prom (namely, the slave device) to detect the response of the slave device. this allows users to know when the rewriting of the e 2 prom is finished. that is, if the slave device does not output the acknowledgment signal, it means that the e 2 prom is rewriting; when the slave device outputs the acknowledgment signal, you can know that rewriting has been completed. it is recommended to use read instruction ?1? for the read/write instruction code transmitted by the master device. 6.4 write protection the s-24c01b/02b/04b are capable of protecting the memory. when the wp pin is connected to v cc , writing to all memory area is prohibite in the s-24c01b, writing to 50% of the latter half of memory area is prohibited in the s-24c02b/04b. (prohibited adress are 080h to 0ffh in the s-24c02b; 100h to 1ffh in the s-24c04b) even when writing is prohibited, since the controller inside the ic is operating, the response to the signal transmitted by the master device is not available during the time of writing (t wr ). when the wp pin is connected to gnd, the write protection becomes invalid, and writing in all memory area becomes available. however, when there is no need for using write protection, always connect the wp pin to gnd. the write protection is valid in the operating voltage range.
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 16 seiko instruments inc. 7. read 7.1 current address read the e 2 prom is capable of storing the last accessed memory address during both writing and reading. the memory address is stored as long as the power voltage is more than the retention voltage v ah . accordingly, when the master device recognizes the position of the address pointer inside the e 2 prom, data can be read from the memory address of the current address pointer without assigning a word address. this is called ?current address read?. ?current address read? is explained for when the address counter inside the e 2 prom is an ?n? address. when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?1?, following the start condition signal, it outputs the acknowledgment signal. however, in the s-24c04b, page address p0 becomes invalid, and the memory address of the current address pointer becomes valid. next, 8-bit length data at an ?n? address is output from the e 2 prom, in synchronization with the scl clock. the address counter is incremented at the falling edge of the scl clock by which the 8th bit of data is output, and the address counter goes to address n+1. the master device does not output the acknowledgment signal and transmits the stop condition signal to finish reading. s t a r t 1 0 1 0 r e a d s t o p device address r / w m s b sda line x x p0 d7 d6 d5 d4 d3 d2 d1 d0 a c k l s b adr inc 1 data no ack from master device remark p0 is ?don?t care? in the s-24c01b/02b figure 14 current address read for recognition of the address pointer inside the e 2 prom, take into consideration the following: the memory address counter inside the e 2 prom is automatically incremented for every falling edge of the scl clock by which the 8th bit of data is output during the time of reading. during the time of writing, upper bits of the memory address (upper 5 bits of the word address in the s-24c01b/02b; upper 4 bits of the word address and page address p0 in the s-24c04b) are left unchanged and are not incremented. ? ? ? ? 1. s-24c01b/02b is the upper 5 bits of the word address. s-24c04b is the upper 4 bits of the word address and the page address p0.
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 17 7.2 random read random read is a mode used when the data is read from arbitrary memory addresses. to load a memory address into the address counter inside the e 2 prom, first perform a dummy write according to the following procedures: when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?0?, following the start condition signal, it outputs the acknowledgment signal. next, the e 2 prom receives an 8-bit length word address and outputs the acknowledgment signal. last, the memory address is loaded into the address counter of the e 2 prom. the e 2 prom receives the write data during byte or page writing. however, data reception is not performed during dummy write. the memory address is loaded into the memory address counter inside the e 2 prom during dummy write. after that, the master device can read the data starting from the arbitrary memory address by transmitting a new start condition signal and performing the same operation as that in the ?current address read?. that is, when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?1?, following the start condition signal, it outputs the acknowledgment signal. next, 8-bit length data is output from the e 2 prom, in synchronization with the scl clock. the master device does not output an acknowledgment signal and transmits the stop condition signal to finish reading . sda line s t a r t 1 0 1 0 w r i t e device address word address (n) r / w m s b x x p0 a c k l s b w7 w6 w5 w4 w3 w2 w1 w0 a c k 0 dummy write s t o p s t a r t 1 0 1 0 r e a d device address r / w m s b x x p0 a c k l s b 1 no ack from master device adr inc data d7 d6 d5 d4 d3 d2 d1 d0 remark1. w7 is optional in the s-24c01b. 2. p0 is ?don?t care? in the s-24c01b/02b. figure 15 random read
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 18 seiko instruments inc. 7.3 sequential read when the e 2 prom receives a 7-bit length device address and a 1-bit read/write instruction code ?1? in both current and random read operations, following the start condition signal, it outputs the acknowledgment signal. when 8-bit length data is output from the e 2 prom, in synchronization with the scl clock, the memory address counter inside the e 2 prom is automatically incremented at the falling edge of the scl clock, by which the 8th data is output. when the master device transmits the acknowledgment signal, the next memory address data is output. when the master device transmits the acknowledgment signal, the memory address counter inside the e 2 prom is incremented and read data in succession. this is called ?sequential read?. when the master device does not output an acknowledgement signal and transmits the stop condition signal, the read operation is finished. data can be read in the ?sequential read? mode in succession. when the memory address counter reaches the last word address, it rolls over to the first memory address. r e a d s t o p device address r / w adr inc a c k a c k a c k 1 adr inc a c k adr inc sda line data(n) d7 d0 d7 d0 d7 d0 d7 d0 data (n+1) data (n+2) data (n+x) no ack from master device adr inc figure 16 sequential read
2-wire cmos serial e 2 prom rev.3.1 _00 s-24c01b/02b/04b seiko instruments inc. 19 8. address increment timing the address increment timing is as follows. during reading operation, the memory address counter is automatically incremented at the falling edge of the scl clock (the 8th read data is output). during writing operation, the memory address counter is also automatically incremented at the falling edge of the scl clock when the 8th bit write data is fetched. scl sda r / w = 1 address increment 8 9 1 8 9 d7 output d0 output ack output figure 17 address increment timing in reading scl sda r / w=0 8 9 1 8 9 d7 input d0 input ack output ack output address increment figure 18 address increment timing in writing
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.1 _00 20 seiko instruments inc. ? ? ? ? precautions ? generally, an e 2 prom may cause a malfunction by the operation in low voltage range induced by power on/off. the s-24c01b/02b/04b initialize themselves by the power on clear circuit at power on. attention should be paid to the followings so as to operate the power on clear circuit correctly, otherwise malfunction may occur. 1. all input and output pins should be connected to the v cc or the gnd level so as not to be floating. 2. raise the power voltage up to the operation voltage from 0 v without staying at middle range. 3. raising speed of the power voltage should be faster than 40 ms/v. 4. power off interval before power on should be longer than 100 ms. ? do not apply an electrostatic discharge to this ic that exceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products including this ic upon patents owned by a third party. ? ? ? ? i 2 c bus license purchase of i 2 c components of seiko instruments inc., conveys a license under the philips i 2 c patent. rights to use these components in an i 2 c system, is granted provided that the system conforms to the i 2 c standard specification as defined by philips. please note that a product or a system incorporating this ic may infringe upon the philips i 2 c patent rights depending upon its configuration. in the event of such infringement seiko instruments inc., shall not bear any responsibility for any matters with regard to and arising from such patent infringement.
2-wire cmos serial e 2 prom rev.3.0 _00 s-24c01b/02b/04b seiko instruments inc. 21 ? ? ? ? characteristics 1. dc characteristics 1.1 current consumption (read) i cc1 ? ambient temperature ta 1.2 current consumption (read) i cc1 ? ambient temperature ta i cc1 ( a) ? 40 0 85 200 100 v cc = 5.5 v f scl = 100 khz data = 0101 0 i cc1 ( a) 200 100 v cc = 3.3 v f scl = 100 khz data = 0101 0 ? 40 0 85 ta ( c) ta ( c) 1.3 current consumption (read) i cc1 ? ambient temperature ta 1.4 current consumption (read) i cc1 ? power supply voltage v cc i cc1 ( a) 40 20 v cc = 1.8 v f scl = 100 khz data = 0101 0 ? 40 0 85 i cc1 ( a) 100 50 0 2 3 4 5 6 7 ta = 25 c f scl = 100 khz data = 0101 ta ( c) v cc (v) 1.5 current consumption (read) i cc1 ? power supply voltage v cc 1.6 current consumption (read) i cc1 ? clock frequency fscl i cc1 ( a) 200 100 0 2 3 4 5 6 7 ta = 25 c f scl = 400 khz data = 0101 i cc1 ( a) v cc (v) f scl (hz) 200 100 0 v cc = 5.0 v ta = 25 c 100 k 200 k 300 k 400 k
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.0 _00 22 seiko instruments inc. 1.7 current consumption (program) i cc2 ? ambient temperature ta 1.8 current consumption (program) i cc2 ? ambient temperature ta i cc2 (ma) 1.0 0.5 v cc = 5.5 v 0 ? 40 0 85 i cc2 (ma) 1.0 0.5 v cc = 3.3 v 0 ? 40 0 85 ta ( c) ta ( c) 1.9 current consumption (program) i cc2 ? ambient temperature ta 1.10 current consumption (program) i cc2 ? power supply voltage v cc i cc2 (ma ) 1.0 0.5 v cc = 2.5 v 0 ? 40 0 85 i cc2 (ma) 2 3 6 7 1.0 0.5 0 4 5 ta = 25 c ta ( c) v cc (v) 1.11 standby current consumption i sb ? ambient temperature ta 1.12 input leakage current i li ? ambient temperature ta i sb (a) 10 -7 10 -8 10 -9 10 -10 v cc = 5.5 v 10 -11 ? 40 0 85 i li ( a) 1.0 0. 5 v cc = 5.5 v sda, scl, wp = 0v 0 ? 40 0 85 ta ( c) ta ( c)
2-wire cmos serial e 2 prom rev.3.0 _00 s-24c01b/02b/04b seiko instruments inc. 23 1.13 input leakage current i li ? ambient temperature ta 1.14 output leakage current i lo ? ambient temperature ta i li ( a) 1.0 0.5 0 ? 40 0 85 v cc = 5.5 v sda, scl, wp = 5.5 v i lo ( a) 1.0 0.5 v cc = 5.5 v sda = 0 v 0 ? 40 0 85 ta ( c) ta ( c) 1.15 output leakage current i lo ? ambient temperature ta 1.16 low level output voltage v ol ? low level output current i ol i lo ( a) 1.0 0.5 v cc = 5.5 v sda = 5.5 v 0 ? 40 0 85 v ol (v) 0.2 0.1 0 1 2 3 4 5 6 v cc = 3.3 v v cc = 5 v ta = 25 c ta ( c) i ol (ma) 1.17 low level output voltage v ol ? ambient temperature ta 1.18 low level output voltage v ol ? ambient temperature ta v ol (v) 0.3 0.2 v cc = 4.5 v i ol = 3.2 ma ? 40 0 85 0.1 v ol (v) 0.3 0.2 v cc = 1.8 v i ol = 100 a ? 40 0 85 0.1 ta ( c) ta ( c)
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.0 _00 24 seiko instruments inc. 1.19 low level output current i ol ? ambient temperature ta 1.20 low level output current i ol ? ambient temperature ta i ol (ma) 20 10 v cc = 4.5 v v ol = 0.45 v 0 ? 40 0 85 i ol (ma) 2.0 1.0 v cc = 1.8 v v ol = 0.1 v 0 ? 40 0 85 ta ( c) ta ( c) 1.21 high input inversion voltage vih ? power supply voltagev cc 1.22 high input inversion voltage vih ? ambient temperature ta v ih (v) ta = 25 c sda, scl, wp 1.0 0 2.0 3.0 1 2 3 4 5 6 7 v ih (v) v cc = 5.0 v sda, scl, wp 1.0 0 2.0 3.0 ? 40 0 85 v cc (v) ta ( c) 1.23 low input inversion voltage vil ? power supply voltagev cc 1.24 low input inversion voltage vil ? ambient temperature ta v il (v) ta = 25 c sda, scl, wp 1.0 0 2.0 3.0 1 2 3 4 5 6 7 v il (v) 1.0 0 2.0 3.0 ? 40 0 85 ta = 5.0 v sda, scl, wp v cc (v) ta ( c)
2-wire cmos serial e 2 prom rev.3.0 _00 s-24c01b/02b/04b seiko instruments inc. 25 2. ac characteristics 2.1 maximum operating frequency fmax ? power supply voltage v cc 2.2 write time t wr ? power supply voltage v cc f max (h z ) 10 k 2 3 4 5 ta = 25 c 1 100 k 1 m t wr (ms) 4 2 2 3 4 5 6 7 ta = 25 c 1 1 3 v cc (v) v cc (v) 2.3 write time t wr ? ambient temperature ta 2.4 write time t wr ? ambient temperature ta t wr (ms) 6 4 v cc = 4.5 v ? 40 0 85 2 t wr (ms) 6 4 v cc = 2.5 v ? 40 0 85 2 ta ( c) ta ( c) 2.5 sda output delay time t aa ? ambient temperature ta 2.6 sda output delay time t aa ? ambient temperature ta t aa ( s) 1.5 1.0 v cc = 4.5 v ? 40 0 85 0.5 t aa ( s) 1.5 1.0 v cc = 2.7 v ? 40 0 85 0.5 ta ( c) ta ( c)
2-wire cmos serial e 2 prom s-24c01b/02b/04b rev.3.0 _00 26 seiko instruments inc. 2.7 data output delay time t aa ? ambient temperature ta t aa ( s) 3.0 2.0 v cc = 1.8 v ? 40 0 85 1.0 ta ( c)
2-wire cmos serial e 2 prom rev.3.0 _00 s-24c01b/02b/04b seiko instruments inc. 27 ? product code structure s-24c0xb xx - xx - x p code (distincion for package process) none s 1a ic direction in tape specification (except 8-pin dip) package code dp : dip fj : sop mfn : msop product name s-24c01b : 1 k bits s-24c02b : 2 k bits s-24c04b : 4 k bits product name package code taping specification p code package drawing tape drawing reel drawing ? dp008-a ? ? dp008-a ? ? s dp008-e ? ? dp ? -1a dp008-c ? ? ? fj008-a fj008-d fj008-j fj008-a fj008-d fj008-d fj -tb s fj008-a fj008-e fj008-e s-24c01b s-24c02b s-24c04b mfn -tb ? fn008-a fj008-a fn008-n note 1. package dimensions of fj(sop) are same in the range of deviation. 2. please contact an sii local representative for details.

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? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. ? when the products described herein are regulated products subject to the wassenaar arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. ? use of the information described herein for other purposes and/or reproduction or copying without the express permission of seiko instruments inc. is strictly prohibited. ? the products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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