View MAX786REAI_6921296.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

__________________ general description the max786 is a system-engineered power-supply controller for notebook computers or similar battery- powered equipment. it provides two high-performance step-down (buck) pulse-width modulators (pwms) for +3.3v and +5v. other features include dual, low-dropout, micropower linear regulators for cmos/rtc back-up, and two precision low-battery- detection comparators. high efficiency (95% at 2a; greater than 80% at loads from 5ma to 3a) is achieved through synchronous recti- fication and pwm operation at heavy loads, and idle mode tm operation at light loads. the max786 uses physically small components, thanks to high operating frequencies (300khz/200khz) and a new current-mode pwm architecture that allows for output filter capacitors as small as 30? per ampere of load. line- and load- transient responses are terrific, with a high 60khz unity- gain crossover frequency allowing output transients to be corrected within four or five clock cycles. low sys- tem cost is achieved through a high level of integration and the use of low-cost, external n-channel mosfets. other features include low-noise, fixed-frequency pwm operation at moderate to heavy loads, and a synchro- nizable oscillator for noise-sensitive applications such as electromagnetic pen-based systems and communi- cating computers. the max786 is a monolithic, bicmos ic available in fine-pitch, surface-mount ssop packages. ___________________________ applications notebook computers portable data terminals communicating computers pen-entry systems ________________________________ features ? dual pwm buck controllers (+3.3v and +5v) ? two precision comparators or level translators ? 95% efficiency ? 420? quiescent current, 70? in standby (linear regulators alive) ? 25? shutdown current (+5v linear alive) ? 5.5v to 30v input range ? small ssop package ? fixed output voltages: 3.3v (standard) 3.45v (high-speed pentium ) 3.6v (powerpc) _________________or dering information max786 dual-output power-supply controller for notebook computers _______________________________________________________________________ maxim integrated products 1 19-0160; rev 2; 4/97 _____________________ pin configuration 28 27 26 25 24 23 22 21 1 2 3 4 5 6 7 8 fb3 dh3 lx3 bst3 d1 on3 ss3 cs3 top view dl3 v+ vl fb5 q1 q2 vh d2 20 19 18 17 9 10 11 12 pgnd dl5 bst5 lx5 shdn sync ref gnd ssop max786 16 15 13 14 dh5 cs5 ss5 on5 idle mode is a trademark of maxim integrated products. pentium is a trademark of intel corp. powerpc is a trademark of ibm cor p. ________t ypical application diagram max786 5.5v to 30v shutdown power section power-good low-battery warning m p memory peripherals +3.3v +5v 5v on/off 3.3v on/off sync suspend power 28 ssop 0? to +70? max786rcai 28 ssop 0? to +70? max786cai pin-package temp. range part 3.45v 3.3v v out ordering information continued at end of data sheet. evaluation kit information included for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 1-800-835-8769.
max786 dual-output power -supply contr oller for notebook computers 2 ________________________________________________________________________________________________ stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (v+ = 15v, gnd = pgnd = 0v, i vl = i ref = 0ma, shdn = on3 = on5 = 5v, other digital input levels are 0v or +5v, t a = t min to t max , unless otherwise noted.) absolute maximum ratings v+ to gnd ................................................................ -0.3v to 36v pgnd to gnd ....................................................................... 2v vl to gnd .................................................................. -0.3v to 7v bst3, bst5 to gnd ................................................. -0.3v to 36v lx3 to bst3 ............................................................... -7v to 0.3v lx5 to bst5 ............................................................... -7v to 0.3v inputs/outputs to gnd (d1, d2, shdn , on5, ref, ss5, cs5, fb5, sync, cs3,fb3, ss3, on3) ............ -0.3v to (vl + 0.3v) vh to gnd ............................................................... -0.3v to 20v q1, q2 to gnd ............................................ -0.3v to (vh + 0.3v) dl3, dl5 to pgnd ....................................... -0.3v to (vl + 0.3v) dh3 to lx3 .............................................. -0.3v to (bst3 + 0.3v) dh5 to lx5 .............................................. -0.3v to (bst5 + 0.3v) ref, vl short to gnd ................................................ momentary ref current ........................................................................ 20ma vl current .......................................................................... 50ma continuous power dissipation (t a = +70 c) ssop (derate 9.52mw/ c above +70 c) .................... 762mw operating temperature ranges max786cai/max786_cai ................................. 0 c to +70 c max786eai/max786_eai ............................... -40 c to +85 c lead temperature (soldering, 10sec) ............................ +300 c max786s max786r max786 fb3 output voltage 3.46 3.65 3.75 v 0mv < (cs3-fb3) < 70mv, 6v < v + < 30v (includes load and line regulation) 3.32 3.50 3.60 ref load regulation 30 75 mv 0ma < i l < 5ma (note 2) parameter vl output voltage min typ max 4.5 5.5 units current-limit voltage v 80 100 120 vl fault lockout voltage mv line regulation 3.6 4.2 0.03 %/v load regulation 2.5 v % 3.17 3.35 3.46 vl/fb5 switchover voltage ss3/ss5 source current 2.5 4.0 6.5 a 4.2 4.7 v ref output voltage ss3/ss5 fault sink current 2 3.24 3.36 ma v ref fault lockout voltage 2.4 3.2 v input supply range 5.5 30 v fb5 output voltage 4.80 5.08 5.20 v conditions on5 = on3 = 0v, 5.5v < v+ < 30v, 0ma < i l < 25ma cs3-fb3 or cs5-fb5 falling edge, hysteresis = 1% either controller (v+ = 6v to 30v) either controller (cs_ -fb_ = 0mv to 70mv) rising edge of fb5, hysteresis = 1% no external load (note 1) 0mv < (cs5-fb5) < 70mv, 6v < v + < 30v (includes load and line regulation) falling edge v+ shutdown current 25 40 a s h d n = d1 = d2 = on3 = on5 = 0v, v+ = 30v v+ standby current 70 120 a d1 = d2 = on3 = on5 = 0v, v+ = 30v quiescent power consumption (both pwm controllers on) 5.5 8.6 mw d1 = d2 = 0v, fb5 = cs5 = 5.25v, fb3 = cs3 = 3.5v v+ off current 30 60 a fb5 = cs5 = 5.25v, vl switched over to fb5 d1, d2 trip voltage 1.61 1.69 v falling edge, hysteresis = 1% d1, d2 input current 100 na d1 = d2 = 0v, 5v 3.3v and 5v step-down controllers internal regulator and reference comparators
max786 dual-output power -supply contr oller for notebook computers _________________________________________________________________________________________________ 3 note 1: since the reference uses vl as its supply, its v+ line regulation error is insignificant. note 2: the main switching outputs track the reference voltage. loading the reference reduces the main outputs slightly according to the closed-loop gain (av cl ) and the reference voltage load-regulation error. av cl for the +3.3v supply is unity gain. av cl for the +5v supply is 1.54. parameter conditions min typ max units q1, q2 source current vh = 15v, v out = 2.5v 12 20 30 a q1, q2 sink current vh = 15v, v out = 2.5v 200 500 1000 a q1, q2 output high voltage i source = 5 a, vh = 3v vh -0 .5 v q1, q2 output low voltage i sink = 20 a, vh = 3v 0.4 v quiescent vh current vh = 18v, d1 = d2 = 5v, no external load 4 10 a oscillator and inputs/outputs oscillator frequency sync = 3.3v 270 300 330 khz sync = 0v, 5v 170 200 230 sync high pulse width 200 ns sync low pulse width 200 ns sync rise/fall time not tested 200 ns oscillator sync range 240 350 khz maximum duty cycle sync = 3.3v 89 92 % sync = 0v or 5v 92 95 input low voltage shdn , on3, on5, sync 0.8 v input high voltage shdn , on3, on5 2.4 v sync vl -0 .5 input current shdn , on3, on5 v in = 0v, 5v 1 a dl3/dl5 sink/source current v out = 2v 1 a dh3/dh5 sink/source current bst3-lx3 = bst5-lx5 = 4.5v, v out = 2v 1 a dl3/dl5 on-resistance high or low 7 dh3/dh5 on-resistance high or low, bst3-lx3 = bst5-lx5 = 4.5v 7 electrical characteristics (continued) (v+ = 15v, gnd = pgnd = 0v, i vl = i ref = 0ma, shdn = on3 = on5 = 5v, other digital input levels are 0v or +5v, t a = t min to t max , unless otherwise noted.)
max786 dual-output power -supply contr oller for notebook computers 4 _______________________________________________________________________________________ ________________________________________________ t ypical operating characteristics (circuit of figure 1, t a = +25 c, unless otherwise noted.) efficiency vs. +5v output current, 300khz efficiency (%) 50 60 70 80 90 100 1m 10m 100m 1 10 +5v output current (a) v in = 6v v in = 15v v in = 30v +3.3v off efficiency vs. +3.3v output current, 200khz efficiency (%) 50 60 70 80 90 100 1m 10m 100m 1 10 +3.3v output current (a) v in = 6v v in = 15v v in = 30v sync = 0v, +5v on efficiency vs. +3.3v output current, 300khz efficiency (%) 50 60 70 80 90 100 1m 10m 100m 1 10 +3.3v output current (a) v in = 6v v in = 15v v in = 30v +5v on shutdown supply current vs. supply voltage shutdown supply current ( m a) 0 100 200 300 400 500 0 6 12 18 24 30 supply voltage (v) shdn = 0v quiescent supply current vs. supply voltage quiescent supply current (ma) 0 1 2 18 19 0 6 12 18 24 30 supply voltage (v) on3 = on5 = high standby supply current vs. supply voltage standby supply current (ma) 0 0.5 1.0 1.5 2.0 2.5 0 6 12 18 24 30 on3 = on5 = 0v supply voltage (v) minimum v in to v out differential vs. +5v output current minimum v in to v out differential (v) +5v output current (a) 0 0.2 0.4 0.6 0.8 1.0 1m 10m 100m 1 10 300khz 200khz +5v output still regulating efficiency vs. +5v output current, 200khz efficiency (%) 50 60 70 80 90 100 1m 10m 100m 1 10 +5v output current (a) v in = 6v v in = 30v v in = 15v sync = 0v, +3.3v off 1000 0.1 100 m 10m 1 switching frequency vs. load current 10 load current (a) switching frequency (khz) 100 1m 100m sync = ref (300khz) on3 = on5 = 5v +5v, v in = 7.5v 1 +5v, v in = 30v +3.3v, v in = 7.5v
200 m s/div i load = 100ma v in = 10v idle mode waveforms +5v output 50mv/div 2v/div max786 dual-output power -supply contr oller for notebook computers _______________________________________________________________________________________ 5 500ns/div +5v output current = 1a v in = 16v pulse-width modulation mode waveforms lx 10v/div +5v output 50mv/div 200 m s/div v in = 15v +3.3v load-transient response +3.3v output 50mv/div 3a 0a load current 200 m s/div v in = 15v +5v load-transient response +5v output 50mv/div 3a 0a load current _________________________________ t ypical operating characteristics (continued) (circuit of figure 1, t a = +25 c, unless otherwise noted.)
max786 dual-output power -supply contr oller for notebook computers 6 _______________________________________________________________________________________ _________________________________ t ypical operating characteristics (continued) (circuit of figure 1, t a = +25 c, unless otherwise noted.) 20 m s/div i load = 2a +5v line-transient response, rising v in , 10v to 16v 2v/div +5v output 50mv/div 20 m s/div i load = 2a +5v line-transient response, falling v in , 16v to 10v 2v/div +5v output 50mv/div 20 m s/div i load = 2a +3.3v line-transient response, rising +3.3v output 50mv/div v in , 10v to 16v 2v/div 20 m s/div i load = 2a +3.3v line-transient response, falling +3.3v output 50mv/div v in , 16v to 10v 2v/div
max786 dual-output power -supply contr oller for notebook computers _______________________________________________________________________________________ 7 pin name function 1 cs3 current-sense input for +3.3v; +100mv = current limit level referenced to fb3. 2 ss3 soft-start input for +3.3v. ramp time to full current limit is 1ms/nf of capacitance to gnd. 3 on3 on/ off control input disables the +3.3v pwm. tie directly to vl for automatic start-up. 4 d1 #1 level-translator/comparator noninverting input, threshold = +1.650v. controls q1. tie to gnd if unused. 5 d2 #2 level-translator/comparator noninverting input (see d1) 6 vh external positive supply-voltage input for the level translators/comparators 7 q2 #2 level-translator/comparator output. sources 20 a from vh when d2 is high. sinks 500 a to gnd when d2 is low, even with vh = 0v. 8 q1 #1 level translator/comparator output (see q2) 9 gnd low-current analog ground 10 ref 3.3v reference output. sources up to 5ma for external loads. bypass to gnd with 1 f/ma of load or 0.22 f minimum. 11 sync oscillator control/synchronization input. connect to vl or gnd for 200khz; connect to ref for 300khz. for external clock synchronization in the 240khz to 350khz range, a high-to-low transition causes a new cycle to start. 12 shdn shutdown control input, active low. tie to vl for automatic start-up. the 5v vl supply stays active in shutdown, but all other circuitry is disabled. do not force shdn higher than vl + 0.3v. 13 on5 on/ off control input disables the +5v pwm supply. tie to vl for automatic start-up. 14 ss5 soft-start control input for +5v. ramp time to full current limit is 1ms/nf of capacitance to gnd. 15 cs5 current-sense input for +5v; +100mv = current-limit level referenced to fb5. 16 dh5 gate-drive output for the +5v high-side mosfet 17 lx5 inductor connection for the +5v supply 18 bst5 boost capacitor connection for the +5v supply (0.1 f) 19 dl5 gate-drive output for the +5v low-side mosfet 20 pgnd power ground 21 fb5 feedback and current-sense input for the +5v pwm 22 vl 5v logic supply voltage for internal circuitry. vl is always on and can source 5ma for external loads. 23 v+ supply voltage input from battery, 5.5v to 30v 24 dl3 gate-drive output for the +3.3v low-side mosfet 25 bst3 boost capacitor connection for the +3.3v supply (0.1 f) 26 lx3 inductor connection for the +3.3v supply 27 dh3 gate-drive output for the +3.3v high-side mosfet 28 fb3 feedback and current-sense input for the +5v pwm _______________________________________________________________________ pin description
max786 dual-output power -supply contr oller for notebook computers 8 _______________________________________________________________________________________ the max786 has two close relatives: the max782 and the max783. the max782 and max783 each include an extra flyback winding regulator and linear regulators for dual, +12v/programmable pcmcia vpp outputs. the max782/max783 data sheet contains extra appli - cations information on the max786 not found in this data sheet. +3.3v switch-mode supply the +3.3v supply is generated by a current-mode, pwm step-down regulator using two n-channel mosfets, a rectifier, and an lc output filter (figure 1). the gate-drive signal to the high-side mosfet, which must exceed the battery voltage, is provided by a boost circuit that uses a 100nf capacitor connected to bst3. _________________ detailed description the max786 converts a 5.5v to 30v input to four outputs (figure 1). it produces two high-power, pwm, switch- mode supplies, one at +5v and the other at +3.3v. the two supplies operate at either 300khz or 200khz, allowing for small external components. output current capability depends on external components, and can exceed 6a on each supply. an internal 5v, 5ma supply (vl) and a 3.3v, 5ma reference voltage are also gener - ated via linear regulators, as shown in figure 2. fault protection circuitry shuts off the pwms when the inter - nal supplies lose regulation. two precision voltage comparators are also included. their output stages permit them to be used as level translators for driving external n-channel mosfets in load-switching applications, or for more conventional logic signals. max786 v+ vl 23 22 input 5.5v to 30v (note 1) c1 33 m f d2a 1n4148 c5 0.1 m f 25 27 18 16 17 gnd ref pgnd c3 1 m f +3.3v at 5ma bst3 dh3 lx3 bst5 dh5 lx5 9 10 20 n1 c9 0.01 m f +3.3v on/off +5v on/off shutdown osc sync input voltage range 6.5v to 30v as shown. see low-voltage (6-cell) operation section for details. note 1: use short, kelvin-connected pc board traces placed very close to one another. note 2: comparator supply input in out comparator 1 in out comparator 2 (note 2) c8 0.01 m f n4 d3 1n5819 l2 10 m h r2 25m +5v at 3a c6 330 m f +5v at 5ma 4.7 m f c10 33 m f n2 d2b 1n4148 c4 0.1 m f 2 3 13 12 11 14 6 4 8 5 7 ss3 on3 on5 shdn sync ss5 vh d1 q1 d2 q2 19 15 21 dl5 cs5 fb5 (note 2) n3 26 d1 1n5819 l1 10 m h r1 25m w +3.3v at 3a c12 150 m f 24 1 28 dl3 cs3 fb3 c7 150 m f figure 1. max786 application circuit
max786 dual-output power -supply contr oller for notebook computers _______________________________________________________________________________________ 9 a synchronous rectifier at lx3 keeps efficiency high by clamping the voltage across the rectifier diode. maximum current limit is set by an external low-value sense resistor, which prevents excessive inductor cur - rent during start-up or under short-circuit conditions. programmable soft-start is set by an optional external capacitor; this reduces in-rush surge currents upon start-up and provides adjustable power-up times for power-supply sequencing purposes. p +5v ldo linear regulator v+ vl ref shdn gnd +3.3v reference on 3.3v 5v 4v 2.8v sync 300khz/200khz oscillator on standby 4.5v fault on 3.3v pwm controller (see fig. 3) fb3 cs3 bst3 dh3 lx3 dl3 ss3 fb5 cs5 bst5 dh5 lx5 dl5 ss5 pgnd on3 5v pwm controller (see fig. 3) on d1 d2 1.65v 1.65v on5 vh q1 q2 figure 2. max786 block diagram
max786 dual-output power -supply contr oller for notebook computers 10 ______________________________________________________________________________________ +5v switch-mode supply the +5v output is produced by a current-mode, pwm step-down regulator, which is nearly identical to the +3.3v supply. the +5v supply? dropout voltage, as configured in figure 1, is typically 400mv at 2a. as v+ approaches 5v, the +5v output gracefully falls with v+ until the vl regulator output hits its undervoltage- lockout threshold at 4v. at this point, the +5v supply turns off. the default frequency for both pwm controllers is 300khz (with sync connected to ref), but 200khz may be used by connecting sync to gnd or vl. +3.3v and +5v pwm buck controllers the two current-mode pwm controllers are identical except for different preset output voltages (figure 3). each pwm is independent except for being synchro - nized to a master oscillator and sharing a common ref - erence (ref) and logic supply (vl). each pwm can be turned on and off separately via on3 and on5. the pwms are a direct-summing type, lacking a tradi- tional integrator error amplifier and the phase shift associated with it. they therefore do not require any external feedback compensation components if the fil - ter capacitor esr guidelines given in the design procedure are followed. the main gain block is an open-loop comparator that sums four input signals: an output voltage error signal, current-sense signal, slope-compensation ramp, and precision voltage reference. this direct-summing method approaches the ideal of cycle-by-cycle control of the output voltage. under heavy loads, the controller operates in full pwm mode. every pulse from the oscil - lator sets the output latch and turns on the high-side switch for a period determined by the duty cycle (approximately v out /v in ). as the high-side switch turns off, the synchronous rectifier latch is set and, 60ns later, the low-side switch turns on (and stays on until the beginning of the next clock cycle, in continuous mode, or until the inductor current crosses through zero, in discontinuous mode). under fault conditions where the inductor current exceeds the 100mv current-limit threshold, the high-side latch is reset and the high-side switch is turned off. at light loads, the inductor current fails to exceed the 25mv threshold set by the minimum current comparator. when this occurs, the pwm goes into idle mode, skip - ping most of the oscillator pulses in order to reduce the switching frequency and cut back switching losses. the oscillator is effectively gated off at light loads because the minimum current comparator immediately resets the high-side latch at the beginning of each cycle, unless the fb_ signal falls below the reference voltage level. soft-start/ss_ inputs connecting capacitors to ss3 and ss5 allows gradual build-up of the +3.3v and +5v supplies after on3 and on5 are driven high. when on3 or on5 is low, the appropriate ss capacitors are discharged to gnd. when on3 or on5 is driven high, a 4 a constant cur - rent source charges these capacitors up to 4v. the resulting ramp voltage on the ss_ pins linearly increas - es the current-limit comparator setpoint so as to increase the duty cycle to the external power mosfets up to the maximum output. with no ss capacitors, the circuit will reach maximum current limit within 10 s. soft-start greatly reduces initial in-rush current peaks and allows start-up time to be programmed externally. synchronous rectifiers synchronous rectification allows for high efficiency by reducing the losses associated with the schottky rectifiers. when the external power mosfet n1 (or n2) turns off, energy stored in the inductor causes its terminal volt - age to reverse instantly. current flows in the loop formed by the inductor, schottky diode, and loa d an action that charges up the filter capacitor. the schottky diode has a forward voltage of about 0.5v which, although small, represents a significant power loss, degrading efficiency. a synchronous rectifier, n3 (or n4), parallels the diode and is turned on by dl3 (or dl5) shortly after the diode conducts. since the on resistance (r ds(on) ) of the synchronous rectifier is very low, the losses are reduced. the synchronous rectifier mosfet is turned off when the inductor current falls to zero. cross conduction (or ?hoot-through? occurs if the high-side switch turns on at the same time as the syn - chronous rectifier. the max786? internal break-before- make timing ensures that shoot-through does not occur. the schottky rectifier conducts during the time that nei - ther mosfet is on, which improves efficiency by pre - venting the synchronous-rectifier mosfet? lossy body diode from conducting. the synchronous rectifier works under all operating condi - tions, including discontinuous-conduction and idle mode. boost gate-driver supply gate-drive voltage for the high-side n-channel switch is generated with a flying-capacitor boost circuit as shown in figure 4. the capacitor is alternately charged from the vl supply via the diode and placed in parallel with the high-side mosfet? gate-source terminals. on start- up, the synchronous rectifier (low-side) mosfet forces lx_ to 0v and charges the bst_ capacitor to 5v. on the
max786 dual-output power -supply contr oller for notebook computers ______________________________________________________________________________________ 11 second half-cycle, the pwm turns on the high-side mosfet by connecting the capacitor to the mosfet gate by closing an internal switch between bst_ and dh_. this provides the necessary enhancement voltage to turn on the high-side switch, an action that ?oosts the 5v gate-drive signal above the battery voltage. ringing seen at the high-side mosfet gates (dh3 and dh5) in discontinuous-conduction mode (light loads) is a natural operating condition caused by the residual energy in the tank circuit formed by the inductor and stray capacitance at the lx_ nodes. the gate driver negative rail is referred to lx_, so any ringing there is directly coupled to the gate-drive supply. 1x cs_ fb_ bst_ dh_ lx_ level shift vl shoot- through control dl_ pgnd level shift q r s synchronous rectifier control n 3.3v 1r 30r vl 4 m a 0mv to 100mv current limit minimum current (idle mode) 25mv slope comp s ref, 3.3v (or internal 5v reference) main pwm comparator 60khz lpf r s q osc ss_ on_ figure 3. pwm controller block diagram
max786 dual-output power -supply contr oller for notebook computers 12 ______________________________________________________________________________________ modes of operation pwm mode under heavy load s over approximately 25% of full load the +3.3v and +5v supplies operate as continuous- current pwm supplies (see typical operating char- acteristics ). the duty cycle (%on) is approximately: %on = v out /v in current flows continuously in the inductor: first, it ramps up when the power mosfet conducts; then, it ramps down during the flyback portion of each cycle as energy is put into the inductor and then dis - charged into the load. note that the current flowing into the inductor when it is being charged is also flow - ing into the load, so the load is continuously receiving current from the inductor. this minimizes output rip - ple and maximizes inductor use, allowing very small physical and electrical sizes. output ripple is primari ly a function of the filter capacitor (c7 or c6) effective series resistance (esr) and is typically under 50mv (see the design procedure section). output ripple is worst at light load and maximum input voltage. idle mode under light loads (<25% of full load), efficiency is fur - ther enhanced by turning the drive voltage on and off for only a single clock period, skipping most of the clock pulses entirely. asynchronous switching, seen as ?hosting?on an oscilloscope, is thus a normal operating condition whenever the load current is less than approximately 25% of full load. at certain input voltage and load conditions, a transition region exists where the controller can pass back and forth from idle mode to pwm mode. in this situation, short bursts of pulses occur that make the current waveform look erratic, but do not materially affect the output ripple. efficiency remains high. current limiting the voltage between cs3 (cs5) and fb3 (fb5) is contin - uously monitored. an external, low-value shunt resistor is connected between these pins, in series with the inductor, allowing the inductor current to be continuously measured throughout the switching cycle. whenever this voltage exceeds 100mv, the drive voltage to the external high-side mosfet is cut off. this protects the mosfet, the load, and the battery in case of short circuits or tem - porary load surges. the current-limiting resistors r1 and r2 are typically 25m for 3a load current. oscillator frequency; sync input the sync input controls the oscillator frequency. connecting sync to gnd or to vl selects 200khz opera - tion; connecting to ref selects 300khz operation. sync can also be driven with an external 240khz to 350khz cmos/ttl source to synchronize the internal oscillator. normally, 300khz is used to minimize the inductor and filter capacitor sizes, but 200khz may be necessary for low input voltages (see low-voltage (6-cell) operation ). comparators two noninverting comparators can be used as precision voltage comparators or high-side drivers. the supply for these comparators (vh) is brought out and may be connected to any voltage between +3v and +19v irrespective of v+. the noninverting inputs (d1-d2) are high impedance, and the inverting input is internally con - nected to a 1.650v reference. each output (q1-q2) sources 20 a from vh when its input is above 1.650v, and sinks 500 a to gnd when its input is below 1.650v. the q1-q2 outputs can be fixed together in wired-or configuration since the pull-up current is only 20 a. connecting vh to a logic supply (5v or 3v) allows the comparators to be used as low-battery detectors. for driving n-channel power mosfets to turn external loads on and off, vh should be 6v to 12v higher than the load voltage. this enables the mosfets to be fully turned on and results in low r ds(on) . the comparators are always active when v+ is above +4v, even when vh is 0v. thus, q1-q2 will sink current to gnd even when vh is 0v, but they will only source current from vh when vh is above approximately 1.5v. if q1 or q2 is externally pulled above vh, an internal diode conducts, pulling vh a diode drop below the output and powering anything connected to vh. this voltage will also power the other comparator outputs. level translator pwm vl bst_ dh_ lx_ dl_ vl battery input vl figure 4. boost supply for gate drivers
max786 dual-output power -supply contr oller for notebook computers ______________________________________________________________________________________ 13 table 1. surface-mount components (see figure 1 for standard application circuit.) internal vl and ref supplies an internal linear regulator produces the 5v used by the internal control circuits. this regulator? output is avail - able on pin vl and can source 5ma for external loads. bypass vl to gnd with 4.7 f. to save power, when the +5v switch-mode supply is above 4.5v, the internal lin - ear regulator is turned off and the high-efficiency +5v switch-mode supply output is connected to vl. the internal 3.3v bandgap reference (ref) is powered by the internal 5v vl supply. it can furnish up to 5ma. bypass ref to gnd with 0.22 f, plus 1 f/ma of load current. the main switching outputs track the reference voltage. loading the reference will reduce the main outputs slightly, according to the reference load-regula - tion error. both the vl and ref outputs remain active, even when the switching regulators are turned off, to supply mem - ory keep-alive power (see shutdown mode section). these linear-regulator outputs can be directly connected to the corresponding step-down regulator outputs (i.e., ref to +3.3v, vl to +5v) to keep the main supplies alive in standby mode. however, to ensure start-up, standby load currents must not exceed 5ma on each supply. fault protection the +3.3v and +5v pwm supplies and the compara - tors are disabled when either of two faults is present: vl < +4.0v or ref < +2.8v (85% of its nominal value). __________________ design pr ocedur e figure 1? schematic and table 2? component list show values suitable for a 3a, +5v supply and a 3a, +3.3v supply. this circuit operates with input voltages from 6.5v to 30v, and maintains high efficiency with output currents between 5ma and 3a (see the typical operating characteristics ). this circuit? components may be changed if the design guidelines described in this section are use d but before beginning the design, the following information should be firmly established: component specification manufacturer part no. c1, c10 33 f, 35v tantalum capacitors avx tpse226m035r0100 sprague 595d336x0035r c2 4.7 f, 6v tantalum capacitor avx tajb475m016 sprague 595d475x0016a c3 1 f, 20v tantalum capacitor avx taja105m025 sprague 595d105x0020a2b c4, c5 0.1 f, 16v ceramic capacitors murata-erie grm42-6x7r104k50v c6 330 f, 10v tantalum capacitor sprague 595d337x0010r c7, c12 150 f, 10v tantalum capacitors sprague 595d157x0010d c8, c9 0.01 f, 16v ceramic capacitors murata-erie grm42-6x7r103k50v d2a, d2b 1n4148-type dual diodes central semiconductor cmpd2836 d1, d3 1n5819 smt diodes nihon ec10qs04 l1, l2 10 h, 2.65a inductors sumida cdr125-100 n1?4 n-channel mosfets (so-8) siliconix si9410dy r1, r2 0.025 , 1% (smt) resistors irc lr2010-01-r025-f company factory fax usa phone [country code] avx [1] (803) 626-3123 (803) 946-0690 (800) 282-4975 central semiconductor [1] (516) 435-1824 (516) 435-1110 irc [1] (512) 992-3377 (512) 992-7900 murata-erie [1] (814) 238-0490 (814) 237-1431 nihon [81] 3-3494-7414 (805) 867-2555 siliconix [1] (408) 970-3950 (408) 988-8000 sprague [1] (603) 224-1430 (603) 224-1961 sumida [81] 3-3607-5144 (847) 956-0666 table 2. component suppliers
max786 dual-output power -supply contr oller for notebook computers 14 ______________________________________________________________________________________ v in(max) , the maximum input (battery) voltage. this value should include the worst-case conditions under which the power supply is expected to function, such as no-load (standby) operation when a battery charger is connected but no battery is installed. v in(max) cannot exceed 30v. v in(min) , the minimum input (battery) voltage. this value should be taken at the full-load operating cur - rent under the lowest battery conditions. if v in(min) is below about 6.5v, the filter capacitance required to maintain good ac load regulation increases, and the current limit for the +5v supply has to be increased for the same load level. inductor (l1, l2) three inductor parameters are required: the inductance value (l), the peak inductor current (i lpeak ), and the coil resistance (r l ). the inductance is: (v out ) (v in(max) - v out ) l = (v in(max) ) (f) (i out ) (lir) where: v out = output voltage (3.3v or 5v); v in(max) = maximum input voltage (v); f = switching frequency, normally 300khz; i out = maximum dc load current (a); lir = ratio of inductor peak-to-peak ac current to average dc load current, typically 0.3. a higher value of lir allows smaller inductance, but results in higher losses and higher ripple. the highest peak inductor current (i lpeak ) equals the dc load current (i out ) plus half the peak-to-peak ac inductor current (i lpp ). the peak-to-peak ac inductor current is typically chosen as 30% of the maximum dc load cur - rent, so the peak inductor current is 1.15 times i out . the peak inductor current at full load is given by: (v out ) (v in(max) - v out ) i lpeak = i out + ? (2) (f) (l) (v in(max) ) the coil resistance should be as low as possible, preferably in the low milliohms. the coil is effectively in series with the load at all times, so the wire losses alone are approximately: power loss = (i out 2 ) (r l ). in general, select a standard inductor that meets the l, i lpeak , and r l requirements (see tables 1 and 2). if a standard inductor is unavailable, choose a core with an li 2 parameter greater than (l) (i lpeak 2 ), and use the largest wire that will fit the core. current-sense resistors (r1, r2) the sense resistors must carry the peak current in the inductor, which exceeds the full dc load current. the internal current limiting starts when the voltage across the sense resistors exceeds 100mv nominally, 80mv minimum. use the minimum value to ensure adequate output current capability: for the +3.3v supply, r1 = 80mv / (1.15 x i out ); for the +5v supply, r2 = 80mv/(1.15 x i out ), assuming that lir = 0.3. since the sense resistance values (e.g., r1 = 25m for i out = 3a) are similar to a few centimeters of narrow traces on a printed circuit board, trace resistance can contribute significant errors. to prevent this, kelvin con - nect the cs_ and fb_ pins to the sense resistors; i.e., use separate traces not carrying any of the inductor or load current, as shown in figure 5. run these traces parallel at minimum spacing from one another. the wiring layout for these traces is critical for stable, low-ripple outputs (see the layout and grounding section). mosfet switches (n1-n4) the four n-channel power mosfets are usually iden - tical and must be ?ogic-level?fets; that is, they must be fully on (have low r ds(on) ) with only 4v gate- source drive voltage. the mosfet r ds(on) should ideally be about twice the value of the sense resistor. mosfets with even lower r ds(on) have higher gate capacitance, which increases switching time and transition losses. mosfets with low gate-threshold voltage specifica - tions (i.e., maximum v gs(th) = 2v rather than 3v) are preferred, especially for high-current (5a) applications. output filter capacitors (c6, c7, c12) the output filter capacitors determine the loop stability and output ripple voltage. to ensure stability, the mini - mum capacitance and maximum esr values are: v ref c f > (v out ) (r cs ) (2) ( ) (gbwp) and, (v out ) (r cs ) esr cf < v ref where: c f = output filter capacitance (f); v ref = reference voltage, 3.3v; v out = output voltage, 3.3v or 5v; r cs = sense resistor ( ); gbwp = gain-bandwidth product, 60khz; esr cf = output filter capacitor esr ( ).
max786 dual-output power -supply contr oller for notebook computers ______________________________________________________________________________________ 15 be sure to select output capacitors that satisfy both the minimum capacitance and maximum esr require - ments. to achieve the low esr required, it may be appropriate to use a capacitance value 2 or 3 times larger than the calculated minimum. the output ripple in continuous-current mode is: v out(rpl) = i lpp(max) x (esr cf + 1/(2 x x f x c f ) ). in idle-mode, the ripple has a capacitive and resistive component: (4) (10 -4 ) (l) v out(rpl) (c) = x (r cs 2 ) (c f ) 1 1 ( + ) volts v out v in - v out (0.02) (esr cf ) v out(rpl) (r) = ? volts r cs the total ripple, v out(rpl) , can be approximated as follows: if v out(rpl) (r) < 0.5 v out(rpl) (c), then v out(rpl) = v out(rpl) (c), otherwise, v out(rpl) = 0.5 v out(rpl) (c) + v out(rpl) (r). diodes d1 and d3 use 1n5819s or similar schottky diodes. d1 and d3 conduct only about 3% of the time, so the 1n5819? 1a current rating is conservative. the voltage rating of d1 and d3 must exceed the maximum input supply voltage from the battery. these diodes must be schottky diodes to prevent the lossy mosfet body diodes from turning on, and they must be placed physically close to their associated synchro - nous rectifier mosfets. soft-start capacitors (c8, c9) a capacitor connected from gnd to either ss pin causes that supply to ramp up slowly. the ramp time to full current limit, t ss , is approximately 1ms for every nf of capacitance on ss_, with a minimum value of 10 s. typical capacitor values are in the 10nf to 100nf range; a 5v rating is sufficient. because this ramp is applied to the current-limit circuit, the actual time for the output voltage to ramp up depends on the load current and output capacitor value. using figure 1? circuit with a 2a load and no ss capacitor, full output voltage is reached about 600 s after on_ is driven high. boost capacitors (c4, c5) capacitors c4 and c5 store the boost voltage and pro - vide the supply for the dh3 and dh5 drivers. use 0.1 f and place each within 10mm of the bst_ and lx_ pins. boost diodes (d1a, d1b) use high-speed signal diodes; e.g., 1n4148 or equivalent. bypass capacitors input filter capacitors (c1, c10) use at least 3 f/w of output power for the input filter capacitors, c1 and c10. they should have less than 150m esr, and should be located no further than 10mm from n1 and n2 to prevent ringing. connect the negative terminals directly to pgnd. do not exceed the surge current ratings of input bypass capacitors. shutdown mode shutdown ( shdn = low) forces both pwms off and dis - ables the ref output and both comparators (q1 = q2 = 0v). supply current in shutdown mode is typically 25 a. the vl supply remains active and can source 25ma for external loads. note that the vl load capabili - ty is higher in shutdown and standby modes than when the pwms are operating (25ma vs. 5ma). standby mode is achieved by holding on3 and on5 low while shdn is high. this disables both pwms, but keeps vl, ref, and the precision compara tors alive. supply current in standby mode is typically 70 a. max786 kelvin sense traces sense resistor main current path fat, high-current traces figure 5. kelvin connections for the current-sense resistors
max786 v+ vl 23 22 v+ c1 33 m f 35v r9 1k r10 open 6 d2 25 18 16 17 19 15 10 11 7 8 ss3 gnd pgnd bst3 dh3 lx3 dl3 cs3 fb3 on3 on5 shdn d1 bst5 dh5 lx5 dl5 cs5 fb5 ref sync q2 q1 2 14 20 3.3v out c7 150 m f 10v c12 150 m f 10v l1 10 m h d1 1n5819 shdn d1 sync q1 q2 c3 1 m f 20v d3 1n5819 l2 10 m h r2 0.025 w 5v out c6 330 m f 10v c2 4.7 m f c10 33 m f 35v d2 r1 0.025 w n1 n3 d2 r6 1m r5 1m r8 1m r7 1m r4 1m 9 27 26 24 1 28 3 13 12 4 5 c9 0.01 m f sw1c sw1a sw1b r3 1m 21 vh d2 ss5 vref (3.3v) sw1d n2 n4 c4 0.1 m f n1 ?n4 = si9410dy d2 = baw56l or two 1n4148s vl (5v) c8 0.01 m f on3 on5 c5 0.1 m f max786 dual-output power -supply contr oller for notebook computers 16 ______________________________________________________________________________________ other ways to shut down the max786 are suggested in the applications section of the max782/max783 data sheet. __________ applications infor mation low-voltage (6-cell) operation the standard application circuit can be configured to accept input voltages from 5.5v to 12v by changing the oscillator frequency to 200khz and increasing the +5v filter capacitor to 660 f. this allows stable opera - tion at 5v loads up to 2a (the 3.3v side requires no changes and still delivers 3a). figure 6. max786 ev kit schematic table 3. ev kit power-supply controls (sw1) switch name function on setting off setting 1 shdn enable shutdown mode operate shutdown 2 on3 enable 3.3v power supply 3.3v on 3.3v off 3 on5 enable 5.0v power supply 5v on 5v off 4 sync oscillator 200khz 300khz
max786 dual-output power -supply contr oller for notebook computers ______________________________________________________________________________________ 17 _________________ ev kit infor mation the max786 evaluation kit (ev kit) embodies the standard application circuit, with some extra pull- up and pull-down resistors needed to set default logic signal levels. the board comes configured to accept battery input voltages between 6.5v and 30v, and pro - vides up to 25w of output power. all functions are con - trolled by standard cmos/ttl logic levels or dip switches. the kit can be reconfigured for lower battery voltages by setting the oscillator to 200khz and increasing the 5v output filter capacitor value. the d1 and d2 comparators can be used as precision volt age detectors by installing resistor dividers at each input. figure 7. max786 ev kit top component layout and silk screen, top view figure 8. max786 ev kit ground plane (layers 2 and 3), top view figure 9. max786 ev kit top layer (layer 1), top view 1.0" 1.0" 1.0"
max786 dual-output power -supply contr oller for notebook computers 18 ______________________________________________________________________________________ figure 11. max786 ev kit, bottom layer (layer 4), top view figure 10. max786 ev kit, bottom component layout and silk screen, bottom view 1.0" 1.0"
max786 dual-output power -supply contr oller for notebook computers ______________________________________________________________________________________ 19 ______________________ chip t opography lx3 on3 d1 dh5 cs5 on5 shdn ss5 d2 vh q2 q1 gnd ref sync 0.181" (4.597mm) bst3 dl3 v+ vl fb5 dl5 bst5 lx5 ss3 cs3 fb3 dh3 pgnd 0.109" (2.769mm) transistor count: 1294 substrate connected to gnd
max786 dual-output power -supply contr oller for notebook computers ________________________________________________________ package infor mation * contact factory for dice specifications. __ or dering infor mation (continued) ev kit temp. range board type 0 c to +70 c surface mount max786evkit-so dice* 0 c to +70 c max786c/d 28 ssop 0 c to +70 c max786scai pin-package temp. range part 3.6v v out 28 ssop -40 c to +85 c MAX786REAI 28 ssop -40 c to +85 c max786eai 3.45v 3.3v 28 ssop -40 c to +85 c max786seai 3.6v maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________ maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1997 maxim integrated products printed usa is a registered trademark of maxim integrated products. ssop.eps

▲Up To Search▲

Price & Availability of MAX786REAI

	To Download MAX786REAI Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .