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r8c/11 group single-chip 16-bit cmos microcomputer rev.1.60 jan 27, 2006 page 1 of 26 rej03b0034-0160 rej03b0034-0160 rev.1.60 jan 27, 2006 1. overview this mcu is built using the high-performance silicon gate cmos process using a r8c/tiny series cpu core and is packaged in a 32-pin plastic molded lqfp. this mcu operates using sophisticated instructions featuring a high level of instruction efficiency. with 1m bytes of address space, it is capable of executing instructions at high speed. 1.1 applications electric household appliance, office equipment, housing equipment (sensor, security), general industrial equipment, audio, etc.
rev.1.60 jan 27, 2006 page 2 of 26 rej03b0034-0160 r8c/11 group 1. overview table 1.1 performance outline 1.2 performance overview table 1.1. lists the performance outline of this mcu. item performance cpu number of basic instructions 89 instructions minimum instruction execution time 50 ns (f(x in ) = 20 mh z , v cc = 3.0 to 5.5 v) 100 ns (f(x in ) = 10 mh z , v cc = 2.7 to 5.5 v) operating mode single-chip address space 1m bytes memory capacity see table 1.2. peripheral port input/output: 22 (including led drive port), input: 2 function led drive port i/o port: 8 timer timer x: 8 bits x 1 channel, timer y: 8 bits x 1 channel, timer z: 8 bits x 1 channel (each timer equipped with 8-bit prescaler) timer c: 16 bits x 1 channel (circuits of input capture and output compare) serial interface ? channel clock synchronous, uart ? channel uart a/d converter 10-bit a/d converter: 1 circuit, 12 channels watchdog timer 15 bits x 1 (with prescaler) interrupt internal: 11 factors, external: 5 factors, software: 4 factors, priority level: 7 levels clock generation circuit 2 circuits ?ain clock generation circuit (equipped with a built-in feedback resistor) ?n-chip oscillator (high speed, low speed) on high-speed on-chip oscillator the frequency adjust- ment function is usable. oscillation stop detection function main clock oscillation stop detection function voltage detection circuit included power on reset circuit included electrical supply voltage v cc = 3.0 to 5.5 v (f(x in ) = 20 mh z ) characteristics v cc = 2.7 to 5.5 v (f(x in ) = 10 mh z ) power consumption typ. 9 ma (v cc = 5.0 v, (f(x in ) = 20 mh z ) typ. 5 ma (v cc = 3.0 v, (f(x in ) = 10 mh z ) typ. 35 a (v cc = 3.0 v, wait mode, peripheral clock off) typ. 0.7 a (v cc = 3.0 v, stop mode) flash memory program/erase supply voltage v cc = 2.7 to 5.5 v program/erase endurance 100 times operating ambient temperature -20 to 85 ? -40 to 85 ? (d-version) package 32-pin plastic mold lqfp
rev.1.60 jan 27, 2006 page 3 of 26 rej03b0034-0160 r8c/11 group 1. overview 1.3 block diagram figure 1.1 shows this mcu block diagram. figure 1.1 block diagram t i m e r x ( 8 b i t s ) t i m e r y ( 8 b i t s ) t i m e r z ( 8 b i t s ) t i m e r c ( 1 6 b i t s ) w a t c h d o g t i m e r ( 1 5 b i t s ) m e m o r y r 8 c / t i n y s e r i e s c p u c o r e i / o p o r t p o r t p 0 8 port p1 8 p o r t p 3 5 m u l t i p l i e r system clock generator x i n - x o u t h i g h - s p e e d o n - c h i p o s c i l l a t o r l o w - s p e e d o n - c h i p o s c i l l a t o r u a r t ( 8 b i t s ? 1 c h a n n e l ) port p4 1 2 pe r i p h e r a l f u n c t i o n s u a r t o r c l o c k s y n c h r o n o u s s e r i a l i / o ( 8 b i t s ? 1 c h a n n e l ) a / d c o n v e r t e r ( 1 0 b i t s ? 1 2 c h a n n e l s ) notes: 1. rom size depends on mcu type. 2. ram size depends on mcu type. r 0 l r 0 h r1h r1l r 2 r 3 a 0 a1 fb sb i s p usp intb p c flg t i m e r rom ram (2) (1)
rev.1.60 jan 27, 2006 page 4 of 26 rej03b0034-0160 r8c/11 group 1. overview 1.4 product information table 1.2 lists the product information. table 1.2 product information ram capacity rom capacity package type remarks type no. as of january 2006 flash memory version R5F21112FP plqp0032gb-a 8k bytes 512 bytes plqp0032gb-a 12k bytes 768 bytes plqp0032gb-a 16k bytes 1k bytes r5f21113fp r5f21114fp r5f21112dfp plqp0032gb-a 8k bytes 512 bytes plqp0032gb-a 12k bytes 768 bytes plqp0032gb-a 16k bytes 1k bytes r5f21113dfp r5f21114dfp d version figure 1.2 type no., memory size, and package package type: fp : plqp0032gb-a rom capacity: 2 : 8 kbytes. 3 : 12 kbytes. 4 : 16 kbytes. memory type: f: flash memory version type no. r 5 f 21 11 4 d fp r8c/11 group r8c/tiny series classification: d: operating ambient temperature 40 c to 85 c no symbol: operating ambient temperature 20 c to 85 c renesas mcu renesas semiconductors
rev.1.60 jan 27, 2006 page 5 of 26 rej03b0034-0160 r8c/11 group 1. overview package: plqp0032gb-a (32p6u-a) figure 1.3 pin assignments (top view) pin configuration (top view) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 3 2 3 1 3 0 r8c/11 group x i n / p 4 6 v s s r e s e t v c c c n v s s p 1 7 / i n t 1 / c n t r 0 p1 6 /clk 0 p1 5 /rxd 0 p1 4 /txd 0 p 3 7 / t x d 1 0 / r x d 1 p 3 0 / c n t r 0 / c m p 1 0 p 3 3 / i n t 3 / p 3 1 / t z o u t / c m p 1 1 p 3 2 / i n t 2 / c n t r 1 / c m p 1 2 i v c c a v s s a v c c / v r e f p0 3 /an 4 p0 2 /an 5 p0 1 /an 6 p 0 0 / a n 7 /t x d 1 1 p 0 6 / a n 1 p0 5 /an 2 p 0 4 / a n 3 p4 5 /int 0 p1 0 /ki 0 /an 8 /cmp0 0 p1 1 /ki 1 /an 9 /cmp0 1 p1 2 /ki 2 /an 10 /cmp0 2 p1 3 /ki 3 /an 11 p 0 7 / a n 0 mode t c i n n o t e s : 1 . p 4 7 f u n c t i o n s o n l y a s a n i n p u t p o r t . 2. w h e n u s i n g o n - c h i p d e b u g g e r , d o n o t u s e p i n s p 0 0 / a n 7 / t x d 1 1 a n d p 3 7 / t x d 1 0 / r x d 1 . 3 . d o n o t c o n n e c t i v c c t o v c c . x o u t / p 4 7 ( 1 ) 1.5 pin assignments figure 1.3 shows the pin configuration (top view).
rev.1.60 jan 27, 2006 page 6 of 26 rej03b0034-0160 r8c/11 group 1. overview signal name pin name i/o type power supply vcc, i input vss ivcc ivcc o analog power avcc, avss i supply input reset input ___________ reset i cnvss cnvss i mode mode i main clock input x in i main clock output x out o _____ int interrupt input _______ _______ int 0 to int 3 i key input interrupt _____ _____ ki 0 to ki 3 i timer x cntr 0 i/o ____________ cntr 0 o timer y cntr 1 i/o timer z tz out o timer c tc in i cmp0 0 to cmp0 2 , o cmp1 0 to cmp1 2 serial interface clk 0 i/o rxd 0 , rxd 1 i txd 0 , txd 10 ,o txd 11 reference voltage v ref i input a/d converter an 0 to an 11 i i/o port p0 0 to p0 7 , i/o p1 0 to p1 7 , p3 0 to p3 3 , p3 7 , p4 5 input port p4 6 , p4 7 i function apply 2.7 v to 5.5 v to the vcc pin. apply 0 v to the vss pin. this pin is to stabilize internal power supply. connect this pin to vss via a capacitor (0.1 f). do not connect to vcc. power supply input pins for a/d converter. connect the avcc pin to vcc. connect the avss pin to vss. connect a capacitor between pins avcc and avss. input l on this pin resets the mcu. connect this pin to vss via a resistor. connect this pin to vcc via a resistor. these pins are provided for the main clock generat- ing circuit i/o. connect a ceramic resonator or a crys- tal oscillator between the x in and x out pins. to use an externally derived clock, input it to the x in pin and leave the x out pin open. ______ int interrupt input pins. key input interrupt pins. timer x i/o pin timer x output pin timer y i/o pin timer z output pin timer c input pin timer c output pins transfer clock i/o pin. serial data input pins. serial data output pins. reference voltage input pin for a/d converter. con- nect the v ref pin to vcc. analog input pins for a/d converter these are 8-bit cmos i/o ports. each port has an i/o select direction register, allowing each pin in that port to be directed for input or output individually. any port set to input can select whether to use a pull- up resistor or not by program. p1 0 to p1 7 also function as led drive ports. port for input-only 1.6 pin description table 1.3 shows the pin description table 1.3 pin description
r8c/11 group 2. central processing unit (cpu) rev.1.60 jan 27, 2006 page 7 of 26 rej03b0034-0160 2. central processing unit (cpu) figure 2.1 shows the cpu registers. the cpu has 13 registers. of these, r0, r1, r2, r3, a0, a1 and fb comprise a register bank. two sets of register banks are provided. 2.1 data registers (r0, r1, r2 and r3) r0 is a 16-bit register for transfer, arithmetic and logic operations. the same applies to r1 to r3. the r0 can be split into high-order bit (r0h) and low-order bit (r0l) to be used separately as 8-bit data registers. the same applies to r1h and r1l as r0h and r0l. r2 can be combined with r0 to be used as a 32-bit data register (r2r0). the same applies to r3r1 as r2r0. d a t a r e g i s t e r s ( 1 ) a d d r e s s r e g i s t e r s ( 1 ) f r a m e b a s e r e g i s t e r s ( 1 ) p r o g r a m c o u n t e r i n t e r r u p t t a b l e r e g i s t e r u s e r s t a c k p o i n t e r interrupt stack pointer static base register flag register n o t e s : 1 . a r e g i s t e r b a n k c o m p r i s e s t h e s e r e g i s t e r s . t w o s e t s o f r e g i s t e r b a n k s a r e p r o v i d e d r0h (high-order of r0) b 1 5 b 8 b7 b 0 r 3 i n t b h u s p isp sb c d z s b o i u i p l r0l (low-order of r0) r1h (high-order of r1) r1l (low-order of r1) r 2 b 3 1 r3 r2 a1 a0 f b b 1 9 i n t b l b 1 5 b 0 pc b19 b 0 b 1 5 b 0 f l g b15 b0 b 1 5 b 0 b7 b 8 reserved bit carry flag d e b u g f l a g z e r o f l a g sign flag register bank select flag o v e r f l o w f l a g i n t e r r u p t e n a b l e f l a g s t a c k p o i n t e r s e l e c t f l a g r e s e r v e d b i t processor interrupt priority level t h e 4 - h i g h o r d e r b i t s o f i n t b a r e i n t b h a n d t h e 1 6 - l o w b i t s o f i n t b a r e i n t b l . figure 2.1 cpu register
r8c/11 group 2. central processing unit (cpu) rev.1.60 jan 27, 2006 page 8 of 26 rej03b0034-0160 2.2 address registers (a0 and a1) a0 is a 16-bit register for address register indirect addressing and address register relative addressing. they also are used for transfer, arithmetic and logic operations. the same applies to a1 as a0. a0 can be combined with a0 to be used as a 32-bit address register (a1a0). 2.3 frame base register (fb) fb is a 16-bit register for fb relative addressing. 2.4 interrupt table register (intb) intb is a 20-bit register indicates the start address of an interrupt vector table. 2.5 program counter (pc) pc, 20 bits wide, indicates the address of an instruction to be executed. 2.6 user stack pointer (usp) and interrupt stack pointer (isp) the stack pointer (sp), usp and isp, are 16 bits wide each. the u flag of flg is used to switch between usp and isp. 2.7 static base register (sb) sb is a 16-bit register for sb relative addressing. 2.8 flag register (flg) flg is a 11-bit register indicating the cpu state. 2.8.1 carry flag (c) the c flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic logic unit. 2.8.2 debug flag (d) the d flag is for debug only. set to 0 . 2.8.3 zero flag (z) the z flag is set to 1 when an arithmetic operation resulted in 0; otherwise, 0 . 2.8.4 sign flag (s) the s flag is set to 1 when an arithmetic operation resulted in a negative value; otherwise, 0 . 2.8.5 register bank select flag (b) the register bank 0 is selected when the b flag is 0 . the register bank 1 is selected when this flag is set to 1 . 2.8.6 overflow flag (o) the o flag is set to 1 when the operation resulted in an overflow; otherwise, 0 . 2.8.7 interrupt enable flag (i) the i flag enables a maskable interrupt. an interrupt is disabled when the i flag is set to 0 , and are enabled when the i flag is set to 1 . the i flag is set to 0 when an interrupt request is acknowledged. 2.8.8 stack pointer select flag (u) isp is selected when the u flag is set to 0 , usp is selected when the u flag is set to 1 . the u flag is set to 0 when a hardware interrupt request is acknowledged or the int instruction of software interrupt numbers 0 to 31 is executed. 2.8.9 processor interrupt priority level (ipl) ipl, 3 bits wide, assigns processor interrupt priority levels from level 0 to level 7. if a requested interrupt has greater priority than ipl, the interrupt is enabled. 2.8.10 reserved bit when write to this bit, set to 0 . when read, its content is indeterminate.
r8c/11 group 3. memory rev.1.60 jan 27, 2006 page 9 of 26 rej03b0034-0160 3. memory figure 3.1 is a memory map of this mcu. this mcu provides 1-mbyte address space from addresses 00000 16 to fffff 16 . the internal rom is allocated lower addresses beginning with address 0ffff 16 . for example, a 16-kbyte internal rom is allocated addresses from 0c000 16 to 0ffff 16 . the fixed interrupt vector table is allocated addresses 0ffdc 16 to 0ffff 16 . they store the starting address of each interrupt routine. the internal ram is allocated higher addresses beginning with address 00400 16 . for example, a 1-kbyte internal ram is allocated addresses 00400 16 to 007ff 16 . the internal ram is used not only for storing data, but for calling subroutines and stacks when interrupt request is acknowledged. special function registers (sfr) are allocated addresses 00000 16 to 002ff 16 . the peripheral function control registers are located them. all addresses, which have nothing allocated within the sfr, are re- served area and cannot be accessed by users. figure 3.1 memory map 00000 16 0yyyy 16 0ffff 16 002ff 16 00400 16 internal rom sfr (see chapter 4 for details.) 0ffdc 16 0ffff 16 undefined instruction overflow brk instruction address match single step watchdog timer,oscillation stop detection,voltage detection reset (reserved) type name 0xxxx 16 internal ram fffff 16 address 0xxxx 16 005ff 16 internal ram size 007ff 16 512 bytes 1k bytes 006ff 16 768 bytes address 0yyyy 16 0e000 16 internal rom size 0c000 16 8k bytes 16k bytes 0d000 16 12k bytes expansion area (reserved) r5f21114fp, r5f21114dfp r5f21113fp, r5f21113dfp R5F21112FP, r5f21112dfp notes : 1. blank spaces are reserved. no access is allowed.
r8c/11 group 4. special function register (sfr) rev.1.60 jan 27, 2006 page 10 of 26 rej03b0034-0160 watchdog timer start register wdts xx 16 w a t c h d o g t i m e r c o n t r o l r e g i s t e rw d c0 0 0 1 1 1 1 1 2 p r o c e s s o r m o d e r e g i s t e r 0p m 00 0 1 6 s y s t e m c l o c k c o n t r o l r e g i s t e r 0c m 00 1 1 0 1 0 0 0 2 s y s t e m c l o c k c o n t r o l r e g i s t e r 1c m 10 0 1 0 0 0 0 0 2 a d d r e s s m a t c h i n t e r r u p t e n a b l e r e g i s t e ra i e rx x x x x x 0 0 2 p r o t e c t r e g i s t e rp r c r0 0 x x x 0 0 0 2 p r o c e s s o r m o d e r e g i s t e r 1p m 10 0 1 6 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . 2 . s o f t w a r e r e s e t o r t h e w a t c h d o g t i m e r r e s e t d o e s n o t a f f e c t t h i s r e g i s t e r . 3 . o w i n g t o r e s e t i n p u t . 4 . i n t h e c a s e o f r e s e t p i n = h r e t a i n i n g . o s c i l l a t i o n s t o p d e t e c t i o n r e g i s t e ro c d0 0 0 0 0 1 0 0 2 int0 input filter select register int0f xxxxx000 2 0 0 0 0 1 6 0 0 0 1 1 6 0 0 0 2 1 6 0 0 0 3 1 6 0 0 0 4 1 6 0 0 0 5 1 6 0 0 0 6 1 6 0 0 0 7 1 6 0 0 0 8 1 6 0 0 0 9 1 6 0 0 0 a 1 6 0 0 0 b 1 6 0 0 0 c 1 6 0 0 0 d 1 6 0 0 0 e 1 6 0 0 0 f 1 6 0 0 1 0 1 6 0 0 1 1 1 6 0 0 1 2 1 6 0 0 1 3 1 6 0 0 1 4 1 6 0 0 1 5 1 6 0 0 1 6 1 6 0 0 1 7 1 6 0 0 1 8 1 6 0 0 1 9 1 6 0 0 1 a 1 6 0 0 1 b 1 6 0 0 1 c 1 6 0 0 1 d 1 6 0 0 1 e 1 6 0 0 1 f 1 6 0020 16 0021 16 0022 16 0023 16 0024 16 0025 16 0026 16 0027 16 0028 16 0029 16 002a 16 002b 16 002c 16 002d 16 002e 16 002f 16 0030 16 0031 16 0032 16 0033 16 0034 16 0035 16 0036 16 0037 16 0038 16 0039 16 003a 16 003b 16 003c 16 003d 16 003e 16 003f 16 address r e g i s t e r symbol after reset address match interrupt register 0 rmad0 00 16 00 16 x0 16 a d d r e s s m a t c h i n t e r r u p t r e g i s t e r 1r m a d 10 0 1 6 0 0 1 6 x 0 1 6 w a t c h d o g t i m e r r e s e t r e g i s t e rw d t rx x 1 6 h i g h - s p e e d o n - c h i p o s c i l l a t o r c o n t r o l r e g i s t e r 0h r 00 0 1 6 h i g h - s p e e d o n - c h i p o s c i l l a t o r c o n t r o l r e g i s t e r 1h r 14 0 1 6 voltage detection register 1 vcr1 00001000 2 v o l t a g e d e t e c t i o n r e g i s t e r 2v c r 20 0 1 6 1 0 0 0 0 0 0 0 2 voltage detection interrupt register d4int 00 16 x : u n d e f i n e d n o t e s : ( 2 ) 01000001 2 ( 4 ) ( 3 ) ( 2 ) ( 2 ) ( 4 ) ( 3 ) 4. special function register (sfr) sfr(special function register) is the control register of peripheral functions. tables 4.1 to 4.4 list the sfr information table 4.1 sfr information(1) (1)
r8c/11 group 4. special function register (sfr) rev.1.60 jan 27, 2006 page 11 of 26 rej03b0034-0160 u a r t 0 t r a n s m i t i n t e r r u p t c o n t r o l r e g i s t e r s 0 t i cx x x x x 0 0 0 2 u a r t 0 r e c e i v e i n t e r r u p t c o n t r o l r e g i s t e r s 0 r i cx x x x x 0 0 0 2 uart1 transmit interrupt control register s1tic xxxxx000 2 u a r t 1 r e c e i v e i n t e r r u p t c o n t r o l r e g i s t e r s 1 r i cx x x x x 0 0 0 2 k e y i n p u t i n t e r r u p t c o n t r o l r e g i s t e rk u p i cx x x x x 0 0 0 2 a d c o n v e r s i o n i n t e r r u p t c o n t r o l r e g i s t e ra d i cx x x x x 0 0 0 2 int1 interrupt control register int1ic xxxxx000 2 int2 interrupt control register int2ic xxxxx000 2 int0 interrupt control register int0ic xx00x000 2 int3 interrupt control register int3ic xxxxx000 2 0 0 4 0 1 6 0 0 4 1 1 6 0 0 4 2 1 6 0 0 4 3 1 6 0 0 4 4 1 6 0 0 4 5 1 6 0 0 4 6 1 6 0 0 4 7 1 6 0 0 4 8 1 6 0 0 4 9 1 6 0 0 4 a 1 6 0 0 4 b 1 6 0 0 4 c 1 6 0 0 4 d 1 6 0 0 4 e 1 6 0 0 4 f 1 6 0 0 5 0 1 6 0 0 5 1 1 6 0 0 5 2 1 6 0 0 5 3 1 6 0 0 5 4 1 6 0 0 5 5 1 6 0 0 5 6 1 6 0 0 5 7 1 6 0 0 5 8 1 6 0 0 5 9 1 6 0 0 5 a 1 6 0 0 5 b 1 6 0 0 5 c 1 6 0 0 5 d 1 6 0 0 5 e 1 6 0 0 5 f 1 6 0 0 6 0 1 6 0 0 6 1 1 6 0 0 6 2 1 6 0 0 6 3 1 6 0 0 6 4 1 6 0 0 6 5 1 6 0 0 6 6 1 6 0 0 6 7 1 6 0 0 6 8 1 6 0 0 6 9 1 6 0 0 6 a 1 6 0 0 6 b 1 6 0 0 6 c 1 6 0 0 6 d 1 6 0 0 6 e 1 6 0 0 6 f 1 6 0 0 7 0 1 6 0 0 7 1 1 6 0 0 7 2 1 6 0 0 7 3 1 6 0 0 7 4 1 6 0 0 7 5 1 6 0 0 7 6 1 6 0 0 7 7 1 6 0 0 7 8 1 6 0 0 7 9 1 6 0 0 7 a 1 6 0 0 7 b 1 6 0 0 7 c 1 6 0 0 7 d 1 6 0 0 7 e 1 6 0 0 7 f 1 6 a d d r e s s r e g i s t e r symbol a f t e r r e s e t timer x interrupt control register txic xxxxx000 2 timer y interrupt control register tyic xxxxx000 2 t i m e r z i n t e r r u p t c o n t r o l r e g i s t e rt z i cx x x x x 0 0 0 2 t i m e r c i n t e r r u p t c o n t r o l r e g i s t e rt c i cx x x x x 0 0 0 2 c o m p a r e 1 i n t e r r u p t c o n t r o l r e g i s t e r c m p 1 i cx x x x x 0 0 0 2 c o m p a r e 0 i n t e r r u p t c o n t r o l r e g i s t e r c m p 0 i cx x x x x 0 0 0 2 x : u n d e f i n e d n o t e s : 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . table 4.2 sfr information(2) (1)
r8c/11 group 4. special function register (sfr) rev.1.60 jan 27, 2006 page 12 of 26 rej03b0034-0160 0 0 8 0 1 6 0 0 8 1 1 6 0 0 8 2 1 6 0 0 8 3 1 6 0 0 8 4 1 6 0 0 8 5 1 6 0 0 8 6 1 6 0 0 8 7 1 6 0 0 8 8 1 6 0 0 8 9 1 6 0 0 8 a 1 6 0 0 8 b 1 6 0 0 8 c 1 6 0 0 8 d 1 6 0 0 8 e 1 6 0 0 8 f 1 6 0 0 9 0 1 6 0 0 9 1 1 6 0 0 9 2 1 6 0 0 9 3 1 6 0 0 9 4 1 6 0 0 9 5 1 6 0 0 9 6 1 6 0 0 9 7 1 6 0 0 9 8 1 6 0 0 9 9 1 6 0 0 9 a 1 6 0 0 9 b 1 6 0 0 9 c 1 6 0 0 9 d 1 6 0 0 9 e 1 6 0 0 9 f 1 6 0 0 a 0 1 6 0 0 a 1 1 6 0 0 a 2 1 6 0 0 a 3 1 6 0 0 a 4 1 6 0 0 a 5 1 6 0 0 a 6 1 6 0 0 a 7 1 6 0 0 a 8 1 6 0 0 a 9 1 6 0 0 a a 1 6 0 0 a b 1 6 0 0 a c 1 6 0 0 a d 1 6 0 0 a e 1 6 0 0 a f 1 6 0 0 b 0 1 6 0 0 b 1 1 6 0 0 b 2 1 6 0 0 b 3 1 6 0 0 b 4 1 6 0 0 b 5 1 6 0 0 b 6 1 6 0 0 b 7 1 6 0 0 b 8 1 6 0 0 b 9 1 6 0 0 b a 1 6 0 0 b b 1 6 0 0 b c 1 6 0 0 b d 1 6 0 0 b e 1 6 0 0 b f 1 6 t i m e r x r e g i s t e rt xf f 1 6 t i m e r y s e c o n d a r y r e g i s t e rt y s cf f 1 6 e x t e r n a l i n p u t e n a b l e r e g i s t e ri n t e n0 0 1 6 p r e s c a l e r y r e g i s t e rp r e yf f 1 6 u a r t 0 t r a n s m i t / r e c e i v e m o d e r e g i s t e r u 0 m r0 0 1 6 uart0 transmit buffer register u0tb xx 16 xx 16 u a r t 0 r e c e i v e b u f f e r r e g i s t e r u 0 r bx x 1 6 x x 1 6 u a r t 1 t r a n s m i t / r e c e i v e m o d e r e g i s t e r u 1 m r0 0 1 6 u a r t 1 t r a n s m i t b u f f e r r e g i s t e ru 1 t bx x 1 6 x x 1 6 u a r t 1 r e c e i v e b u f f e r r e g i s t e r u 1 r bx x 1 6 x x 1 6 uart0 bit rate register u0brg xx 16 uart0 transmit/receive control register 0 u0c0 00001000 2 u a r t 0 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 1 u 0 c 10 0 0 0 0 0 1 0 2 u a r t 1 b i t r a t e r e g i s t e ru 1 b r gx x 1 6 u a r t 1 t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0 u 1 c 00 0 0 0 1 0 0 0 2 uart1 transmit/receive control register 1 u1c1 00000010 2 uart transmit/receive control register 2 ucon 00 16 a d d r e s s r e g i s t e r symbol a f t e r r e s e t t i m e r y , z m o d e r e g i s t e rt y z m r0 0 1 6 t i m e r y p r i m a r y r e g i s t e rt y p rf f 1 6 t i m e r y , z w a v e f o r m o u t p u t c o n t r o l r e g i s t e rp u m0 0 1 6 p r e s c a l e r z r e g i s t e rp r e zf f 1 6 t i m e r z s e c o n d a r y r e g i s t e rt z s cf f 1 6 t i m e r z p r i m a r y r e g i s t e rt z p rf f 1 6 t i m e r y , z o u t p u t c o n t r o l r e g i s t e rt y z o c0 0 1 6 t i m e r x m o d e r e g i s t e rt x m r0 0 1 6 p r e s c a l e r x r e g i s t e rp r e xf f 1 6 t i m e r c o u n t s o u r c e s e t r e g i s t e rt c s s0 0 1 6 t i m e r c r e g i s t e rt c0 0 1 6 0 0 1 6 k e y i n p u t e n a b l e r e g i s t e rk i e n0 0 1 6 timer c control register 0 tcc0 00 16 timer c control register 1 tcc1 00 16 c a p t u r e , c o m p a r e 0 r e g i s t e rt m 00 0 1 6 0 0 1 6 compare 1 register tm1 ff 16 ff 16 x : u n d e f i n e d n o t e s : 1 . b l a n k s p a c e s a r e r e s e r v e d . n o a c c e s s i s a l l o w e d . 2 . w h e n o u t p u t c o m p a r e m o d e ( t h e t c c 1 3 b i t i n t h e t c c 1 r e g i s t e r = 1 ) i s s e l e c t e d , t h e v a l u e a f t e r r e s e t i s s e t t o f f f f 1 6 . ( 2 ) table 4.3 sfr information(3) (1)
r8c/11 group 4. special function register (sfr) rev.1.60 jan 27, 2006 page 13 of 26 rej03b0034-0160 0 0 c 0 1 6 0 0 c 1 1 6 0 0 c 2 1 6 0 0 c 3 1 6 0 0 c 4 1 6 0 0 c 5 1 6 0 0 c 6 1 6 0 0 c 7 1 6 0 0 c 8 1 6 0 0 c 9 1 6 0 0 c a 1 6 0 0 c b 1 6 0 0 c c 1 6 0 0 c d 1 6 0 0 c e 1 6 0 0 c f 1 6 0 0 d 0 1 6 0 0 d 1 1 6 0 0 d 2 1 6 0 0 d 3 1 6 0 0 d 4 1 6 0 0 d 5 1 6 0 0 d 6 1 6 0 0 d 7 1 6 0 0 d 8 1 6 0 0 d 9 1 6 0 0 d a 1 6 0 0 d b 1 6 0 0 d c 1 6 0 0 d d 1 6 0 0 d e 1 6 0 0 d f 1 6 0 0 e 0 1 6 0 0 e 1 1 6 0 0 e 2 1 6 0 0 e 3 1 6 0 0 e 4 1 6 0 0 e 5 1 6 0 0 e 6 1 6 0 0 e 7 1 6 0 0 e 8 1 6 0 0 e 9 1 6 0 0 e a 1 6 0 0 e b 1 6 0 0 e c 1 6 0 0 e d 1 6 0 0 e e 1 6 0 0 e f 1 6 0 0 f 0 1 6 0 0 f 1 1 6 0 0 f 2 1 6 0 0 f 3 1 6 0 0 f 4 1 6 0 0 f 5 1 6 0 0 f 6 1 6 0 0 f 7 1 6 0 0 f 8 1 6 0 0 f 9 1 6 0 3 f a 1 6 0 0 f b 1 6 0 0 f c 1 6 0 0 f d 1 6 0 0 f e 1 6 0 0 f f 1 6 0 1 b 3 1 6 0 1 b 4 1 6 0 1 b 5 1 6 0 1 b 6 1 6 0 1 b 7 1 6 a d r e g i s t e ra dx x 1 6 x x 1 6 a d c o n t r o l r e g i s t e r 0a d c o n 00 0 0 0 0 x x x 2 a d c o n t r o l r e g i s t e r 2a d c o n 20 0 1 6 a d c o n t r o l r e g i s t e r 1 a d c o n 10 0 1 6 port p0 register p0 xx 16 port p0 direction register pd0 00 16 p o r t p 1 r e g i s t e rp 1x x 1 6 p o r t p 1 d i r e c t i o n r e g i s t e rp d 10 0 1 6 p o r t p 3 r e g i s t e rp 3x x 1 6 p o r t p 3 d i r e c t i o n r e g i s t e rp d 30 0 1 6 p o r t p 4 r e g i s t e rp 4x x 1 6 p o r t p 4 d i r e c t i o n r e g i s t e rp d 40 0 1 6 p u l l - u p c o n t r o l r e g i s t e r 0 p u r 00 0 x x 0 0 0 0 2 p o r t p 1 d r i v e c a p a c i t y c o n t r o l r e g i s t e r d r r0 0 1 6 r e g i s t e r symbol after reset a d d r e s s p u l l - u p c o n t r o l r e g i s t e r 1 p u r 1x x x x x x 0 x 2 f l a s h m e m o r y c o n t r o l r e g i s t e r 1 f m r 10 1 0 0 x x 0 x 2 f l a s h m e m o r y c o n t r o l r e g i s t e r 0 f m r 00 0 0 0 0 0 0 1 2 t i m e r c o u t p u t c o n t r o l r e g i s t e r t c o u t0 0 1 6 f l a s h m e m o r y c o n t r o l r e g i s t e r 4 f m r 40 1 0 0 0 0 0 0 2 x : u n d e f i n e d n o t e s : 1 . b l a n k c o l u m n s , 0 1 0 0 1 6 t o 0 1 b 2 1 6 a n d 0 1 b 8 1 6 t o 0 2 f f 1 6 a r e a l l r e s e r v e d . n o a c c e s s i s a l l o w e d . table 4.4 sfr information(4) (1)
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 14 of 26 rej03b0034-0160 5. electrical characteristics operating ambient temperature parameter unit supply voltage output voltage v o p d power dissipation storage temperature rated value v v condition v cc t stg t opr symbol mw v cc =av cc v av cc v -0.3 to 6.5 -65 to 150 300 -20 to 85 / -40 to 85 (d version) c topr=25 c analog supply voltage v cc =av cc -0.3 to 6.5 v i input voltage -0.3 to v cc +0.3 -0.3 to v cc +0.3 c table 5.1 absolute maximum ratings table 5.2 recommended operating conditions 2.7 5 . 5 t y p .m a x . unit p a r a m e t e r v c c s u p p l y v o l t a g e s y m b o l m i n . s t a n d a r d a n a l o g s u p p l y v o l t a g e v c c (3 ) a v c c v v 0 0 a n a l o g s u p p l y v o l t a g e s u p p l y v o l t a g e v i h v s s a v s s 0.8v cc v v v cc 0.2v cc "l" input voltage " h " i n p u t v o l t a g e v f ( x i n ) m a i n c l o c k i n p u t o s c i l l a t i o n f r e q u e n c y v v i l 10 3 . 0v v c c 5 . 5 v 2.7v vcc < 3.0v mhz m h z notes: 1. v cc = av cc = 2.7 to 5.5v at topr = -20 to 85 c / -40 to 85 c, unless otherwise specified. 2. the typical values when average output current is 100ms. 3. hold vcc=avcc. 0 i o h ( s u m ) " h " p e a k a l l o u t p u t c u r r e n t s conditions sum of all pins' ioh (peak) -60.0 m a i o h ( p e a k ) "h" peak output current -10.0 m a i o h ( a v g ) "h" average output current -5.0 ma i o l ( s u m ) "l" peak all output currents s u m o f a l l p i n s ' i o l ( p e a k ) 60 ma i ol (peak) " l " p e a k o u t p u t c u r r e n t except p1 0 to p1 7 p1 0 to p1 7 10 ma drive capacity high drive capacity low 3 0 10 m a ma i ol (avg) "l" average output current except p1 0 to p1 7 p1 0 to p1 7 d r i v e c a p a c i t y h i g h drive capacity low 5 1 5 5 ma ma ma 0 0 20
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 15 of 26 rej03b0034-0160 table 5.3 a/d conversion characteristics standard m i n .typ.m a x . r e s o l u t i o n bit v r e f = v c c 1 0 s y m b o lp a r a m e t e rm e a s u r i n g c o n d i t i o nunit lsb 3 r l a d d e r t c o n v l a d d e r r e s i s t a n c e c o n v e r s i o n t i m e r e f e r e n c e v o l t a g e analog input voltage v v i a v r e f 0v ref notes: 1. v cc =av cc =2.7 to 5.5v at topr = -20 to 85 c / -40 to 85 c, unless otherwise specified. 2. if f ad exceeds 10 mhz more, divide the f ad and hold a/d operating clock frequency ( ad) 10 mhz or below. 3. if the avcc is less than 4.2v, divide the f ad and hold a/d operating clock frequency ( ad) f ad /2 or below. 4. hold vcc=vref. ad=10 mhz, vref=vcc=5.0v v ref =v cc a b s o l u t e a c c u r a c y 1 0 b i t m o d e 8 bit mode a d = 1 0 m h z , v r e f = v c c = 5 . 0 v 2 l s b 1 0 b i t m o d e 8 b i t m o d e ad=10 mhz, vref=vcc=3.3v (3) 5l s b a d = 1 0 m h z , v r e f = v c c = 3 . 3 v (3 ) 2l s b 1 0 40 k ? 10 bit mode 8 bit mode a d = 1 0 m h z , v r e f = v c c = 5 . 0 v a d = 1 0 m h z , v r e f = v c c = 5 . 0 v 3 . 3 2 . 8 s s v a / d o p e r a t i n g c l o c k f r e q u e n c y ( 2 ) w i t h o u t s a m p l e & h o l d w i t h s a m p l e & h o l d 0.25 1 0 mhz 1.0 1 0 mhz v c c (4 ) p0 p1 p2 p3 p4 30pf figure 5.1 port p0 to p4 measurement circuit
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 16 of 26 rej03b0034-0160 b y t e p r o g r a m t i m e b l o c k e r a s e t i m e p r o g r a m , e r a s e v o l t a g e r e a d v o l t a g e 5 0 0.4 ? p a r a m e t e r standard m i n .t y p .m a x u n i t n o t e s : 1 . r e f e r e n c e d t o v c c 1 = a v c c = 2 . 7 t o 5 . 5 v a t t o p r = 0 t o 6 0 c u n l e s s o t h e r w i s e s p e c i f i e d . 2 . t h e d a t a h o l d t i m e i n c l u d e s t i m e t h a t t h e p o w e r s u p p l y i s o f f o r t h e c l o c k i s n o t s u p p l i e d . measuring condition s y m b o l p r o g r a m , e r a s e t e m p e r a t u r e 2.7 2.7 0 400 9 5 . 5 5 . 5 6 0 s v v c t i m e d e l a y f r o m s u s p e n d r e q u e s t u n t i l e r a s e s u s p e n d t d ( s r - e s ) p r o g r a m / e r a s e e n d u r a n c e 8 ms 100 t i m e s d a t a h o l d t i m e ( 2 ) a m b i e n t t e m p e r a t u r e= 5 5 c 20 y e a r e r a s e s u s p e n d r e q u e s t i n t e r v a l 10 m s table 5.4 flash memory version electrical characteristics table 5.5 voltage detection circuit electrical characteristics s y m b o l s t a n d a r d typ. unit measuring condition min. m a x . p a r a m e t e r v d e t v o l t a g e d e t e c t i o n l e v e l v 3 . 84 . 3 n o t e s : 1 . t h e m e a s u r i n g c o n d i t i o n i s v c c = a v c c = 2 . 7 v t o 5 . 5 v a n d t o p r = - 4 0 c t o 8 5 c . 2 . t h i s s h o w s t h e t i m e u n t i l t h e v o l t a g e d e t e c t i o n i n t e r r u p t r e q u e s t i s g e n e r a t e d s i n c e t h e v o l t a g e p a s s e s v d e t . 3 . t h i s s h o w s t h e r e q u i r e d t i m e u n t i l t h e v o l t a g e d e t e c t i o n c i r c u i t o p e r a t e s w h e n s e t t i n g t o " 1 " a g a i n a f t e r s e t t i n g t h e v c 2 7 b i t i n t h e v c r 2 r e g i s t e r t o 0 . v o l t a g e d e t e c t i o n i n t e r r u p t r e q u e s t g e n e r a t i n g t i m e (2 ) 4 0 na voltage detection circuit self consumption current waiting time till voltage detection circuit operation starts (3) td(e-a) v c 2 7 = 1 , v c c = 5 . 0 v 3 . 3 20 600 s s vccmin minimum value of microcomputer operation voltage 2.7 v fmr46 erase-suspend request (interrupt request) t d(sr-es) figure 5.2 time delay from suspend request until erase suspend
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 17 of 26 rej03b0034-0160 figure 5.3 reset circuit electrical characteristics v por1 v cc min v det (3) v det (3) t w(por1) t w(vpor1 vdet) sampling time (1, 2) internal reset signal ( l effective) f ring-s 1 x 32 f ring-s 1 x 32 v por2 notes: 1. hold the voltage of the microcomputer operation voltage range (vccmin or above) within sampling time. 2. a sampling clock is selectable. refer to 5.4 voltage detection circuit of hardware manual for details. 3. v det shows the voltage detection level of the voltage detection circuit. refer to 5.4 voltage detection circuit for details. 4. refer to table 16.6 reset circuit electrical characteristics for electrical characteristics. t w(por2) t w(vpor2 vdet) table 5.6 reset circuit electrical characteristics (when using hardware reset 2 (1, 3) ) s y m b o l standard t y p . u n i t m e a s u r i n g c o n d i t i o n m i n .m a x . p a r a m e t e r v p o r 2 p o w e r - o n r e s e t v a l i d v o l t a g e v v d e t n o t e s : 1 . t h e v o l t a g e d e t e c t i o n c i r c u i t w h i c h i s e m b e d d e d i n a m i c r o c o m p u t e r i s a f a c t o r t o g e n e r a t e t h e h a r d w a r e r e s e t 2 . r e f e r t o 5 . 1 . 2 h a r d w a r e r e s e t 2 o f h a r d w a r e m a n u a l f o r d e t a i l s . 2 . t h i s c o n d i t i o n i s n o t a p p l i c a b l e w h e n u s i n g w i t h v c c 1 . 0 v . 3 . w h e n t u r n i n g p o w e r o n a f t e r t h e e x t e r n a l p o w e r h a s b e e n h e l d b e l o w t h e v a l i d v o l t a g e ( v p o r 1 ) f o r g r e a t e r t h a n 1 0 s e c o n d s , r e f e r t o t a b l e 5 . 7 r e s e t c i r c u i t e l e c t r i c a l c h a r a c t e r i s t i c s ( w h e n n o t u s i n g h a r d w a r e r e s e t 2 ) . 4 . t w ( p o r 2 ) i s t i m e t o h o l d t h e e x t e r n a l p o w e r b e l o w e f f e c t i v e v o l t a g e ( v p o r 2 ) . s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d (2 ) t w ( v p o r 2 - v d e t ) ms 1 0 0 2 0 c t o p r < 8 5 c 2 0 c t o p r < 8 5 c , t w ( p o r 2 ) 0 s (4 ) table 5.7 reset circuit electrical characteristics (when not using hardware reset 2) s y m b o l s t a n d a r d t y p . u n i t measuring condition m i n .m a x . p a r a m e t e r 0.1 n o t e s : 1 . w h e n n o t u s i n g h a r d w a r e r e s e t 2 , u s e w i t h v c c 2 . 7 v . 2 . t w ( p o r 1 ) i s t i m e t o h o l d t h e e x t e r n a l p o w e r b e l o w e f f e c t i v e v o l t a g e ( v p o r 1 ) . 100 1 t w ( v p o r 1 - v d e t ) s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d 0.5 t w ( v p o r 1 - v d e t ) supply voltage rising time when power-on reset is canceled t w ( v p o r 1 - v d e t ) s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d v v p o r 1 p o w e r - o n r e s e t v a l i d v o l t a g e m s ms m s tw(vpor1- vdet) s u p p l y v o l t a g e r i s i n g t i m e w h e n p o w e r - o n r e s e t i s c a n c e l e d 100 m s 0 c t o p r 8 5 c , t w ( p o r 1 ) 1 0 s (2 ) 2 0 c t o p r < 0 c , t w ( p o r 1 ) 1 0 s (2 ) 0 c t o p r 8 5 c , t w ( p o r 1 ) 1 s (2 ) 2 0 c t o p r < 8 5 c 2 0 c t o p r < 0 c , t w ( p o r 1 ) 3 0 s (2 )
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 18 of 26 rej03b0034-0160 table 5.10 electrical characteristics (1) [vcc=5v] s y m b o l v o h v o l " l " o u t p u t v o l t a g e "h" output voltage standard t y p . u n i t m e a s u r i n g c o n d i t i o n v v v min. max. v c c - 2 . 0 p a r a m e t e r i o h = - 5m a v h y s t e r e s i s " h " i n p u t c u r r e n t i i h " l " i n p u t c u r r e n t i i l v r a m r a m r e t e n t i o n v o l t a g e v t + - v t - 0.2 v a at stop mode 2.0 v i =5v v i =0v r f x i n f e e d b a c k r e s i s t a n c e x i n m ? r p u l l u p p u l l - u p r e s i s t a n c e 1 6 7 k ? 3 0 12 5 n o t e s : 1 . r e f e r e n c e d t o v c c = a v c c = 4 . 2 t o 5 . 5 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 2 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . v cc e x c e p t x o u t x out i oh = - 200a d r i v e a b i l i t y h i g h drive ability low v c c - 0 . 3 v cc v i oh = - 1 ma v cc - 2.0 v c c - 2 . 0 i o h = - 500 a v v v c c v cc except p1 0 to p1 7 , x out p1 0 to p1 7 x o u t drive capacity high drive capacity low i o l = 5 m a i o l = 2 0 0 a i ol = 15 ma i ol = 5 ma 2.0 0.45 v 2.0 2.0 v drive capacity high d r i v e c a p a c i t y l o w i ol = 1 ma i ol =500 a 2.0 2.0 v reset 0.2 1.0 2.2 v 5. 0 - 5. 0 a v i = 0 v 50 1.0 f r i n g - s l o w - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 40 250 k h z drive capacity low i ol = 200 a 0.45 v v i n t o , i n t 1 , i n t 2 , i n t 3 , k i 0 , k i 1 , k i 2 , k i 3 , c n t r 0 , c n t r 1 , t c i n , r x d 0 , r x d 1 , p 4 5 s y m b o l s t a n d a r d typ. unit m e a s u r i n g c o n d i t i o n m i n .m a x . p a r a m e t e r h i g h - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 1 / { t d ( h r o f f s e t ) + t d ( h r ) } w h e n t h e r e s e t i s r e l e a s e d n o t e s : 1 . t h e m e a s u r i n g c o n d i t i o n i s v c c = a v c c = 5 . 0 v a n d t o p r = 2 5 c . h i g h - s p e e d o n - c h i p o s c i l l a t o r p e r i o d a d j u s t e d u n i t mhz ns v c c = 5 . 0 v , t o p r = 2 5 c s e t " 0 0 1 6 " i n t h e h r 1 r e g i s t e r 8 61 d i f f e r e n c e s w h e n s e t t i n g " 0 1 1 6 " a n d " 0 0 1 6 " i n t h e h r r e g i s t e r s e t t a b l e h i g h - s p e e d o n - c h i p o s c i l l a t o r m i n i m u m p e r i o d h i g h - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y t e m p e r a t u r e d e p e n d e n c e ( 1 ) t d ( h r o f f s e t ) t d ( h r ) v c c = 5 . 0 v , t o p r = 2 5 c s e t " 4 0 1 6 " i n t h e h r 1 r e g i s t e r 1 ns f r e q u e n c y f l u c t u a t i o n i n t e m p e r a t u r e r a n g e o f - 1 0 c t o 5 0 c 5 % % h i g h - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y t e m p e r a t u r e d e p e n d e n c e ( 2 ) frequency fluctuation in temperature range of -40 c to 85 c 10 6 1 0 table 5.8 high-speed on-chip oscillator circuit electrical characteristics s y m b o l s t a n d a r d t y p . u n i t measuring condition m i n .m a x . p a r a m e t e r 2 0 0 0 n o t e s : 1 . t h e m e a s u r i n g c o n d i t i o n i s v c c = a v c c = 2 . 7 t o 5 . 5 v a n d t o p r = 2 5 c . 2 . t h i s s h o w s t h e w a i t t i m e u nt i l t h e i n t e r n a l p o w e r s u p p l y g e n e r a t i n g c i r c u i t i s s t a b i l i z e d d u r i n g p o w e r - o n . 3 . t h i s s h o w s t h e t i m e u n t i l b c l k s t a r t s f r o m t h e i n t e r r u p t a c k n o w l e d g e m e n t t o c a n c e l s t o p m o d e . 150 t d ( r - s ) stop release time (3) s t d ( p - r ) t i m e f o r i n t e r n a l p o w e r s u p p l y s t a b i l i z a t i o n d u r i n g p o w e r i n g - o n (2 ) s 1 table 5.9 power circuit timing characteristics
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 19 of 26 rej03b0034-0160 s y m b o l s t a n d a r d typ. u n i t m e a s u r i n g c o n d i t i o n m i n .m a x . p a r a m e t e r n o di v i s i on m a i n s i n g l e - c h i p m o d e , t h e o u t p u t p i n s a r e o p e n a n d o t h e r p i n s a r e v s s 91 5 x in =20 mh z ( square wave ) m a h i g h - s p e e d m o d e i c c p o w e r s u p p l y c u r r e n t ( v c c =3 . 3 t o 5 . 5 v ) 4 7 0 notes: 1. timer y is operated with timer mode. 2. referenced to v cc = av cc = 4.2 to 5.5v at topr = -20 to 85 c / -40 to 85 c, f(x in )=20mhz unless otherwise specified. m a medium-speed mode high-speed on-chip oscillator mode l o w - s p e e d o n - c h i p o s c i l l a t o r m o d e hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z x in =16 mh z ( square wave ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z n o di v i s i on 8 x i n = 2 0 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 4 x i n = 1 6 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 3 m a m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator on=8 mh z l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o d i v i s i o n 4 8 m a m a i n c l oc k o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 ma 1.5 m a i n c l o c k o f f h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z h i g h - s p e e d o n - c h i p o s c i l l a t o r o n = 8 m h z m a x in =10 mh z ( square wave ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z n o di v i s i on 5 x i n = 1 0 m h z ( s q u a r e w a v e ) hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 2 m a 14 9 0 0 wait mode a di v i s i on b y 8 m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d ( 1 ) p e r i p h e r a l c l o c k o p e r a t i o n 40 ? wait mode m a i n c l oc k o ff h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l ow-spee d on-c hi p osc ill ator on=125 kh z when a wait instruction is executed (1) p er i p h era l c l oc k o ff 38 76 80 a stop mode m a i n c l o c k o f f , t o p r = 2 5 c hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator o ff c m 1 0 = " 1 " p er i p h era l c l oc k o ff 0 . 8 3 . 0 vc 27="0" vc 27=0 vc 27=0 ? table 5.11 electrical characteristics (2) [vcc=5v]
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 20 of 26 rej03b0034-0160 timing requirements (unless otherwise noted: v cc = 5v, v ss = 0v at topr = 25 ?) [v cc =5v] table 5.12 x in input ________ table 5.13 cntr0 input, cntr1 input, int2 input ________ table 5.14 tcin input, int3 input table 5.15 serial interface ________ table 5.16 external interrupt int0 input symbol t c (x in ) t wh (x in ) t wl (x in ) parameter x in input cycle time x in input high pulse width x in input low pulse width min. 50 25 25 max. unit ns ns ns standard symbol t c ( cntr0 ) t wh ( cntr0 ) t wl ( cntr0 ) parameter cntr0 input cycle time cntr0 input high pulse width cntr0 input low pulse width min. 100 40 40 max. unit ns ns ns standard symbol t c ( tcin ) t wh ( tcin ) t wl ( tcin ) parameter tcin input cycle time tcin input high pulse width tcin input low pulse width min. 400 (1) 200 (2) 200 (2) max. unit ns ns ns standard notes: 1. when using the timer c input capture mode, adjust the cycle time above ( 1/ timer c count source frequency x 3). 2. when using the timer c input capture mode, adjust the pulse width above ( 1/ timer c count source frequency x 1.5). notes: ________ ________ 1. when selecting the digital filter by the int0 input filter select bit, use the int0 input high pulse width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. ________ ________ 2. when selecting the digital filter by the int0 input filter select bit, use the int0 input low pusle width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. symbol t c ( ck ) t w ( ckh ) t w ( ckl ) t d ( c-q ) t h ( c-q ) t su ( d-c ) t h ( c-d ) parameter clki input cycle time clki input high pulse width clki input low pulse width txdi output delay time txdi hold time rxdi input setup time rxdi input hold time min. 200 100 100 0 35 90 max. unit ns ns ns ns ns ns ns standard 80 symbol t w ( inh ) t w ( inl ) parameter ________ int0 input high pulse width ________ int0 input low pulse width min. 250 (1) 250 (2) max. unit ns ns standard
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 21 of 26 rej03b0034-0160 figure 5.4 vcc=5v timing diagram clk i txd i rxd i int i t w(ckh) t c(ck) t w(ckl) t h(c-q) t h(c-d) t su(d-c) t d(c-q) t w(inl) t w(inh) x in input t wh(xin) t c(xin) t wl(xin) tcin input t wh(tcin) t c(tcin) t wl(tcin) cntr0 input t wh(cntr0) t c(cntr0) t wl(cntr0) v cc = 5v
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 22 of 26 rej03b0034-0160 s y m b o l v oh v o l " l " o u t p u t v o l t a g e " h " o u t p u t v o l t a g e s t a n d a r d t y p . u n i t m e a s u r i n g c o n d i t i o n v v v m i n .m a x . v c c - 0 . 5 p a r a m e t e r i oh = - 1ma v h y s t e r e s i s " h " i n p u t c u r r e n t i i h " l " i n p u t c u r r e n t i i l v r a m r a m r e t e n t i o n v o l t a g e v t + - v t - 0 . 2 v a at stop mode 2 . 0 v i = 3 v r f x i n f e e d b a c k r e s i s t a n c e x in m ? r p u l l u p p u l l - u p r e s i s t a n c e k ? 6 6 125 notes: 1. referenced to v cc = av cc = 2.7 to 3.3v at topr = -20 to 85 c / -40 to 85 c, f(x in )=10mhz unless otherwise specified. v c c e x c e p t x o u t x out drive capacity high drive capacity low i oh = - 0.1 ma v c c - 0 . 5 v c c - 0 . 5 i oh = - 50 a v v v c c v c c except p1 0 to p1 7 , x out p 1 0 t o p 1 7 x o u t d r i v e c a p a c i t y h i g h d r i v e c a p a c i t y l o w i ol = 1 ma i o l = 2 m a i o l = 1 m a 0 . 5 v 0.5 0.5 v drive capacity high drive capacity low i o l = 0 . 1 m a i o l = 5 0 a 0 . 5 0 . 5 v r e s e t 0 . 2 0 . 8 1 . 8 v 4.0 - 4. 0a v i =0v 160 3.0 f r i n g - s l o w - s p e e d o n - c h i p o s c i l l a t o r f r e q u e n c y 40 2 5 0 khz v i =0v 5 0 0 i n t o , i n t 1 , i n t 2 , i n t 3 , k i 0 , k i 1 , k i 2 , k i 3 , c n t r 0 , c n t r 1 , t c i n , r x d 0 , r x d 1 , p 4 5 table 5.17 electrical characteristics (3) [vcc=3v]
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 23 of 26 rej03b0034-0160 table 5.18 electrical characteristics (4) [vcc=3v] s y m b o l s t a n d a r d t y p . u n i t measuring condition min. m a x . p a r a m e t e r n o di v i s i on m a i n s i n g l e - c h i p m o d e , t h e o u t p u t p i n s a r e o p e n a n d o t h e r p i n s a r e v s s 813 x in =20 mh z ( square wave ) m a high-speed mode i c c p o w e r s u p p l y c u r r e n t ( v c c =2 . 7 t o 3 . 3 v ) 4 2 0 n o t e s : 1 . t i m e r y i s o p e r a t e d w i t h t i m e r m o d e . 2. r e f e r e n c e d t o v c c = a v c c = 2 . 7 t o 3 . 3 v a t t o p r = - 2 0 t o 8 5 c / - 4 0 t o 8 5 c , f ( x i n ) = 1 0 m h z u n l e s s o t h e r w i s e s p e c i f i e d . w a i t m o d e a ? m a medium-speed mode high-speed on-chip oscillator mode low-speed on-chip oscillator mode h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z x in =16 mh z ( square wave ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o di v i s i on 7 x i n = 2 0 m h z ( s q u a r e w a v e ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 3 x i n = 1 6 m h z ( s q u a r e w a v e ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 2 . 5 m a m a i n c l o c k o f f h i g h - s p e e d o n - c h i p o s c i l l a t o r o n = 8 m h z l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o d i v i s i o n 3 . 5 7 . 5 m a m a i n c l oc k o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 m a 1 . 5 m a i n c l oc k o ff hi g h -spee d on-c hi p osc ill ator o ff l ow-spee d on-c hi p osc ill ator on=125 kh z di v i s i on b y 8 m a i n c l oc k o ff h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l ow-spee d on-c hi p osc ill ator on=125 kh z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d (1) p er i p h era l c l oc k operat i on 37 h i g h - s p e e d o n - c h i p o s c i l l a t o r o n = 8 m h z m a x in =10 mh z ( square wave ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z n o di v i s i on 5 x i n = 1 0 m h z ( s q u a r e w a v e ) h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z d i v i s i o n b y 8 1 . 6 m a 12 800 ? wait mode m a i n c l o c k o f f hi g h -spee d on-c hi p osc ill ator o ff l o w - s p e e d o n - c h i p o s c i l l a t o r o n = 1 2 5 k h z when a wait instruction is executed (1) p er i p h era l c l oc k o ff 35 70 74 s t o p m o d e m a i n c l oc k o ff , t opr = 25 c h i g h - s p e e d o n - c h i p o s c i l l a t o r o f f l ow-spee d on-c hi p osc ill ator o ff cm 10="1" p er i p h era l c l oc k o ff 0 . 7 3 . 0 vc 27="0" vc 27=0 vc 27=0 ?
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 24 of 26 rej03b0034-0160 timing requirements (unless otherwise noted: v cc = 3v, v ss = 0v at topr = 25 ?) [v cc =3v] table 5.19 x in input ________ table 5.20 cntr0 input, cntr1 input, int2 input ________ table 5.21 tcin input, int3 input table 5.22 serial interface ________ table 5.23 external interrupt int0 input symbol t c (x in ) t wh (x in ) t wl (x in ) parameter x in input cycle time x in input high pulse width x in input low pulse width min. 100 40 40 max. unit ns ns ns standard symbol t c ( cntr0 ) t wh ( cntr0 ) t wl ( cntr0 ) parameter cntr0 input cycle time cntr0 input high pulse width cntr0 input low pulse width min. 300 120 120 max. unit ns ns ns standard symbol t c ( tcin ) t wh ( tcin ) t wl ( tcin ) parameter tcin input cycle time tcin input high pulse width tcin input low pulse width min. 1200 (1) 600 (2) 600 (2) max. unit ns ns ns standard notes: 1. when using the timer c input capture mode, adjust the cycle time above ( 1/ timer c count source frequency x 3). 2. when using the timer c input capture mode, adjust the pulse width above ( 1/ timer c count source frequency x 1.5). notes: ________ ________ 1. when selecting the digital filter by the int0 input filter select bit, use the int0 input high pulse width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. ________ ________ 2. when selecting the digital filter by the int0 input filter select bit, use the int0 input low pusle width to the greater value,either ( 1/ digital filter clock frequency x 3) or the minimum value of standard. symbol t c ( ck ) t w ( ckh ) t w ( ckl ) t d ( c-q ) t h ( c-q ) t su ( d-c ) t h ( c-d ) parameter clki input cycle time clki input high pulse width clki input low pulse width txdi output delay time txdi hold time rxdi input setup time rxdi input hold time min. 300 150 150 0 55 90 max. unit ns ns ns ns ns ns ns standard 160 symbol t w ( inh ) t w ( inl ) parameter ________ int0 input high pulse width ________ int0 input low pulse width min. 380 (1) 380 (2) max. unit ns ns standard
r8c/11 group 5. electrical characteristics rev.1.60 jan 27, 2006 page 25 of 26 rej03b0034-0160 figure 5.5 vcc=3v timing diagram clk i txd i rxd i int i t w(ckh) t c(ck) t w(ckl) t h(c-q) t h(c-d) t su(d-c) t d(c-q) t w(inl) t w(inh) x in input t wh(xin) t c(xin) t wl(xin) tcin input t wh(tcin) t c(tcin) t wl(tcin) cntr0 input t wh(cntr0) t c(cntr0) t wl(cntr0) v cc = 3v
r8c/11 group package dimensions rev.1.60 jan 27, 2006 page 26 of 26 rej03b0034-0160 package dimensions 2. 1. dimensions " * 1" and " * 2" do not include mold flash. note) dimension " * 3" does not include trim offset. y index mark * 3 f 32 25 24 17 16 9 8 1 * 1 * 2 x b p e h e e d h d z d z e detail f l 1 l a c a 2 a 1 previous code jeita package code renesas code plqp0032gb-a 32p6u-a mass[typ.] 0.2g p-lqfp32-7x7-0.80 1.0 0.125 0.35 0.7 0.7 0.20 0.20 0.145 0.09 0.42 0.37 0.32 max nom min dimension in millimeters symbol reference 7.1 7.0 6.9 d 7.1 7.0 6.9 e 1.4 a 2 9.2 9.0 8.8 9.2 9.0 8.8 1.7 a 0.2 0.1 0 0.7 0.5 0.3 l x 8 0 c 0.8 e 0.10 y h d h e a 1 b p b 1 c 1 z d z e l 1 terminal cross section b 1 c 1 bp c
revision history r8c/11 group datasheet rev. date description page summary a-1 1.00 jun. 19, 2003 first edition issued 1.10 sep. 08, 2003 table 1.1: shortest instruction execution time and f(x in ) changed ____________ figure 1.3: pin name changed from tx out to cntr 0 ____________ table 1.3: pin name changed from tx out to cntr 0 the value of hr1 register after reset changed the value of tc register after reset changed chapter ?. electrical characteristics?added 2 5 6 10 12 14 1.20 oct. 31, 2003 table 1.1: power consumption values added table 1.3: resistor value for cnvss and mode deleted register name of address 0050 16 modified from cmp2ic to cmp1ic, register name of address 005c 16 modified from cmp1ic to cmp0ic table 5.2: note 3 and note 4 deleted t samp in table 5.3 deleted figure 5.1 added table 5.10: vcc changed from ?.2 to 5.5v?to ?.3v to 5.5v? low-power on-chip oscillator changed from ?n 100khz?to ?25khz? x in =5mhz deleted and x in =10mhz added in high-speed mode and medium-speed mode, vc27=??added in stop mode measuring condition, data added and modified table 11 to table 15 added figure 5.2 added table 5.16: note 1, f (bclk) =5 mhz changed to 10 mhz table 5.17: low-power ring oscillator changed from ?n 100khz?to ?25khz? x in =5mhz deleted and x in =10mhz added in high-speed mode and medium-speed mode, vc27=??added in stop mode measuring condition, data added and modi- fied table 5.18 to table 5.22 added figure 5.3 added 2 6 11 14 15 17 19 20 21 22 23 24 25 1.30 dec 05, 2003 4 table 1.2 : ** deleted 15 table 5.4 revised 1.40 sep 30, 2004 all pages words standardized (on-chip oscillator, serial interface, a/d) 2 table 1.1 revised 5 figure 1.3, notes 3 added 6 table 1.3 revised 9 figure 3.1, notes added 10-13 one body sentence in chapter 4 added ; title of table 4.1 to 4.4 added 12 table 4.3 revised ; table 4.4 revised 14 table 5.2 revised 15 table 5.3 revised 16 table 5.4 revised ; table 16.5 revised 17 table 5.6, 5.7 adn 5.8 revised ; figure 5.3 revised 18 table 5.9 revised ; table 5.10 revised
revision history r8c/11 group datasheet rev. date description page summary a-2 1.40 sep 30, 2004 20 table 5.12 revised ; table 5.16 revised 22 table 16.17 revised 24 table 16.19 revised 1.50 apr.27.2005 4 table 1.2, figure 1.2 pa ckage name revised 5 figure 1.3 package name revised 10 table 4.1 revised 12 table 4.3 revised 15 table 5.3 partly revised 16 table 5.4 partly added 17 table 5.6, table 5.7 revised 18 table 5.9, table 10 partly revised 22 table 5.17 partly revised 26 package dimensions revised 1.60 jan.27.2006 2 t able 1.1 performance outline revised 3 figure 1.1 block diagram partly revised 4 1.4 product information, title of table 1.2 ?roduct list? ?roduct informaton?revised figure 1.2 type no., memory size, and package partly revised 6 table 1.3 pin description revised 7-8 2 central processing unit (cpu) revised figure 2.1 cpu register revised 10 table 4.1 sfr information(1) notes:1 revised 11 table 4.2 sfr information(2) notes:1 revised 12 table 4.3 sfr information(3); 0081 16 : ?rescaler y? ?rescaler y register 0082 16 : ?imer y secondary? ?imer y secondary register 0083 16 : ?imer y primary? ?imer y primary register 0085 16 : ?rescaler z? ?rescaler z register 0086 16 : ?imer z secondary? ?imer z secondary register 0087 16 : ?imer z primary? ?imer z primary register 008c 16 : ?rescaler x ?rescaler x register?revised notes:1, 2 revised 13 table 4.4 sfr information(4) notes:1 revised 14 table 5.2 recommended operating conditions; notes: 1, 2, 3 revised 15 table 5.3 a/d conversion characteristics; ?/d operation clock frequency? ?/d operating clock frequency?revised notes: 1, 2, 3, 4 revised 16 table 5.4 flash memory (program rom) electrical characteristics; ?opr? ?mbient temperature?revised measuring condition of byte program time and block erase time deleted 17 table 5.6 reset circuit electrical characteristics (when using hardware reset 2) notes: 3 revised 18 table 5.8 high-speed on-chip oscillator circuit electrical characteristics; ?igh-speed on-chip oscillator temperature dependence ?igh-speed on-chip oscillator frequency temperature dependence revised table 5.10 electrical characteristics (1) [v cc =5v]; ?1 0 to p1 7 except x out ? ?xcept p1 0 to p1 7 , x out ?revised
revision history r8c/11 group datasheet rev. date description page summary a-3 1.60 jan.27.2006 19 table 5.11 electrical characteristics (2) [v cc =5v] notes: 1, 2 revised measuring condition stop mode: topr = 25 ? 22 table 5.17 electrical characteristics (3) [v cc =3v] ?1 0 to p1 7 except x out ? ?xcept p1 0 to p1 7 , x out ?revised 23 table 5.18 electrical characteristics (4) [v cc =3v] notes: 1, 2 revised measuring condition stop mode: topr = 25 ?
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