AS8421 revision no. 0.3, date 2002-09-20 page 1 of 9 key features q internal voltage regulator q vbat monitor with fault vbat signal generation when vbat out of operative range q vdd monitor with intelligent reset generation based on vdd level q complete indipendent watchdog with autoenable by first trigger signal (tres) q precise standby mode management to prevent false commands and achieve very low standby current consumption: one sleep-strobe (external) and two wake-up-strobes (from bus interface and external) q standard lin bus interface q overtemperature monitor with fault t-signal generation (t sensor on chip) general description automotive distributed power supply management system with integrated bus interface applications most of automotive distributed module subsystem architectures with specific regards to: q door modules q seat modules q junction box functional description the chip integrates the basic group of functions for most of automotive distributed module system architectures as: regulated power supply from battery, reset, supply monitor, watchdog, standby management, bus inerface. voltage regulator: this block is designed for battery input to regulated voltage with maximum current allowed by thermal package limitation (worst case 20ma). higher current can be delivered using an external transistor. monitor: battery input is monitored and a fault signal fb becomes active when vbat is out of operative range. vdd is monitored and a vres (voltage controlled reset) is active when vdd is below a defined voltage threshold (an histeresysis is provided). watchdog: an internal low frequency oscillator is used to run the watchdog. the first trigger signal starts the watchdog timer. time-out signal tres (time controlled reset) is activated in a defined cycle sequence when the watchdog timer owerflows. time-out value may be changed by mask option. the divided internal clock is present at an output pad. standby: the standby circuit is a simple and strategic block which precisely controls the sleep and wakeup conditions of a microprocessor system. sleep signal typically comes from the microprocessor. in sleep mode the reset is activated and the regulated voltage is cut-off. all other i/o signals are configured for minimum current except external wakeup. in fact the wakeup condition can come from an external circuit but also from the bus interface when h/l or l/h transition are present on the bus. bus interface: it consists of one wire bus with seprate tx and rx signals. a thermal sensor is integrated mainly for protection purposes. the ft (fault temperature) output signal is present on a pad. the bus interface circuitry fulfils the lin standard. a ttp/a interface will be available soon. to guarantee a high flexibility and cost effective solution the protocol handler intenionally is not integrated on the chip. to simplify a system solution we also offer a double chip solution ? AS8421 plus c - in one package. AS8421 voltage regulator monitor with lin i/f preliminary data sheet AS8421 preliminary data sheet voltage regulator with lin i/f
AS8421 revision no. 0.3, date 2002-09-20 page 2 of 9 vbus tsel fb resn trig sleep bus tx rx vss AS8421 10 1 2 3 4 5 6 7 89 11 12 13 14 16 15 clko vbat wupextn vss vreg vdd figure 1 pinout of AS8421 fb vbat vdd vss vreg wdog & resn bus i/f tx rx vbat- vdd mon standby bus sleep rc osc clko vreg trig tsel wupextn t mon vbus tres vres figure 2 block diagram of AS8421 package information soic16 pin description, pin types s supply pad aio analog i/o di digital input di_pu digital input with pull-up di_pd digital input with pull-down dio digital i/o do digital ouput do_od digital output open drain pin name type note 1 vbus s battery voltage (diode protected) 2 bus aio bidirectional iso k line bus i/o 3 vdd s 5 v power supply 4 vss s power ground 5 rx do bus transmission output 6 tx di_pu bus transmission input 7 vss s power ground 8 tsel aio timer select, watchdog periode select by ext. reference resistor 9 fb do fault 10 resn do_o d reset - open drain 11 sleep di_pd sleep strobe to force sleep mode 12 trig di trigger input for watchdog 13 clko dio clock output signal 14 wupextn di_pu low active external wakup signal 15 vbat s battery voltage (diode protected) 16 vreg aio regulated supply ? if ext. transistor is not used, shorted to vdd table 1 pinlist of AS8421
AS8421 revision no. 0.3, date 2002-09-20 page 3 of 9 electrical parameters absolute maximum ratings (non operating) stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only. functional operation of the device at these or any other conditions beyond those indicated under ? operating conditions ? is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol min max unit note battery voltage vbat -0.3 20 v (1) 42 v for 400 ms bus supply voltage vbus -0.3 20 v (1) 42 v for 400 ms low power supply voltage vdd -0.3 7 v (1) input pin voltage v in -0.3 v vdd/v + 0.3 v input current (latchup immunity) i scr -100 100 ma norm: jedec 17 esd +/-1.0 kv norm: mil 883 e method 3015 total power dissipation (all supplies and outputs) p t 300 mw storage temperature t strg -55 125 c soldering conditions t lead 235 c norm: iec 61760-1 humidity non-condensing 5 85 % table 2 absolute maximum ratings note 1: value of these process dependent parameters to be taken from according process parameter document, current version operating conditions parameter symbol min max unit note battery supply voltage vbat 7 18 v (1) battery supply voltage vbus 7 18 v (1) 5v low power supply voltage vdd 4.75 5.25 v (2)+(3) voltage drop on ground potential vss-gnd -0.1 0.1 v ambient temperature tamb -45 85 c table 3 operating conditions note 1: load dump 42v note 2: recommended external capacitors 100nf note 3: 40 ma max. load, higher current with external transistor
AS8421 revision no. 0.3, date 2002-09-20 page 4 of 9 characteristics of analog and digital inputs and outputs operational parameters parameter symbol min max unit note under voltage vbat vfuv 7 7.9 v (1) over voltage vbat vfov 18.1 20 v (1) under voltage vdd vfuvdd 0.8 * vdd 0.9 * vdd v (1) over voltage vdd vfovdd 1.1 * vdd 1.2 * vdd v (1) watchdog signal pulse width twdres 10 40 s (2)+(3) active low watchdog time out period twdtrig 1.0 2.3 s (4) typ. 1.5sec temperature threshold warning tw c (5) typ. 140 c temperature threshold vreg toff 160 c(5) standby current idd 70 a (6) value of external reference resistor rref k ? 1 % typ. 22k ? frequency of rc oscillator frc khz onchip typ. 100khz reset active time after power on or wakeup tres1 200 ms (2) reset active time before power off tres2 1 ms (2) debounce time wupextn tdeb1 10 30 ms (2) debounce time sleep tdeb2 1.5 3 ms (2) table 4 analog signal parameters note 1: 250 mv hyteresis fb becomes active note 2: internal time base note 3: active low digital output triggered by watch dog overflow. note 4: digital input from controller within a time between 200 and 1000 ms note 5: hysteresis > 10 grd note 6: internal oscillator not running, vbat = 14 v, 25 c
AS8421 revision no. 0.3, date 2002-09-20 page 5 of 9 analog output signals parameter symbol min max unit note regulated output control voltage vreg vdd + 0.7 v table 5 analog signal parameters cmos input parameter symbol min max unit note high level input voltage v ih 0.7 * vdd v low level input voltage v il 0.3 * vdd v input leakage current i leak 1 a table 6 cmos input parameters cmos output parameter symbol min max unit note high level output voltage v oh vdd/v-0.5 v low level output voltage v ol vss/v+0.4 v capacitive load c l 50 pf table 7 cmos output parameters
AS8421 revision no. 0.3, date 2002-09-20 page 6 of 9 lin i/f the lin i/f comply with the lin standard and is able to wake up the whole circuit out of standby mode if any lin bus activity (low pegel) can be detected. failure code generator different failure states are reported by the AS8421 at fb signal. a circulating bitstream allows decoding of these failure stat es as shown below. failure # description circulating code 0 normal working 0000 0000 0000 0000 1 under voltage vbat 1111 0100 0000 1010 2 over voltage vbat 1111 0010 0000 1010 3 under voltage vdd 1111 0001 0000 1010 4 over voltage vdd 1111 0000 1000 1010 5 temperature warning 1111 0000 0100 1010 6 over temperature 1111 0000 0010 1010 hidden, ic switched off table 1: failure codes in case of more than one active failures failure code signals will be ? ored ? .
AS8421 revision no. 0.3, date 2002-09-20 page 7 of 9 application note vss controller + bus master other slave(s) vdd vss vdd 5v supplied component 5v supplied component s rref vbus tsel fb resn trig sleep bus tx rx vss AS8421 10 1 2 3 4 5 6 7 89 11 12 13 14 16 15 clko vbat wupext vss vreg vdd + vbat figure 3 AS8421 in a fully configuered controller driven system
AS8421 revision no. 0.3, date 2002-09-20 page 8 of 9 marking / package - production parts package type: soic16 eh 12 3 a a1 e b l d figure 4 soic16 package d e h a a1 e b l copl min max 10.10 10.50 7.40 7.60 10.00 10.65 2.35 2.65 0.1 0.30 1.27 0.33 0.51 0.40 1.27 0.10 0 8 table 1 package dimensions marking: yywwizz yy year ww week i plant identifier zz letters of free choice AS8421 10 1 2 3 4 5 6 7 89 11 12 13 14 16 15 yywwizz figure 5 package marking
AS8421 revision no. 0.3, date 2002-09-20 page 9 of 9 contact austriamicrosystems ag desiree herz a 8141 schloss premst ? tten, austria t. +43 (0) 3136 500 5818 f. +43 (0) 3136 500 5811 drive@austriamicrosystems.com copyright devices sold by austriamicrosystems are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life- support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems for each application. copyright ? 2002 austriamicrosystems. trademarks registered ? . all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. to the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct.
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