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  sip809c/sip810c vishay siliconix document number: 71999 s-41772?rev. b, 04-oct-04 www.vishay.com 1 microprocessor reset monitors features applications  tight reset voltage tolerances  1.5%  4 reset active timeout period options  low quiescent current:  3 a  6 reset threshold options from 2.63 v to 4.63 v  reset output guaranteed down to 1.0 v  no external components  v cc transient immunity  wide temperature range ? 40  c to + 85  c  computers  critical p/ c power supply monitoring  battery powered equipment description the sip809c/sip810c are system supervisor circuits designed to monitor v cc in digital systems and provide a reset signal to the host processor when necessary. no external components are required. when the processor power supply voltage drops below the reset threshold, the reset output is driven active, in less than 40 s (t d1 ). reset is maintained active for a time period (t d2 ), after the v cc rises above the threshold voltage. to prevent jitter, the reset threshold voltage has a built-in hysteresis of 0.4% of v th . the sip809c has an active-low reset output, while the sip810c has an active-high reset output. both devices have push/pull output drives. the reset signal is guaranteed valid, down to v cc = 1.0 v. low supply current of 3 a makes these devices well suited for battery powered applications. they are designed to reject fast transients from causing false resets. both devices are available in a space-saving sot-23 package. packaging and pin definition gnd reset output top view 2 3 sot-23 1 v cc see page 2 for ordering and marking information. typical application circuit reset gnd reset input gnd v cc v cc sip809c processor v cc
sip809c/sip810c vishay siliconix www.vishay.com 2 document number: 71999 s-41772?rev. b, 04-oct-04 ordering information reset timeout period default: 210 ms e: 150 ms d: 30 ms a: 1.5 ms reset active low reset active high reset voltage options l: 4.63 v m: 4.38 v j: 4.0 v t: 3.08 v s: 2.93 v 27: 2.7 v r: 2.63 v sip809c/sip810c please contact your local vishay semi conductor sales office for availability of other threshold voltage options. sip809c/sip810c x x eu dt tr1 tape/reel marking information?sip809c sip809creuadt dixxx sip809c27euadt dkxxx sip809cseuadt dlxxx sip809cteuadt dmxxx sip809cjeuadt dnxxx sip809cmeuadt doxxx sip809cleuadt dpxxx sip809creuddt dsxxx sip809c27euddt dtxxx sip809cseeuddt dvxxx sip809cteuddt dwxxx sip809cjeuddt dxxxx sip809cmeuddt dyxxx sip809cleuddt dzxxx sip809creuedt ebxxx sip809c27euedt ecxxx sip809cseuedt edxxx sip809cteuedt eexxx sip809cjeuedt egxxx sip809cmeuedt ehxxx sip809cleuedt eixxx sip809creudt elxxx sip809c27eudt emxxx sip809cseudt enxxx sip809cteudt eoxxx sip809cjeudt epxxx sip809cmeudt erxxx sip809ccleudt esxxx marking information?sip810c sip810creuadt evxxx sip810c27euadt ewxxx sip810cseuadt exxxx sip810cteuadt eyxxx sip810cjeuadt ezxxx sip810cmeuadt faxxx sip810cleuadt fbxxx sip810creuddt fdxxx sip810c27euddt fexxx sip810cseuddt fgxxx sip810cteuddt fhxxx sip810cjeuddt fixxx sip810cmeuddt fkxxx sip810cleuddt flxxx sip810creuedt fnxxx sip810c27euedt foxxx sip810cseuedt fpxxx sip810cteuedt frxxx sip810cjeuedt fsxxx sip810cmeuedt ftxxx sip810cleudt fvxxx sip810creudt fxxxx sip810c27eudt fyxxx sip810cseudt fzxxx sip810cteudt gaxxx sip810cjeudt gbxxx sip810cmeudt gcxxx sip810cleudt gdxxx
sip809c/sip810c vishay siliconix document number: 71999 s-41772?rev. b, 04-oct-04 www.vishay.com 3 absolute maximum ratings (t a = 25  c unless otherwise noted) parameter symbol limit unit supply voltage v cc 6.0 v reset/reset ? 0.3 to (v cc + 0.3) v input current i cc 20 ma output current, reset/reset 20 ma dv/dt 100 v/ s operating temperature range t a ? 40 to 85  c storage temperature range t stg ? 65 to 150  c power dissipation (t a  70  c) sot-23 (derate 4 mw/  c above 70  c) p d 260 mw specifications test conditions unless specified limits parameter symbol t a = 25  c min a typ b max a unit v cc range v range 1 5.5 v v cc range v range t a = ? 40  c to 85  c 1 5.5 v su pp l y current i cc v cc = 3.0 v 3.0 a supply current (reset not active) i cc v cc = 3.0 v, t a = ? 40  c to 85  c 5.0 a reset threshold v th v th(nom) ? 1.5% v th(nom) v th(nom) +1.5% v reset threshold v th t a = ? 40  c to 85  c v th(nom) ? 2.0% v th(nom) v th(nom) +2.0% v threshold hysteresis v th(hys) 0.4 %v th reset threshold temperature coefficient 30 ppm/  c reset output voltage low v ol t a = ? 40  c to 85  c, i sink = 1.2 ma sip809c?v cc  v th(min) sip810c?v cc  v th(max) 0.5 v reset output voltage high v oh t a = ? 40  c to 85  c, i source = 0.5 ma sip809c?v cc  v th(max) sip810c?v cc  v th(min) 0.8 v cc v v cc to reset delay t d1 v cc = v th ? 100 mv, t a = ? 40  c to 85  c 40 s reset t imeout period t d2 t a = ? 40  c to 85  c t d2(nom) ? 35% t d2(nom) t d2(nom) +35% ms notes a. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. b. typical values are for design aid only, not guaranteed or subject to production testing.
sip809c/sip810c vishay siliconix www.vishay.com 4 document number: 71999 s-41772?rev. b, 04-oct-04 typical characteristics (t a = 25  c unless otherwise noted) t d2 v th t d2 50% 50% 50% 50% v th t d1 t d1 v cc v cc reset reset these devices have a cer tain immunity to fast negative going transients. the graph titled ?transient rejection? shows the maximum allowable transient amplitude and duration to avoid triggering an unintended reset. as shown in the graph shor ter transients can have larger amplitudes without triggering resets. transient rejection transient amplitude transient duration ( s) reset time vs. t emperature temperature (  c) reset time (ms) 0.01 0.1 0 20 40 60 80 100 120 140 1 190 195 200 205 215 220 40 ? 20 ? 50 100 210 sip809creu 10 70 130
sip809c/sip810c vishay siliconix document number: 71999 s-41772?rev. b, 04-oct-04 www.vishay.com 5 typical characteristics (t a = 25  c unless otherwise noted) reset v th vs. t emperature temperature (  c) reset v th (v) i cc vs. t emperature temperature (  c) supply current @ 5 v ( a) i cc ( a) i cc vs. v cc v cc (v) t d1 delay ( s) t d1 delay vs. t emperature temperature (  c) hysteresis (% of v th ) reset v ol @ 0.8 ma (v) reset v ol vs. t emperature threshold hysteresis vs. t emperature temperature (  c) temperature (  c) 2.10 2.15 2.20 2.25 2.30 2.35 40 ? 20 ? 50 100 10 70 130 2.630 2.632 2.634 2.636 2.638 2.640 2.642 2.644 2.646 2.648 2.650 40 ? 20 ? 50 100 10 70 130 0 0.4 0.8 1.6 2 1.2 85  c 40  c 0  c 37 38 39 40 42 43 41 3 1 05 24 20 ? 20 ? 40 60 0 40 80 100 0 0.1 0.2 0.4 0.5 0.3 20 ? 20 ? 40 60 0 40 80 100 0.220 0.225 0.230 0.235 0.240 0.245 0.250 0.255 0.260 0.265 40 ? 20 ? 50 100 10 70 130 sip809creu sip809creu sip809creu


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