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compact , 600 ma, 3 mhz, step - down dc - to - dc converter data sheet adp2108 rev. g information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. te l: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2008 C 2012 analog devices, inc. all rights reserved. features peak e fficiency : 95% 3 mhz fixed frequency operation typical quiescent current : 1 8 a maximum load current : 6 00 ma input voltage : 2.3 v to 5.5 v uses tiny multilayer inductors and capacitors current mode architecture for fast load and line transient r esponse 100% duty cycle l ow dropout mode internal synchronous rectifier internal compensation internal soft start current overload protection t hermal shutdown protection s hutdown s upply current : 0.2 a available in 5 - ball wlcsp 5 - lead tsot supported by adisimpower ? design tool applications pdas and palmtop computers wireless handsets digital audio, port able media players digital cameras, gps navigation units general description the adp2108 is a high efficiency, low quiescent current step - down dc - to - dc converter manufactured in two different packages. the total solution requires only three tiny external components. it uses a propr ietary , high speed current mode, constant frequency pwm control scheme for excellent stability and transient response. to ensure the longest battery life in portable applications, the adp2108 has a power save mode that reduces the switching frequency under light load conditions. the adp2108 runs on input voltages of 2.3 v to 5.5 v , which allow s for single lithium or lithium polymer cell, multiple a lkaline or nimh cell, pcmcia, usb, and other standard power sources. the maximum load current of 6 00 ma is achievable across the input voltage range. the adp2108 is available in fixed output voltages of 3.3 v , 3.0 v, 2 .5 v, 2 .3 v, 1.82 v , 1. 8 v, 1 . 5 v, 1. 3 v, 1. 2 v , 1.1 v, and 1.0 v. all versions include an internal power switch and synchronous rect - ifier for minimal external part count and high efficiency. the adp2108 has an internal soft start and is internally compensated. during logic controlled shutdown, the input is disconnected from the ou tput and the adp2108 draws less than 1 a from the input source. other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input current over - shoot at startup. the adp2108 is available in 5 - ball wlcsp and 5 - lead tsot packages. the adp2109 provides the same features and operations as the adp2108 and has the additional function of a discharge switch in the wlcsp package. typical applications circuit figure 1. 1.0v to 3.3v 10 f 1h on off gnd 4.7 f 07375-003 vin sw fb en 2.3v to 5.5v adp2108
adp2108 data sheet rev. g | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 typical applications circuit ............................................................ 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 11 control scheme .......................................................................... 11 pwm mode ................................................................................. 11 power save mode ........................................................................ 11 enable/shutdown ....................................................................... 11 short - circuit protection ............................................................ 12 undervoltage lockout ............................................................... 12 thermal protection .................................................................... 12 soft start ...................................................................................... 12 current limit .............................................................................. 12 100% duty oper ation ................................................................ 12 applications information .............................................................. 13 adisimpower design tool ....................................................... 13 external component selection ................................................ 13 thermal considerations ............................................................ 14 pcb layout gui delines .............................................................. 14 evaluation board ............................................................................ 15 outline dimensions ....................................................................... 16 ordering g uide .......................................................................... 17 revision history 6 /1 2 rev. f to rev. g change to features section ............................................................. 1 added adisimpower design tool section ................................. 13 updated outline dimensions ....................................................... 16 1/12 rev. e to rev. f change to table 3 ................................................................................... 4 changes to output capacitor section ......................................... 13 10/10 rev. d to rev. e changed ? 40 c to + 85 c to ? 40 c to + 125 c throughout ......... 3 changes to ordering guide .......................................................... 17 1/10 rev. c to rev. d changes to ordering gui de .......................................................... 17 4/09 rev. b to rev. c changes to general description section ...................................... 1 2/09 rev. a to rev. b added 5 - lead tsot package ........................................... universal changes to absolute maximum ratings section ......................... 4 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 17 11/08 rev. 0 to rev. a changes to figure 4 .......................................................................... 6 updated outline dimensions ....................................................... 16 9 /0 8 rev ision 0 : initial version
data sheet adp2108 rev. g | page 3 of 20 specifications v in = 3.6 v, v out = 1.8 v, t j = ?40c to +125c for minimum/maximum specifications , and t a = 25c for typical specifications, unless otherwise noted. 1 table 1 . parameter test conditions /comments min typ max unit input characteristics input voltage range 2.3 5.5 v undervoltage lockout threshold v in rising 2.3 v v in falling 2.05 2.15 2.25 v output characteristics output voltage accuracy pwm mode ? 2 +2 % v in = 2.3 v to 5.5 v, pwm mode ? 2.5 +2.5 % power save mode to pwm current threshold 85 ma pwm to power save mode current threshold 80 ma input current characteristics dc operating current i load = 0 ma, device not switching 18 30 a shutdown current en = 0 v , t a = t j = ? 40c to +12 5c 0.2 1.0 a sw characteristics sw on resistance (wlcsp) pfet 320 m nfet 300 m sw on resistance (tsot) pfet 380 m nfet 260 m current limit pfet s witch peak current limit 1100 1300 1500 ma enable characteristics en input high threshold 1.2 v en input low threshold 0.4 v en input leakage current en = 0 v, 3.6 v ? 1 0 +1 a oscillator frequency i load = 200 ma 2.5 3.0 3.5 mhz start - up time 5 5 0 s thermal characteristics thermal shutdown threshold 150 c thermal shutdown hysteresis 20 c 1 all limits at temperature extremes are guaranteed via correlation using standard statistical quality control (sqc).
adp2108 data sheet rev. g | page 4 of 20 absolute maximum ratings table 2. parameter rating vin, en ?0.4 v to +6.5 v fb, sw to gnd ?1.0 v to (v in + 0.2 v) operating ambient temperature range ?40c to +125c operating junction temperature range ?40c to +125c storage temperature range ?65c to +150c lead temperature range ?65c to +150c soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c esd human body model 1500 v esd charged device model 500 v esd machine model 100 v stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. unless otherwise specified, all other voltages are referenced to gnd. the adp2108 can be damaged when the junction temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j is within the specified temperature limits. in applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation (p d ) of the device, and the junction-to- ambient thermal resistance of the package ( ja ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + (p d ja ). thermal resistance ja is specified for a device mounted on a jedec 2s2p pcb. table 3. thermal resistance package type ja unit 5-ball wlcsp 105 c/w 5-lead tsot 170 c/w esd caution
data sheet adp2108 rev. g | page 5 of 20 pin configuration and fu nction descriptions figure 2. wlcsp pin configuration table 4. wlcsp pin function descriptions pin no. mnemonic description a1 vin power source input. vin is the source of the pfet high -side switch. bypass vin to gnd with a 2.2 f or greater capacitor as close to the adp2108 as possible. a2 gnd ground. connect all the inp ut and output capacitors to gnd. b sw switch node output. sw is the drain of the pfet switch and nfet synchronous rectifier. c1 en enable input. drive en high to turn on the adp2108. driv e en low to turn it off and reduce the input current to 0.2 a. c2 fb feedback input of the error amplifier. conne ct fb to the output of the switching regulator. figure 3. tsot pin configuration table 5. tsot pin function descriptions pin no. mnemonic description 1 vin power source input. vin is the source of the pfet high -side switch. bypass vin to gnd with a 2.2 f or greater capacitor as close to the adp2108 as possible. 2 gnd ground. connect all the input and output capacitors to gnd. 3 en enable input. drive en high to turn on the adp2108. drive en low to turn it off and reduce the input current to 0.1 a. 4 fb feedback input of the error amplifier. connect fb to the output of the switching regulator. 5 sw switch node output. sw is the drain of the pfet switch and nfet synchronous rectifier. vin gnd sw en fb top view (ball side down) not to scale 07375-002 1 a b c 2 ball a 1 indicator adp2108 top view (not to scale) 1 vin 2 gnd 3 en 5 sw 4 fb 07375-040
adp2108 data sheet rev. g | page 6 of 20 typical performance characteristics v in = 3.6 v, t a = 25c, v en = v in , unless otherwise noted. figure 4. quiescent supply current vs. input voltage figure 5. switching frequency vs. input voltage figure 6. output vo ltage vs. temperature figure 7. pmos current limit vs. input voltage figure 8. mode transition across temperature figure 9. mode transition 12 14 16 18 20 22 24 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 7375-014 input voltage (v) quiescent current (a) ?40c +25c +85c 2500 2600 2700 2800 2900 3000 3100 3200 3300 3400 3500 2.3 2.8 3.3 3.8 4.3 4.8 5.3 07375-015 input voltage (v) frequency (khz) ?40c +25c +85c 1.795 1.800 1.805 1.810 1.815 1.820 1.825 1.830 1.835 1.840 ?45 ?25 ?5 15 35 55 75 07375-016 temperature (c) output voltage (v) i out = 10ma i out = 150ma i out = 500ma 600 700 800 900 1000 1100 1200 1300 1400 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 07375-017 input voltage (v) current limit (ma) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 ?40c 07375-018 input voltage (v) output current (a) 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11 0.12 0.13 0.14 0.15 +85c pwm to psm psm to pwm 2.53.03.54.04.55.05.5 0 7375-019 input voltage (v) output current (a) 0.06 0.07 0.08 0.09 0.10 0.11 0.12 0.13 0.14 0.15 pwm to psm psm to pwm
data sheet adp2108 rev. g | page 7 of 20 figure 10 . load regulation , v out = 1.8 v figure 11 . load regulation , v out = 1.0 v figure 12 . load regulation , v out = 3.3 v figure 13 . efficiency , v out = 1.8 v figure 14 . efficiency , v out = 1.0 v figure 15 . efficiency , v out = 3.3 v 0 0.1 0.2 0.3 0.4 0.5 0.6 07375-020 output current (a) output voltage (v) 1.775 1.785 1.795 1.805 1.815 1.825 v in = 2.7v v in = 3.6v v in = 4.5v v in = 5.5v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.990 0.995 1.000 1.005 1.010 1.015 1.020 1.025 07375-021 output current (a) output voltage (v) 0.985 v in = 2.7v v in = 3.6v v in = 4.5v v in = 5.5v 0 0.1 0.2 0.3 0.4 0.5 0.6 07375-022 output current (a) output voltage (v) 3.2175 3.2375 3.2575 3.2775 3.2975 3.3175 3.3375 3.3575 3.3775 v in = 3.6v v in = 4.5v v in = 5.5v 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 07375-023 output current (a) efficiency (%) v in = 2.7v v in = 3.6v v in = 4.5v v in = 5.5v 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 07375-024 output current (a) efficiency (%) v in = 2.7v v in = 3.6v v in = 4.5v v in = 5.5v 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 07375-025 output current (a) efficiency (%) v in = 3.6v v in = 4.5v v in = 5.5v
adp2108 data sheet rev. g | page 8 of 20 figure 16 . line transient, v out = 1.8 v, power save mode , 2 0 ma figure 17 . line transient , v out = 1.8 v, pwm , 20 0 ma figure 18 . li ne transient, v out = 1.0 v , pwm , 200 ma figure 19 . line transient , v out = 3.3 v , pwm, 200 ma figure 20 . load transient , v out = 1.8 v, 300 ma to 600 ma figure 21 . load transien t, v out = 1.8 v, 50 ma to 300 ma 07375-026 ch1 50mv ch4 2v ch3 1v m 40 s a ch3 3.26v 1 4 3 t 10.80% v in sw v out 07375-027 ch1 20mv ch4 2v ch3 1v m 40 s a ch3 3.26v 1 4 3 t 10.80% v in sw v out 07375-028 ch1 50mv ch4 2v ch3 1v m 40 s a ch3 3.26v 1 4 3 t 10.80% v in sw v out 07375-029 ch1 50mv ch4 2v ch3 1v m 40 s a ch3 4.4v 1 4 3 t 10.80% v in sw v out 07375-030 ch1 50mv ch2 200m a ? ch4 2v m 40 s a ch2 36ma 1 2 4 t 19.80% sw v out i out 07375-031 ch1 50mv ch2 250m a ch4 2v m 40 s a ch2 5m a 2 1 4 t 25.4% sw v out i out
data sheet adp2108 rev. g | page 9 of 20 figure 22 . load transient , v out = 1.8 v, 5 ma to 50 ma figure 23 . start - u p , v out = 1.8 v, 400 ma figure 24 . start - u p , v out = 1.8 v, 5 ma figure 25 . start - u p , v out = 1.0 v, 600 ma figure 26 . start - u p , v out = 3.3 v, 150 ma figure 27 . typical power s ave mode waveform , 50 ma 07375-032 ch1 50mv ch2 50m a ? ch4 2v m 40 s a ch2 12m a 2 1 4 t 25.4% sw v out i out 07375-033 ch1 1v ch4 5v ch2 250ma ch3 5v m 40 s a ch3 2v 1 3 4 2 t 10.80% sw i l v out en 07375-034 ch1 1v ch4 5v ch2 250ma ch3 5v m 40 s a ch3 2v 1 2 4 3 t 10.80% sw i l v out en 07375-035 ch1 500mv ch4 5v ch2 500ma ch3 5v m 40 s a ch3 2.1v 3 1 2 4 t 19.80% sw i l v out en 07375-036 ch1 2v ch4 5v ch2 250ma ch3 5v m 40 s a ch3 2v 1 3 4 2 t 10.80% sw i l v out en 07375-037 ch1 50mv ch2 500ma ch4 2v m 2 s a ch4 2.64ma 1 2 4 t 20% v out i l sw
adp2108 data sheet rev. g | page 10 of 20 figure 28 . typical pwm waveform, 200 ma 07375-038 ch1 20mv ch2 200ma ch4 2v m 200ns a ch4 2.64v 1 2 4 t 20% v out i l sw
data sheet adp2108 rev. g | page 11 of 20 theory of operation figure 29 . functional block diagram the adp2108 is a step - down dc - to - dc converter that uses a fixed frequency and high speed current mode architecture. the high switching frequency allow s for a small step - down , dc - to - dc converter solution. the adp2108 operate s with an input voltage of 2.3 v to 5.5 v and regula te s an output voltage down to 1.0 v. control scheme the adp2108 operates with a fixed frequency, current mode pwm control architecture at medium to high loads for high efficiency, but shifts to a power save mode control scheme at light loads to lower the reg ulation power losses. when operating in fixed frequency pwm mode, the duty cycle of the in tegrated switches is adjusted and regulate s the outpu t voltage. when operating in power save mode at light loads, the output voltage is controlled in a hysteretic man ner, with higher v out ripple. during part of this time , the converter is able to stop switching and enters an idle mode, which improves conversion efficiency. pwm m ode in pwm mode, the adp2108 operates at a fixed frequency of 3 mhz, set by an internal osci llator. at the start of each oscillator cycle, the pfet switch is turned on, send ing a positive voltage across the inductor. current in the inductor increases until the current sense signal crosses the peak inductor current threshold that turns off the pfet switch and turns on the nfet synchronous rectifier. this sends a negative voltage across the inductor, causing the inductor current to decrease. the synchronous rectifier stays on for the rest of the cycle. the adp2108 regulates the output voltage by adjusting the peak inductor current threshold. power s ave mode the adp210 8 smoothly transitions to the power save mode of operation when the loa d current decreases below the power save mode cu rrent threshold. when the adp2108 enters power save mode , an off set is induced in the pwm regulation level , which makes the output voltage rise. when the output voltage reache s a level approximately 1.5% above the pwm regulation level , pwm operation is turned off. at this point, both power switches are off, and the adp 2108 enters an idle mode. c out discharges until v out falls to the pwm regulation voltage, at which point the device drive s the inductor to make v out rise again to the upper threshold. this process is repeat ed while the load current is below the power save mode current threshold. power save mode c urrent t hreshold the power save mode curr ent threshold is set to 8 0 ma. the adp2108 employs a scheme that enables this current to remain accurately controlled, independent of v in and v out levels. this scheme also e nsures that there is very little hysteresis between the power save mode current thresho ld for entry to and exit from the power save mode . the power save mode current threshold is optimized for excellent efficiency over all load currents. e nable /s hutdown the adp2108 starts operation with soft start when the en pin is toggled from logic low to logic high. pulling the en pin low forces the device into shutdown mode, reducing the shutdown current below 1 a . gnd fb vin sw en adp2108 07375-001 soft start undervoltage lockout oscillator thermal shutdown driver and antishoot- through psm comp low current pwm comp i limit gm error amp pwm/ psm control
adp2108 data sheet rev. g | page 12 of 20 short - circuit protection the adp2108 includes frequency fold back to prevent output current runaway on a hard short. when the voltage at the feedback pin falls below half the target output voltage, indicat - ing the possibility of a hard short at the output, the switc hing frequency is reduced to half the internal oscillator frequency. the reduction in the switching frequency allow s more time for the inductor to discharge, preventing a runaway of output current. u ndervoltage l ockout to protect against battery discharge, undervoltage lockout (uvlo) circuitry is integrated on the adp2108. if the input voltage drops below the 2.15 v uvlo threshold, the adp2108 shut s down, and both the power switch and the synchronous rectifier turn off. when the voltage rises above the uvlo thre sh - old, the soft start p eriod is initiated, and the part is enabled. t hermal protection i n the event th at th e adp2108 junction temperature rise s above 150c, the thermal shutdown circuit turns off the converter. extreme junction temperatures can be the result of high current ope ration, poor circuit board design, or high ambient temperature. a 2 0 c hysteresis is included so that when thermal shutdown occurs, the adp2108 do es not return to operation until the on - chip temperature drops below 13 0c. when coming out of thermal shutdown, soft start is initiated. s oft s tart the adp2108 has an internal soft start function that ramps the output voltage in a controlled manner upon startup, there by limiting the inrush current. this prevents possible input voltage drops when a battery or a high impedance power source is connected to the input of the converter. after the en pin is driven high , internal circuits start to power up . the time require d to settle after the en pin is driven high is called the power - up time. after the internal circuits are powered up , the soft start ramp is initiated and the output capacitor is charged linearly until the output voltage is in regulation. the time required for the output voltage to ramp is called the soft start time. start - up time in the adp2108 is the measure of when the output is in regulation after the en pin is driven high. start - up time consists of the power - up time and the soft start time. current limit the adp2108 has protection circuitry to limit the a mount of positive current flow ing through the pfet switch and the synchronous rectifier. the positive current limit on the power switch limits the amount of current that can fl ow from the input to the output . t he negative current limit prevents the inductor current from reversing direc tion and flowing out of the load. 100% duty o peration with a drop in v in or with an increase in i load , the adp2108 reach es a limit where, even with the pfet switch on 100% of the time, v out drop s bel ow the desired output voltage. at this limit, the adp2108 smoothly transition s to a mode where the pfet switch stays on 100% of the time. when the input conditions change again and the required duty cycle fa lls, the adp2108 immediately re start s pwm regulation without allowing over - shoot on v out .
data sheet adp2108 rev. g | page 13 of 20 applications information adi sim p ower design tool the adp21 0 8 is supported by adisimpower design tool set. adisimpower is a collection of tools that produce complete power designs optimized for a specific design goal. the tools enable the user to generate a full schematic, bill of materials, and calculate performance in minutes. adisimpower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the ic and all real external components. for more information about adisimpower design tools, refer to www.analog.com/adisimpower . the tool set is available from this website, and users can also request an unpopulated board th rough the tool. external component s election trade - offs between performance parameters such as efficiency and transient response can be made by varying the choice of external components in the applications circuit , as shown i n figure 1 . inductor the h igh switching frequency of the adp2108 allows for the selection of small chip inductors. for best performance, us e i nductor values between 0.7 h and 3 h. recommen ded ind uctors are shown in table 6 . the peak - to - peak inductor current ripple is calculated using the following equation : l f v v v v i sw in out in out ripple ? = ) ( where : f sw is the switching frequency. l is the inductor value. the minimum dc current rating of the inductor must be greater than the inductor peak current . the inductor peak current i s calculated using the following equation: 2 ) ( ripple max load peak i i i + = inductor conduction losses are caused by the flow of current through the inductor, which has an associated internal dcr. larger sized inductors have smaller dcr, which may decrease inductor conduction losses. inductor core losses are related to the magneti c permeability of the core material. because the adp2108 is a high switching frequency dc - to - dc converter, shielded ferrite core material is recommended for its low core losses and low emi. table 6 . suggested 1.0 h inductors ve ndor model dimensions i sat (ma) dcr (m) murata lqm21pn1r0m 2.0 1.25 0.5 800 190 murata lqm31pn1r0m 3.2 1.6 0.8 5 1200 120 murata lqm2hpn1r0m 2.5 2.0 1.1 1500 90 coilcraft lps3010 - 102 3.0 3.0 0.9 1700 85 toko mdt2520 - cn 2.5 2 .0 1.2 1800 100 tdk cpl2512t 2.5 1.5 1.2 1500 100 output capacitor higher output capacitor values reduce the output voltage ripple and improve load transient response. when choosing this value , it is also important to account for the loss of capacitance due to output voltage dc bias. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. capacitors must have a dielect ric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended for best performance. y5v and z5u dielectrics are not recommended for use with any dc - to - dc converter because of their poor temperature and dc bias characteristics. t he worst - case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage is calcu - l ated using the following equation : c eff = c out (1 ? tempco ) (1 ? tol ) where : c eff is the effective capacitance at the operating voltage . tempco is the worst - case capacitor temperature coefficient . tol is the worst - case component tolerance. in this example, the worst - case temperature coef ficient (tempco) over ? 40c to + 12 5c is assumed to be 15% for an x5r dielectric. the tolerance of the capacitor (tol ) is assumed to be 10% , and c out is 9.2 f at 1.8 v , as shown in figure 30. substituting these values in the equation yields c eff = 9.2 f (1 ? 0.15) (1 ? 0.1) = 7.0 f to guarantee the performance of the adp2108, it is imperative that the effects of dc bias, te mperature, and tolerances on t he behavior of the capacitors b e evaluated for each application.
adp2108 data sheet rev. g | page 14 of 20 figure 30 . typical capacitor performance the peak - to - peak output voltage ripple for the selected output capacitor and inductor values is calculat ed using the following equation : ( ) out sw in out sw ripple ripple c l f v c f i v = 2 2 8 capacitors with lower equivalent series resistance (esr) are preferred t o guarantee low output voltage ripple , as shown in the following equation : ripple ripple cout i v esr the effective capac itance needed for stability, which includes temperature and dc bias effects, i s 7 f. table 7 . suggested 10 f capacitors vendor tpe odel case sie voltage rating v murata x5r grm188r60j106 0603 6.3 taiyo yuden x5r jmk107bj106 0603 6.3 tdk x5r c1608jb0j106k 0603 6.3 i nput capacitor higher value input capacitors help to reduce the input voltage ripple and improve transient response. maximum input capacitor current is calculated using the following equation : in out in out max load cin v v v v i i ) ( ) ( ? to minimize s upply noise , place the input capacitor as close to the vin pin of the adp2108 as possible. as with the output capacitor, a low esr capacitor is recommended. the list of recommended capacitors is shown in table 8 . table 8 . suggested 4.7 f capacitors vendor tpe odel case sie voltage rating v murata x5r grm188r60j475 0603 6.3 taiyo yuden x5r jmk107bj475 0603 6.3 tdk x5r c1608x5r0j475 0603 6.3 thermal c onsiderations because of t he high efficiency of the adp2108, only a small amount of power is dissipated inside the adp2108 package , which reduces thermal constraints. however, in applications with maximum loads at high ambient temperature, low supply voltage, and high duty cycle, the heat dissipated in the package is great enough that it may cause the junction temperature of the die to exceed the maximum junction temper ature of 125c. if the junction temperature exceeds 150c, the converter goes into thermal shutdown. it recovers when the junction temperature falls below 130c. the junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as shown in the following equation : t j = t a + t r where : t j is the junction temperature. t a is the ambient temperature . t r is the rise in temperature of the package due to power dissipation. the rise in temperature of the package is directly proportional to the power dissipation in the package. the proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation : t r = ja p d where : t r is the rise in temperature of the package . ja is the thermal resistance from the junction of the die to the ambient tem perature of the package . p d is the power dissipation in the package. pcb layout guideline s poor layout can affect adp2108 performance , causing electro - magnetic interference (emi) and elect romagnetic compatibility (emc) problems , ground bounce , and voltage losses. poor layout can also affect regulation and stability. a good layout is implemented using the following rules: ? place the inductor, input capacitor , and output capacitor close to the ic using short tracks. these components carry high switching frequencies , and large tracks act as antennas. ? route the output voltage path away from the inductor and sw node to minimize n oise and magnetic interference. ? maximi z e the size of ground metal on the component side to help with thermal dissipation . ? use a ground plane with several vias connecting to the com - ponent side ground to further reduce noise interference on sensitive circuit nodes. 0 2 4 6 8 10 12 0 1 2 3 4 5 6 07375-007 dc bias voltage (v) capacitance ( f)
data sheet adp2108 rev. g | page 15 of 20 evaluation board figure 31 . evaluation board schematic figure 32 . recommended wlcsp top layer figure 33 . recommended wlcsp bottom layer figure 34 . recommended tsot top layer figure 35 . recommended tsot bottom layer v out gnd out v out adp2108 tb3 tb4 c out 10 f l1 1h u1 1 b c2 a1 v in c1 a2 gnd 2 c in 4.7 f 07375-004 v in en en vin sw fb en tb1 tb2 gnd in tb5 07375-005 07375-006 07375-041 07375-042
adp2108 data sheet rev. g | page 16 of 20 outline dimensions figure 36 . 5- ball wafer level chip scale package [wlcsp] (cb - 5 - 3) dimensions shown in millimeters figure 37 . 5 - lead thin small outline transistor package [tsot] (uj - 5) dimensions shown in millimeters 06- 1 1-2012-b a b c 0.657 0.602 0.546 0.355 0.330 0.304 0.280 0.250 0.220 1.060 1.020 0.980 1.490 1.450 1.410 1 2 bot t om view (bal l side up) t op view (bal l side down) side view 0.330 0.310 0.290 0.866 ref bal l a1 identifier sea ting plane 0.50 bsc coplanarity 0.04 0.50 bsc 100708-a * compliant to jedec standards mo-193-ab with the exception of package height and thickness. 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max * 1.00 max * 0.90 max 0.70 min 2.90 bsc 5 4 1 2 3 sea ting plane
data sheet adp2108 rev. g | page 17 of 20 ordering guide model 1 temperature range output voltage (v) package description package option branding adp2108acbz - 1.0 -r7 ? 40c to + 12 5c 1.0 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 la6 adp2108acbz - 1.1 -r7 ?40c to +125c 1.1 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 la7 adp2108acbz - 1.2 -r7 ?40c to +125c 1.2 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 la8 adp2108acbz - 1.3 -r7 ?40c to +125c 1.3 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 la9 adp2108acbz - 1.5 -r7 ?40c to +125c 1.5 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 laa adp2108acbz - 1.8 -r7 ?40c to +125c 1.8 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 lad adp2108acbz - 1.82 - r7 ?40c to +125c 1.82 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 lae adp2108acbz - 2.3 -r7 ?40c to +125c 2.3 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 laf adp2108acbz - 2.5 -r7 ?40c to +125c 2.5 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 lag adp2108acbz - 3.0 - r7 ?40c to +125c 3.0 5 - ball wafer level chip scale package [wlcsp] cb - 5 - 3 ld9 adp2108acbz - 3.3 -r7 ?40c to +125c 3.3 5 - ball wafer level chip scale package [wlcsp] cb -5 -3 lah adp2108aujz - 1.0 -r7 ?40c to +125c 1.0 5 - lead small outline package [tsot] uj -5 la6 adp2108aujz - 1.1 -r7 ?40c to +125c 1.1 5 - lead small outline package [tsot] uj -5 la7 adp2108aujz - 1.2 -r7 ?40c to +125c 1.2 5 - lead small outline package [tsot] uj -5 la8 adp2108aujz - 1.3 -r7 ?40c to +125c 1.3 5 - lead small outline package [tsot] uj -5 la9 adp2108aujz - 1.5 -r7 ?40c to +125c 1.5 5 - lead small outline package [tsot] uj -5 laa adp2108aujz - 1.8 -r7 ?40c to +125c 1.8 5 - lead small outline package [tsot] uj -5 lad adp2108aujz - 1.82 - r7 ?40c to +125c 1.82 5 - lead small outline package [tsot] uj -5 lae adp2108aujz - 2.3 -r7 ?40c to +125c 2.3 5 - lead small outline package [tsot] uj -5 laf adp2108aujz - 2.5 -r7 ?40c to +125c 2.5 5 - lead small outline package [tsot] uj -5 lag adp2108aujz - 3.0 -r7 ?40c to +125c 3.0 5 - lead small outline package [tsot] uj -5 ld9 adp2108aujz - 3.3 -r7 ?40c to +125c 3.3 5 - lead small outline package [tsot] uj -5 lah adp2108 - 1.0- evalz 1.0 evaluation board for 1.0 v [wlcsp] adp2108 - 1.1- evalz 1.1 evaluation board for 1.1 v [wlcsp] adp2108 - 1.2- evalz 1.2 evaluation board for 1.2 v [wlcsp] adp2108 - 1.3- evalz 1.3 evaluation board for 1.3 v [wlcsp] adp2108 - 1.5 - evalz 1.5 evaluation board for 1.5 v [wlcsp] adp2108 - 1.8- evalz 1.8 evaluation board for 1.8 v [wlcsp] adp2108 - 1.82 - evalz 1.82 evaluation board for 1.82 v [wlcsp] adp2108 - 2.3- evalz 2.3 evaluation board for 2.3 v [wlcsp] adp2108 - 2.5- evalz 2.5 evaluation board for 2.5 v [wlcsp] adp2108 - 3.0- evalz 3.0 evaluation board for 3.0 v [wlcsp] adp2108 - 3.3- evalz 3.3 evaluation board for 3.3 v [wlcsp] adp2108ujz - redykit evaluation board for fixed output voltage, 1.2 v and 3.3 v [ tsot ] 1 z = rohs compliant part .
adp2108 data sheet rev. g | page 18 of 20 notes
data sheet adp2108 rev. g | page 19 of 20 notes
adp2108 data sheet rev. g | page 20 of 20 notes ?2008C2012 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07375-0-6/12(g)

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