842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 1 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary g eneral d escription the ics842023i is an ethernet clock generator and a member of the hiperclocks tm family of high performance devices from ics. for ethernet applications, a 25mhz crystal is used to generate 250mhz. the ics842023i uses ics? 3rd generation low phase noise vco tech- nology and can achieve <1ps rms phase jitter, easily meeting ethernet jitter requirements. the ics842023i is packaged in a small 8-pin tssop, making it ideal for use in systems with limited board space. f eatures ? (1) differential hstl output ? crystal oscillator interface, 18pf parallel resonant crystal (24.5mhz - 34mhz) ? output frequency range: 245mhz - 340mhz ? vco range: 490mhz - 680mhz ? rms phase jitter @ 250mhz, using a 25mhz crystal (1.875hz - 20mhz): 0.33ps (typical) ? 3.3v or 2.5v operating supply ? -40c to 85c ambient operating temperature hiperclocks? ics ics842023i 8-lead tssop 4.40mm x 3.0mm x 0.925mm package body g package top view v dda gnd xtal_out xtal_in 1 2 3 4 v dd q0 nq0 oe 8 7 6 5 b lock d iagram osc phase detector vco 490mhz - 680mhz m = 20 (fixed) n = 2 (fixed) xtal_in xtal_out q0 nq0 c ommon c onfiguration t able - 1 gb e thernet p in a ssignment oe s t u p n i y c n e u q e r f t u p t u o ) z h m ( ) z h m ( y c n e u q e r f l a t s y r cmn n o i t a c i l p i t l u m n / m e u l a v 5 20 22 0 10 5 2 pullup the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specific ations without notice.
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 2 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary t able 2. p in c haracteristics t able 1. p in d escriptions r e b m u ne m a ne p y tn o i t p i r c s e d 1v a d d r e w o p. n i p y l p p u s g o l a n a 2d n gr e w o p. d n u o r g y l p p u s r e w o p 4 , 3 , t u o _ l a t x n i _ l a t x t u p n i , t u p n i e h t s i n i _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c . t u p t u o e h t s i t u o _ l a t x 5e ot u p n ip u l l u p . e v i t c a s i t u p t u o 0 q n / 0 q , h g i h n e h w . n i p e l b a n e t u p t u o . e t a t s e c n a d e p m i h g i h a n i s i t u p t u o 0 q n / 0 q e h t , w o l n e h w . s l e v e l e c a f r e t n i l t t v l / s o m c v l 7 , 60 q , 0 q nt u p t u o. s l e v e l e c a f r e t n i l t s h . s t u p t u o k c o l c l a i t n e r e f f i d 8v d d r e w o p. n i p y l p p u s e r o c : e t o n p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 3 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5v outputs, i o continuous current 50ma surge current 100ma package thermal impedance, ja 101.7c/w (0 mps) storage temperature, t stg -65c to 150c t able 3a. p ower s upply dc c haracteristics , v dd = v dda = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v i d d t n e r r u c y l p p u s r e w o p d b ta m i a d d t n e r r u c y l p p u s g o l a n a d b ta m t able 3c. lvcmos/lvttl dc c haracteristics , v dd = v dda = 3.3v5% or 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i v 3 . 32v d d 3 . 0 +v v 5 . 27 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i v 3 . 33 . 0 -8 . 0v v 5 . 23 . 0 -7 . 0v i h i t n e r r u c h g i h t u p n ie ov d d v = n i v 5 2 6 . 2 r o v 5 6 4 . 3 =5a i l i t n e r r u c w o l t u p n ie ov d d v , v 5 2 6 . 2 r o v 5 6 4 . 3 = n i v 0 =0 5 1 -a t able 3b. p ower s upply dc c haracteristics , v dd = v dda = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 7 3 . 25 . 25 2 6 . 2v v a d d e g a t l o v y l p p u s g o l a n a 5 7 3 . 25 . 25 2 6 . 2v i d d t n e r r u c y l p p u s r e w o p d b ta m i a d d t n e r r u c y l p p u s g o l a n a d b ta m
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 4 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary t able 4. c rystal c haracteristics r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 . 4 24 3z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m t able 5a. ac c haracteristics , v dd = v dda = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 4 20 4 3z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g e t n i @ z h m 0 5 2 z h m 0 2 - z h m 5 7 8 . 1 3 3 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 3s p c d oe l c y c y t u d t u p t u o 0 5% . n o i t c e s s i h t g n i w o l l o f s t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n t able 5b. ac c haracteristics , v dd = v dda = 2.5v5%, t a = -40c to 85c t able 3e. hstl dc c haracteristics , v dd = v dda = 2.5v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u o 14 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o 04 . 0v v x o 2 e t o n ; e g a t l o v r e v o s s o r c t u p t u o 0 40 6% v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 6 . 04 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n . d n g o t . n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e d : 2 e t o n t able 3d. hstl dc c haracteristics , v dd = v dda = 3.3v5%, t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h o 1 e t o n ; e g a t l o v h g i h t u p t u o 18 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u o 06 . 0v v x o 2 e t o n ; e g a t l o v r e v o s s o r c t u p t u o 0 40 6% v g n i w s g n i w s e g a t l o v t u p t u o k a e p - o t - k a e p 4 . 08 . 1v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n . d n g o t . n o i t i d n o c n e v i g a t a g n i w s e g a t l o v t u p t u o o t t c e p s e r h t i w d e n i f e d : 2 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 5 4 20 4 3z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g e t n i @ z h m 0 5 2 z h m 0 2 - z h m 5 7 8 . 1 4 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 25 2 3s p c d oe l c y c y t u d t u p t u o 0 5% . n o i t c e s s i h t g n i w o l l o f s t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 5 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary p arameter m easurement i nformation o utput r ise /f all t ime hstl 3.3v o utput l oad ac t est c ircuit hstl 2.5v o utput l oad ac t est c ircuit rms p hase j itter o utput d uty c ycle /p ulse w idth /p eriod q0 nq0 clock outputs 20% 80% 80% 20% t r t f v sw i n g scope hstl qx nqx v dd, v dda 0v 3.3v 5% gnd scope hstl qx nqx 0v 2.5v 5% gnd v dd, v dda phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power t pw t period t pw t period odc = x 100%
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 6 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary a pplication i nformation figure 2. c rystal i npu t i nterface c rystal i nput i nterface the ics842023i has been characterized with 18pf parallel resonant crystals. the capacitor values, c1 and c2, shown in figure 2 below were determined using a 25mhz, 18pf parallel resonant crystal and were chosen to minimize the ppm error. the optimum c1 and c2 values can be slightly adjusted for dif- ferent board layouts. p ower s upply f iltering t echniques as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics842023i provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd and v dda should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10 f and a .01 f bypass capacitor should be connected to each v dda pin. f igure 1. p ower s upply f iltering 10 v dda 10 f .01 f 3.3v or 2.5v .01 f v dd ics84332 xtal_in xtal_out x1 18pf parallel cry stal c2 22p c1 22p ics842023i
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 7 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary r eliability i nformation t ransistor c ount the transistor count for ics842023i is: 2538 t able 6. ja vs . a ir f low t able for 8 l ead tssop ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 8 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary p ackage o utline - g s uffix for 8 l ead tssop t able 7. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n8 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 20 1 . 3 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
842023agi www.icst.com/products/hiperclocks.html rev. b june 14, 2005 9 integrated circuit systems, inc. ics842023i f emto c locks ? c rystal - to - hstl c lock g enerator preliminary t able 8. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t i g a 3 2 0 2 4 8 s c ia 3 2 0 2p o s s t d a e l 8e b u tc 5 8 o t c 0 4 - t i g a 3 2 0 2 4 8 s c ia 3 2 0 2p o s s t d a e l 8l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - the aforementioned trademarks, hiperclocks? and femtoclocks? are a trademark of integrated circuit systems, inc. or its subsidi aries in the united states and/or other countries.
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