1999 imp, inc. 408-432-9100/www.impweb.com 1 key features applications u set-top boxes u cellular phones u pdas u energy management systems u embedded control systems u printers u single board computers u improved dallas ds1817 replacement ?over 50% lower maximum supply current u low supply current ?20? maximum (5.5v) ?15? maximum (3.6v) u automatically restarts a microprocessor after power failure u 150ms reset delay after v cc returns to an in-tolerance condition u active high power-up reset u precision temperature-compensated voltage reference and comparator u eliminates external components u low-cost to-92 package u compact surface mount sot-23 package u push-pull output for minimum current drain u operating temperature 40 c to +85 c block diagram + 1817_01.eps v cc 1 reset gnd 3 2 supply tolerance bias IMP1817 reference delay 150ms typical imp1 imp1 8 8 1 1 7 7 p ower m anagement lo lo w p w p o o w w er er , 3.3v/3.0v , 3.3v/3.0v p r p r eset eset C a C a ctiv ctiv e high, push-pull output e high, push-pull output the IMP1817 supply voltage monitor is an improved, low-power replacement for the dallas semiconductor ds1817. maximum supply current over temperature is a low 15 m a, representing over 50 percent lower power as compared to the ds1817. the IMP1817 issues an active high reset signal whenever the moni- tored supply is out-of-tolerance. a precision reference and comparator circuit monitor power supply (v cc ) level. tolerance level options are 5-, 10- and 20-percent. when an out-of-tolerance condition is detected, an internal power-fail signal is generated which forces an active high reset signal. after v cc returns to an in-tolerance condition, the reset signal remains active for 150ms to allow the power supply and system micro- processor to stabilize. the IMP1817 is designed with a push-pull output stage and operates over the extended industrial temperature range. devices are available in compact surface mount sot-23 packages and 3-lead to-92 packages. other low power products in this family include the imp1810/11/12/15/16, imp1233d and imp1233m. typical application IMP1817 microprocessor reset reset 1817_02.eps v cc gnd t r a p e g a t l o v t e s e r ) v ( e m i t t e s e r ) s m ( t u p t u o e g a t s t e s e r y t i r a l o p 0 1 8 1 p m i0 2 1 . 4 , 0 7 3 . 4 , 0 2 6 . 40 5 1l l u p - h s u pw o l 1 1 8 1 p m i0 3 1 . 4 , 0 5 3 . 4 , 0 2 6 . 40 5 1n i a r d - n e p ow o l 2 1 8 1 p m i0 3 1 . 4 , 0 5 3 . 4 , 0 2 6 . 40 5 1l l u p - h s u ph g i h 5 1 8 1 p m i0 5 5 . 2 , 0 8 8 . 2 , 0 6 0 . 30 5 1l l u p - h s u pw o l 6 1 8 1 p m i0 5 5 . 2 , 0 8 8 . 2 , 0 6 0 . 30 5 1n i a r d - n e p ow o l 7 1 8 1 p m i0 5 5 . 2 , 0 8 8 . 2 , 0 6 0 . 30 5 1l l u p - h s u ph g i h d 3 3 2 1 p m i5 2 1 . 4 , 5 7 3 . 4 , 5 2 6 . 40 5 3n i a r d - n e p ow o l m 3 3 2 1 p m i0 2 7 . 2 , 5 7 3 . 4 , 5 2 6 . 40 5 3n i a r d - n e p ow o l family selection guide
2 408-432-9100/www .impweb.com 1999 imp , inc. pin configuration imp1 imp1 8 8 1 1 7 7 pin descriptions pin n umber n ame f unction 1 reset active low reset output 2 v cc power supply input 3 gnd ground IMP1817-x reset v cc gnd 3 1 2 1817_03.eps package marking code ordering infor mation 1817_04.eps 1 2 3 IMP1817-x so t23 t o-92* 1817_05a.eps 3 1 2 a b c d 3 2 - t o s e d o c r e t t e l e g a k c a p a b t r a p e c n a r e l o t t e s e r m a 7 1 8 1 p m i % 5 m b 7 1 8 1 p m i % 0 1 m c 7 1 8 1 p m i % 0 2 s p e . 2 0 t _ 7 1 8 1 * add /s to part number for straight (unformed) leads. (ie. imp18xx-x/s) xx = date code ** add /t to part number for t ape and reel. (ie. imp18xx-x/t) y r a m m u s e c i v e d g n i k r a m e g a k c a p * * t r a p r e b m u n t e s e r t u p t u o e g a t l o v ) v ( t e s e r e c n a r e l o t ) % ( t e s e r e m i t ) s m ( l l u p - h s u p t u p t u o e g a t s * 2 9 - o t e g a k c a p 3 2 - t o s e g a k c a p t e s e r y t i r a l o p a b c d 5 - 7 1 8 1 p m i 6 0 . 3 5 0 5 1 l l w o l 0 1 - 7 1 8 1 p m i 8 8 . 2 0 1 0 5 1 l l w o l 0 2 - 7 1 8 1 p m i 5 5 . 2 0 2 0 5 1 l l w o l 5 - r 7 1 8 1 p m i 6 0 . 3 5 0 5 1 l l w o l m a x x 0 1 - r 7 1 8 1 p m i 8 8 . 2 0 1 0 5 1 l l w o l m b x x 0 2 - r 7 1 8 1 p m i 5 5 . 2 0 2 0 5 1 l l w o l m c x x
1999 imp , inc. 408-432-9100/www .impweb.com 3 imp1 imp1 8 8 1 1 7 7 absolute maximum ratings electrical characteristics v oltage on v cc . . . . . . . . . . . . . . . . . . . . . . . . 0.5v to 7v v oltage on reset . . . . . . . . . . . . . . . . . . . . . 0.5v to v cc + 0.5v operating t emperatur e range . . . . . . . . . . . 40 c to 85 c soldering t emperatur e . . . . . . . . . . . . . . . . . . 260 c for 10 seconds storage t emperatur e . . . . . . . . . . . . . . . . . . . 55 c to 125 c v oltages measur ed with r espect to gr ound. these ar e str ess ratings only and functional operation is not implied. p ar amet er symbol conditions min t yp max u nits supply v oltage v cc 1.2 5.5 v output v oltage v oh i out < 500 m a v cc ?0.5v v cc ?0.1v v output current i oh output = 2.4v , v cc 3 2.7v 350 m a output current i ol output = 0.4v , v cc 3 2.7v +10 ma operating current i cc v cc < 5.5v , reset output open 8 20 m a operating current i cc v cc 3.6v , reset output open 6 15 m a v cc t rip point (IMP1817-5) v cctp 2.98 3.06 3.15 v v cc t rip point (IMP1817-10) v cctp 2.80 2.88 2.97 v v cc t rip point (IMP1817-20) v cctp 2.47 2.55 2.64 v output capacitance c out 10 pf v cc detect to reset low t rpd 2 5 m s v cc slew rate t f note 1 300 m s ( v cctp (max) to v cctp (min)) v cc slew rate t r 0 ns ( v cctp (min) to v cctp (max)) v cc detect to reset high t rpu t r = 5 m s 100 150 250 ms unless otherwise noted, v cc = 1.2v to 5.5v and specifications ar e over the operating temperatur e range of 40 c to +85 c. all voltages ar e r efer enced to gr ound. notes 1. the t f value is for r efer ence in defining values for t rpd and should not be consider ed a r equir ement for pr oper operation or use.
4 408-432-9100/www .impweb.com 1999 imp , inc. imp1 imp1 8 8 1 1 7 7 application infor mation operation ?power monitor the IMP1817 detects out-of-tolerance power supply conditions. it r esets a pr ocessor during power -up, power -down and issues a r eset to the system pr ocessor when the monitor ed power supply voltage is below the r eset thr eshold. when an out-of-tolerance v cc voltage is detected, the reset signal is asserted. on power -up, reset is kept active (high) for appr oximately 150ms after the power supply voltage has r eached the selected tolerance. this allows the power supply and micr opr ocessor to stabilize befor e reset is r eleased. IMP1817 micr opr ocessor reset reset 1815_07.eps figur e 1. reset v alid to 0v v cc figur e 2. t iming diagram: power-up figur e 3. t iming diagram: power-down v cctp (max) v cctp v cctp (min) v in reset t r t rpu v ol 1817_07.eps v cctp (max) v cctp v cctp (min) v cc reset t f v oh t rpd reset slews with v cc 1817_08.eps
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