AOD2HC60 600v,2.5a n-channel mosfet general description p roduct summary v ds @ t j,max 700 i dm 14a r ds(on),max < 2 w q g,typ 7.6nc e oss @ 400v 1 .6 m c 100% uis tested! 100% r g tested! symbol v ds v gs i dm i ar e ar e as mosfet dv/dt ruggedness p eak diode recovery dv/dt t j , t stg t l symbol r q ja r q c s r q j c v/ns 2 0 mj a mj 45 parameter typical w w/ o c m aximum lead temperature for soldering purpose, 1/8" from case for 5 seconds 300 c 14 pulsed drain current c continuous drain c urrent b maximum junction-to-ambient a,g t c =25c 5 5 maximum thermal characteristics units c/w i d t c =25c 2 .5 2 600 junction and storage temperature range -50 to 150 c power dissipation b v 30 gate-source voltage t c =100c a d v/dt 100 the AOD2HC60 is fabricated using an advanced high voltage mosfet process that is designed to deliver high levels of performance and robustness in popular ac-dc applications. by providing low r ds(on) , c iss and c rss along w ith guaranteed avalanche capability this part can be adopted quickly into new and existing offline power supply designs. v units parameter absolute maximum ratings t a =25c unless otherwise noted maximum drain-source voltage avalanche current c 28 r epetitive avalanche energy c derate above 25 o c 74 0.6 7.5 single pulsed avalanche energy h 132 p d maximum case-to-sink a maximum junction-to-case d,f c/w c/w 1.3 0.5 1.7 - g d s g s d g s d top view to252 dpak bottom view AOD2HC60 rev.1.0 april 2013 www.aosmd.com page 1 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AOD2HC60 symbol min typ max units 600 700 bv dss / ? t j 0.59 v/ o c 1 1 0 i gss gate-body leakage current 100 n a v gs(th) gate threshold voltage 3 4 5 v r ds(on) 1.65 2 w g fs 2.3 s v sd 0.78 1 v i s maximum body-diode continuous current 2 .5 a i sm 14 a c iss 466 p f c oss 23 p f c o(er) 19 p f c o(tr) 31 p f c rss 1.3 p f r g 6.3 w q g 7.6 10 nc q gs 3.1 n c q gd 1.4 n c t d(on) 18 n s t r 14 n s t d(off) 27 n s t f 17 n s t rr 183 n s q rr 2.1 m c this product has been designed and qualified for the consumer market. applications or uses as critical c omponents in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. v gs =0v, v ds =0 to 480v, f=1mhz ef fective output capacitance, time related j v gs =0v, v ds =100v, f=1mhz t otal gate charge v gs =10v, v ds =480v, i d =2.5a g ate source charge body diode reverse recovery charge i f =2.5a,di/dt=100a/ m s ,v ds =100v t urn-on delaytime body diode reverse recovery time forward transconductance dynamic parameters diode forward voltage gate resistance v gs =0v, v ds =0v, f=1mhz m aximum body-diode pulsed current input capacitance output capacitance v gs =0v, v ds =100v, f=1mhz ef fective output capacitance, energy related i v ds =5v, i d =250 m a v ds =480v, t j =125c i s =1a,v gs =0v v ds =40v, i d =1.25a v ds =0v, v gs =30v d rain-source breakdown voltage i d =250 a, v gs =0v, t j =25c i d =250 a, v gs =0v, t j =150c z ero gate voltage drain current v ds =600v, v gs =0v bv dss m a v z ero gate voltage drain current id=250 a, vgs=0v i dss electrical characteristics (t j =25c unless otherwise noted) st atic parameters parameter conditions static drain-source on-resistance v gs =10v, i d =0.8a r everse transfer capacitance i f =2.5a,di/dt=100a/ m s ,v ds =100v sw itching parameters turn-on rise time turn-off delaytime v gs =10v, v ds =300v, i d =2.5a, r g =25 w t urn-off fall time gate drain charge a. the value of r q j a is measured with the device in a still air environment with t a =25c. b . the power dissipation p d is based on t j(max) =150c in a to252 package, using junction-to-case thermal resistance, and is more useful in setting t he upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =150c. d . the r q j a is the sum of the thermal impedance from junction to case r q j c and case to ambient. e . the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150c. g .these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. h . l=60mh, i as =2.1a, v dd =150v, r g =10 ? , starting t j =25c i. c o(er) is a fixed capacitance that gives the same stored energy as c oss while v ds is rising from 0 to 80% v (br)dss. j. c o(tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v (br)dss. rev.1.0 april 2013 w ww.aosmd.com page 2 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AOD2HC60 typical electrical and thermal characteristics 40 1e-04 1e-03 1e-02 1e-01 1e+00 1e+01 1e+02 0 0.2 0.4 0.6 0.8 1 v sd (volts) f igure 6: body-diode characteristics i s (a) 25c 125c i d =30a 25c 125c 0 1.5 3 4.5 6 7.5 0 5 10 15 20 25 30 v ds (volts) f ig 1: on-region characteristics i d (a) v gs =5.5v 6.5v 10v 7v 6v 0.1 1 10 100 2 4 6 8 10 v gs (volts) f igure 2: transfer characteristics i d (a) -55c v ds =40v 25c 125c 1.0 1.5 2.0 2.5 3.0 3.5 0 1 2 3 4 5 6 i d (a) f igure 3: on-resistance vs. drain current and gate voltage r ds(on) ( w w w w ) v gs =10v 0 0.5 1 1.5 2 2.5 3 -100 -50 0 50 100 150 200 temperature (c) figure 4: on-resistance vs. junction temperature normalized on-resistance v gs =10v i d =0.8a 0.8 0.9 1 1.1 1.2 -100 -50 0 50 100 150 200 t j ( o c) f igure 5: break down vs. junction temperature bv dss (normalized) rev.1.0 april 2013 www.aosmd.com page 3 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AOD2HC60 typical electrical and thermal characteristics 0 3 6 9 12 15 0 3 6 9 12 15 q g (nc) f igure 7: gate-charge characteristics v gs (volts) v ds =480v i d =2.5a 1 10 100 1000 10000 0.1 1 10 100 1000 v ds (volts) f igure 8: capacitance characteristics capacitance (pf) c iss c oss c rss 0.01 0.1 1 10 100 1 10 100 1000 i d (amps) v ds (volts) f igure 10: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150c t c =25c 100 m s 0 15 30 45 60 75 90 0 25 50 75 100 125 150 t case (c) f igure 11: power de-rating (note b) power dissipation (w) 0 0.5 1 1.5 2 2.5 3 0 25 50 75 100 125 150 t case (c) f igure 12: current de-rating (note b) current rating i d (a) 0 0.8 1.6 2.4 3.2 4 0 100 200 300 400 500 600 v ds (volts) f igure 9: coss stored energy eoss(uj) e oss rev.1.0 april 2013 www.aosmd.com page 4 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AOD2HC60 typical electrical and thermal characteristics 0 100 200 300 400 500 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 14: single pulse power rating junction-to- ambient (note g) power (w) t j(max) =150c t a =25c 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note g) z q q q q j a normalized transient t hermal resistance d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =55c/w in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse single pulse 0 200 400 600 800 1000 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 13: single pulse power rating junction-to- case (note f) power (w) t j(max) =150c t c =25c 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 15: normalized maximum transient thermal impedance (note f) z q q q q j c normalized transient t hermal resistance d=t on /t t j,pk =t c +p dm .z q jc .r q jc r q jc =1.7c/w in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse single pulse t on t p d t on t p d rev.1.0 april 2013 www.ao smd.com page 5 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
AOD2HC60 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% res istive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery tes t circuit & waveforms vds - vds + i f a r dss 2 e = 1/2 li di/dt i rm r r vdd v dd q = - idt t rr ar ar rev.1.0 april 2013 www.aosmd.com page 6 of 6 nt?qtu5[pg ?pqls? w w w . w h x p c b . c o m
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