View MSM9805-XXXGS-AK_7393155.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

dear customers, about the change in the name such as "oki electric industry co. ltd." and "oki" in documents to oki semiconductor co., ltd. the semiconductor business of oki electric industry co., ltd. was succeeded to oki semiconductor co., ltd. on oc tober 1, 2008. therefore, please accept that although the terms and marks of "oki electric indust ry co., ltd.", ?oki electric?, and "oki" remain in the documents, they all have been changed to "oki semiconductor co., ltd.". it is a change of the company name, the co mpany trademark, and the logo, etc. , and not a content change in documents. october 1, 2008 oki semiconductor co., ltd. 550-1 higashiasakawa-cho, hachio ji-shi, tokyo 193-8550, japan http://www.okisemi.com/en/
oki semiconductor fedl9802-03-05-05 issue date: nov. 4, 2003 msm9802/03/05-xxx voice synthesis ic with built-in mask rom 1/53 general description the msm9802/03/05 is a pcm voice synthesis ic with built-in mask rom. this ic has two user selectable play back algorithms, oki non-lin ear pcm and straight pcm. it also contains a current mode 10-bit d/a conve rter and a low-pass filter. external control has been made easy by the built-in edit rom that can form sentences by linking phrases. by using oki's sound analysis and editing tool, rom data such as phrase control table can be easily set, created, edited, and evaluated. with the stand-alone mode/microcontroller interface mode switching pin, the msm9802/03/05 can support various applications. features speech period (sec) device rom size* f sam = 4.0khz f sam = 6.4khz f sam = 8.0khz f sam = 16.0khz msm9802 512kbits 16. 0 10.0 8.0 4.0 msm9803 1mbit 32.4 20.2 16.2 8.1 msm9805 2mbits 65. 1 40.7 32.5 16.2 * actual voice rom area is smaller by 11 kbits. ? rom custom ? 8-bit oki nonlinear pcm method/8-bit straight pcm method ? built-in edit rom ? random playback function ? sampling frequency : 4.0 khz/5.3 khz/6.4 khz/8.0 khz/10.6 khz/12.8 khz/16.0 khz note: if rc oscillation is selected, 10.6 khz, 12.8 khz, and 16.0 khz cannot be selected . ? maximum number of phrases : 63 (microcontroller interface mode) 56 (stand-alone mode) ? built-in current mode 10-bit d/a converter ? built-in low-pass filter ? standby function ? rc oscillation (256 khz)/ceramic os cillation (4.096 mhz) selectable ? package options: 18-pin plastic dip (dip18-p-300-2.54) (msm9802-xxxrs/msm9803-xxxrs/ msm9805-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (msm9802-xxxgs-k/msm9803-xxxgs-k/ msm9805-xxxgs-k) 30-pin plastic ssop (ssop30-p-56-0.65-k) (msm9802-xxxgs-ak/msm9803-xxxgs-ak/ MSM9805-XXXGS-AK) chip xxx indicates code number. note: this data sheet explains a stand-alone m ode and a microcontroller interface mode, separately.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 2/53 contents (1) stand-alone mode block diagram .................................................................................................................. ..............................3 pin configuration .............................................................................................................. ...........................4 pin descriptions ............................................................................................................... ...............................6 absolute maximu m ratings ....................................................................................................... ..............8 recommended operating conditions............................................................................................... ...8 electrical char acteristics ..................................................................................................... ...............9 timing di agrams................................................................................................................ ...........................12 functional description ......................................................................................................... ..................14 playback code specification................................................................................................... .........................14 pull-up/pull-do wn resistor .................................................................................................... ..........................14 stand-alone mode.............................................................................................................. ...............................14 application circuits ........................................................................................................... .......................19 (2) microcontroller interface mode block diagram .................................................................................................................. ............................21 pin configuration .............................................................................................................. .........................22 pin descriptions ............................................................................................................... .............................24 absolute maximu m ratings ....................................................................................................... ............25 recommended operating conditions............................................................................................... .25 electrical char acteristics ..................................................................................................... .............26 timing di agrams................................................................................................................ ...........................29 functional description ......................................................................................................... ..................31 1. playback co de specifi cation................................................................................................ ........................31 2. address data ............................................................................................................... .................................31 3. stop code .................................................................................................................. ...................................32 4. generating pseudo - busy signal throug h nar pin ..................................................................................33 application circuit ............................................................................................................ ........................34 (3) common sampling frequency............................................................................................................ .............................35 recording/pl ayback time ....................................................................................................... .........................35 playback method............................................................................................................... ...............................36 phrase control table .......................................................................................................... ..............................37 cr osc illatio n ................................................................................................................ ..................................39 determining cr contents ....................................................................................................... .........................40 ceramic os cillatio n........................................................................................................... ...............................40 low-pass filter............................................................................................................... ..................................42 standby tr ansitio n ............................................................................................................ ...............................43 voice output unit equivalent circuit (aout, vref pins) ........................................................................ ...44 d/a converter current characteristics .......................................................................................45 pad configuration.............................................................................................................. ........................46 package dimensions ............................................................................................................. ......................49
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 3/53 (1) stand-alone mode (cpu/std: "l" level) block diagram address & switching controller random circuit i/o interface osc xt/cr 16-bit (msm9802) 17-bit (msm9803) 18-bit (msm9805) multiplexer 512-kbit (msm9802) 1-mbit (msm9803) 2-mbit (msm9805) rom (including 11 kbits of edit rom & address rom) 6 16-bit (msm9802) 17-bit (msm9803) 18-bit (msm9805) address counter data controller pcm synthesizer 10-bit dac & lpf 8 10 timing controller a2 a1 a0 sw2 sw1 sw0 cpu/ st d rn d bus y osc1 osc2 osc3/ tes t xt/ c r r ese t v dd gnd v ref a out
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 4/53 pin configuration (top view) 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 a0 a1 a2 rese t xt/ c r bus y gnd v ref aout sw2 sw1 sw0 r nd cpu/ std osc3/ test osc2 osc1 v dd 18-pin plastic dip note: applicable to msm9802-xxxr s, msm9803-xxxrs, and msm9805-xxxrs. 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 v dd osc1 osc2 nc osc3/ tes t nc cpu/ s t d rn d nc sw0 sw1 sw2 a out v ref gnd nc b usy nc xt/ cr r ese t nc a 2 a 1 a 0 nc: no connection 10 15 11 14 12 13 24-pin plastic sop note: applicable to msm9802-xxxgs-k, msm9803-xxxgs-k, and msm9805-xxxgs-k.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 5/53 1 2 3 4 5 6 7 8 9 30 29 28 27 26 25 24 23 22 v dd osc1 osc2 nc nc osc3/ tes t nc cpu/ s t d nc rn d nc nc sw0 sw1 sw2 a out v ref gnd nc nc b usy nc xt/ cr nc r ese t nc nc a 2 a 1 a 0 nc: no connection 10 21 11 20 12 19 13 18 14 17 15 16 30-pin plastic ssop note: applicable to msm9802-xxxgs-ak, msm9803-xxxgs-ak, and MSM9805-XXXGS-AK.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 6/53 pin descriptions pin dip sop ssop symbol type description 4 17 21 reset i the ic enters the standby state if th is pin is set to ?l? level. at this time, oscillation stops and ao ut drives a current of 0ma and becomes gnd level, then the ic re turns to the initial state. apply a ?l? pulse upon power-on. this pin has an internal pull-up resistor. 6 20 25 busy o outputs ?l? level while voice is being played back. at power-on, this pin is at ?h? level. 5 18 23 xt/ cr i xt/rc switching pin. set to ?h? level if ceramic oscillation is used. set to ?l? level if rc oscillation is used. 14 7 8 cpu/ std i microcontroller interface/stand- alone mode switching pin. set to ?l? level if the msm 9802/03/05 is used in stand-alone mode. 8 23 29 v ref i volume setting pin. if this pin is set to gnd level, the maximum current is forced in. if this pin is set to v dd level, the minimum current is forced in. a pull-down resistor of approx. 10 ? is internally connected to th is pin during operation. 9 24 30 aout o voice output pin. the voice signals are output as current changes. in standby state, this pin drives a current of 0 ma and becomes gnd level. 7 22 28 gnd ? ground pin. 10 1 1 v dd ? power supply pin. insert a bypass capacitor of 0.1 f or more between v dd and gnd pins. 11 2 2 osc1 i ceramic oscillator connection pin when ceramic oscillation is selected. rc connection pin when rc oscillation is selected. input from this pin if external clock is used. 12 3 3 osc2 o ceramic oscillator connection pin when ceramic oscillation is selected. rc connection pin when rc oscillation is selected. leave this pin open if external clock is used. outputs ?l? level in standby state. 13 5 6 osc3/ test o leave this pin open when ceramic oscillation is used. rc connection pin when rc oscillation is selected. outputs ?h? level in standby state when rc oscillation is selected. 15 8 10 rnd i random playback starts if rnd pin is set to ?l? level. fetches addresses from random address generation circuit in the ic at fall of rnd . set to ?h? level when the random playback function is not used. this pi n has internal pull-up resistor.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 7/53 pin dip sop ssop symbol type description 16-18 10-12 13-15 sw0-sw2 i phrase input pins corresponding to playback sound. if input changes, sw0 to sw2 pins fetch addresses after 16 ms and start voice synthesis. each of these pins has internal pull-down resistor. 1-3 13-15 16-18 a0-a2 i phrase input pins corresponding to playback sound. input logic of a0 pin becomes invalid if the random playback function is used.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 8/53 absolute maximum ratings (gnd = 0 v) parameter symbol condition rating unit power supply voltage v dd ?0.3 to +7.0 v input voltage v in ta = 25c ?0.3 to + v dd +0.3 v storage temperature t stg ? ?55 to +150 c recommended operating conditions (gnd = 0 v) parameter symbol condition rating unit power supply voltage v dd ? 2.0 to 5.5 v operating temperature t op ? ?40 to +85 c min. typ. max. master clock frequency 1 f osc1 when crystal is selected 3.5 4.096 4.5 mhz master clock frequency 2 f osc2 when rc is selected (*1) 200 256 300 khz *1 the accuracy of the oscillation frequency when rc oscillation is selected depends largely on the accuracy of the external r and c.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 9/53 electrical characteristics dc characteristics (1) (v dd = 5.0 v, gnd = 0 v, t a = ?40 to +85c, unless otherwise specified) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ? 4.2 ? ? v ?l? input voltage v il ? ? ? 0.8 v ?h? output voltage v oh i oh = ?1 ma 4.6 ? ? v ?l? output voltage v ol i ol = 2 ma ? ? 0.4 v ?h? input current 1 i ih1 v ih = v dd ? ? 10 a ?h? input current 2 *1 i ih2 internal pull-down resistor 30 90 200 a ?h? input current 3 i ih3 applies to osc1 pin only. v ih = v dd ? ? 15 a ?l? input current 1 i il1 v il = gnd ?10 ? ? a ?l? input current 2 *2 i il2 internal pull-up resistor ?200 ?90 ?30 a dynamic supply current 1 *3 i dd1 v ref = v dd , aout bias voltage = 0v ? 0.4 1 ma dynamic supply current 2 *4 i dd2 at maximum output current v ref = gnd, aout bias voltage = 0v ? ? 16 ma t a = ?40 to +70c ? ? 10 a standby current i ds t a = 70 to 85c ? ? 50 a aout output current i aout at maximum output current, v ref = gnd, aout bias voltage = 0v 6 9.5 15 ma v ref pin pull-down resistance r vref ? 7 10 13 k ? *1 applicable to sw0-sw2 *2 applicable to reset , rnd *3 dynamic supply current (e xcluding dac output current) *4 dynamic supply current at maximum output current
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 10/53 dc characteristics (2) (v dd = 3.1 v, gnd = 0 v, t a = ?40 to +85c, unless otherwise specified) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ? 2.7 ? ? v ?l? input voltage v il ? ? ? 0.5 v ?h? output voltage v oh i oh = ?1 ma 2.6 ? ? v ?l? output voltage v ol i ol = 2 ma ? ? 0.4 v ?h? input current 1 i ih1 v ih = v dd ? ? 10 a ?h? input current 2 *1 i ih2 internal pull-down resistor 10 30 100 a ?h? input current 3 i ih3 applies to osc1 pin only. v ih = v dd ? ? 15 a ?l? input current 1 i il1 v il = gnd ?10 ? ? a ?l? input current 2 *2 i il2 internal pull-up resistor ?100 ?30 ?10 a dynamic supply current 1 *3 i dd1 v ref = v dd , aout bias voltage = 0v ? 0.15 0.5 ma dynamic supply current 2 *4 i dd2 at maximum output current v ref = gnd, aout bias voltage = 0v ? ? 5.5 ma t a = ?40 to +70c ? ? 5 a standby current i ds t a = 70 to 85c ? ? 20 a aout output current i aout at maximum output current, v ref = gnd, aout bias voltage = 0v 1.4 3.2 5 ma v ref pin pull-down resistance r vref ? 7 10 13 k ? *1 applicable to sw2-sw0 *2 applicable to reset , rnd *3 dynamic supply current (e xcluding dac output current) *4 dynamic supply current at maximum output current
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 11/53 ac characteristics (v dd = 5.0 v, gnd = 0 v, t a = ?40 to +85c) parameter symbol condition min. typ. max. unit master clock duty cycle f duty ? 40 50 60 % reset input pulse width t w( rst ) ? 10 ? ? s reset input time after power-on t d( rst ) ? 0 ? ? s rnd input pulse width t w( ran ) ? 100 ? ? s sw0-sw2 input pulse width t w(sw) ? (note) 16 ? ? ms busy output time t sbs ? ? ? 10 s chattering prevention time 1 t cha ? (note) 14 15 16 ms chattering prevention time 2 t chb ? (note) ? ? 16 ms d/a converter change time t dar , t daf ? (note) 60 64 68 ms standby transition time t stb ? (note) 200 250 300 ms silence time between phrases t bln f sam = 8 khz (note) 350 375 500 s random address fetch time t ra ? (note) 15 16 17 s (note) proportional to master the periods of oscillation frequencies f osc1 and f osc2 . the rated values show values when t he standard master oscillation frequency is used.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 12/53 timing diagrams ac characteristics at power-on t d( rst ) v dd reset (i) busy (o) sw2-sw0 (i) v dd min t w( rst ) ac characteristics in standby status and when the ic is activated sw0 (i) b usy (o) a out (o) t dar t stb t sbs a ddress data fetch oscillation start d/a converter change time standby status standby standby transition time sw2-sw0 (i) a 2-a0 (i) ?000? ?000? first p hrase first phrase t daf t w(sw) t cha repeated playback timing sw0 (i) b us y ( o ) a out (o) single phrase playback single phrase repeated playback t bln sw2-sw0 (i) a 2-a0 (i) ?000? ?000? first phrase first phrase
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 13/53 timing when changing from sw2 to sw0 during playback sw2 (i)?l? sw1 (i) sw0 (i) b usy (o) a out (o) t bln first phrase playback first phrase playback stops second phrase playback t chb sw2-sw0 (i) a 2-a0 (i) ?000? ?000? first phrase ?000? second phrase first phrase second phrase repeated playback timing for random playback r nd (i) b usy (o) a out (o) first phrase playback same phrase repeated playback oscillation start t bln timing when changing from a2 to a0 during playback sw0 (i) b usy (o) a out (o) t bln first phrase playback (ex.) same phrase playback a 2-a0 (i) first phrase sw2-sw0 (i) second phrase ?000? ?000? first phrase first phrase second phrase (second phrase) t c ha a ddress data fetch
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 14/53 functional description playback code specification the user can specify a maximum of 56 phrases. table 1.1 shows the settings by the a2-a0 and sw2-sw0 pins. table 1.1 user-specified phrases a2-a0 sw2-sw0 code details 000 inhibit code 000 111 001 111 user-specified phrase (56 phrases) pull-up/pull-down resistor the reset and rnd pins have internal pull-up resistors and the sw2-sw0 pins have internal pull-down resistors. stand-alone mode in a stand-alone mode, the sw input interface func tion and the random playback function can be used. sw input interface with the sw input interface, speech synthesis starts when the state of the sw2-sw0 pins has changed. to prevent chattering, the address data is latched 16 ms (t cha ) after the state of sw2-sw0 has changed. voice synthesis does not start if the state of the a2-a0 pins has changed. set the rnd pin to ?h? level if the random playback function is not used. set the a2-a0 pins to ?l? level at power-on or at reset. the sw input interface is effective when the msm9802/03/05 is operated using a push-button switch. voice synthesis starts when an address is changed by pressing the push-button switch. if the push-button switch is released during playback, then playback stops after the current phrase is completed. a 2-a0 (i) sw2~sw1 (i) ?l? sw0 (i) b usy (o) a out (o) t w (sw) oscillation start t cha figure 3.1 sw input interface single-phrase playback timing
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 15/53 if playback is attempted at an unused address in the phrases, aout goes to 1/2 i aout and playback does not occur. figure 3.2 shows the timing. oscillation start a2-a0 (i) sw2-sw1 (i) ?l? sw0 (i) busy (o) aout (o) figure 3.2 timing when playback is attempted at an unused phrase address in the sw input interface, no phrase is triggered when sw2 to sw0 are all set to ?0?. therefore, when the circuit consists of a diode matrices that use push-button switches, the maximum playback phrases are 56 phrases. 000 001 002 to 111 (000) 001 002 to 111 8 codes 7 codes = 56 code prohibited = 56 phrases a2-a0 sw2-sw0 random playback function the random playback function randomly generates 15 different addresses corresponding to the four bits of the addresses of a0 and sw2-sw0 (except all "l") on the ic, after which playback commences. therefore, any input to a0 and sw2 to sw0 pins from external control is invalid. hold these 4 pins either ?h? or ?l? level. sw2 to sw0 pins may be held open as they have internal pull-down resistor. playback may not occur if all the 15 addresses have not been assigned a phrase. care must be taken when creating rom data. for example, when four phrases, ?sunny?, ?rainy?, ?cl oudy?, and ?snowy?, are to be played randomly, set the phrases as shown in table 3.1 in which a phrase is assigned to all the 15 addresses. the four phrases are then played back at random as shown below.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 16/53 table 3.1 random address setup example a2, a1 a0, sw2-sw0 phrase 0001 sunny 0010 rainy 0011 cloudy 0100 snowy 0101 sunny 1110 rainy 00 1111 snowy random playback starts when the timing shown in figure 3.3 is input to the rnd pin. a random address is fixed based on the "h" level time of the rnd pin during ic oscillation. random address is captured at the fall of the rnd pin, and voice playback commences. therefore, when power is turned on, or when reset is input, the phrase at fixed address ?0001? is played while the rand om counter remains initialized until random playback is initiated. r nd (i) b usy (o) a out (o) t w ( ran ) r eset (i) playback (address = 0001) t w ( ran ) t ra random address fixed time random address fixed time t ra oscillation start playback (address = random) figure 3.3 random address capture
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 17/53 table 3.2 random playback address a2, a1 a0, sw2 to sw0 phrase (sample) 0001 hit 0010 hit 0011 hit 0100 out 00 1111 out 0001 hit 0010 out 0011 out 0100 out 01 1111 out 0001 white 0010 black 0011 red 0100 blue 10 1111 green 0001 11 1111 for a random address, 15 phrases can be set for each logical condition of addresses a2 and a1 (i.e., ?00?, ?01?, ?10?, and ?11?). in random playback, the four logic states (?000000?, ?010000?, ?100000? and ?110000?) in user-specified phrases cannot be used. take it into consideration when creating rom data. a random address is set by the ?h? level time of the rnd pin, so if the same pulse width is input by microcontroller, the random address fixed time becomes constant, and a random phrase may not be played under these conditions. the random address fixed time must be inconsistent in order to produce random playback. r nd (i) b usy (o) invalid pulse pulse input during this time period is invalid a out (o) oscillation start figure 3.4 timing when a pulse is input to the rnd pin during random playback
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 18/53 table 3.3 random playback and stop address a2, a1 a0, sw2-sw0 * code details 0001 00 1111 random playback address (15 addresses) 01 0001 stop address * address(es) corresponding to the a0 and sw2-sw0 pins sw0 sw1 sw2 a 0 a 1 a 2 r nd figure 3.5 circuit exampl e for random playback stop an unused user-specified address is used as a stop address, therefore the ic can enter standby without voice playback, as shown in figure 3.2.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 19/53 application circuits sw0 s3 s2 s1 s4 sw1 sw2 r nd a 0 a 1 a 2 xt/ cr cpu/ std gnd v dd aout v ref busy reset osc3 osc2 osc1 a2 a1 a0 sw2 sw1 sw0 address [hex] s1 0 0 0 0 0 1 01 s2 0 0 0 0 1 0 02 s4 = ?l? s3 0 0 0 1 0 0 04 s1 0 0 1 0 0 1 09 s2 0 0 1 0 1 0 0a s4 = ?h? s3 0 0 1 1 0 0 0c application circuit for playing six phrases using four switches
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 20/53 gnd v dd aout v ref bus y rese t osc3 osc2 osc1 sw0 sw1 sw2 xt/ cr cpu/ std r nd a 0 a 1 a 2 1234567 application circuit using switches
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 21/53 (2) microcontroller interface mode (cpu/ std : ?h? level) block diagram i5 i4 i3 i2 i1 i0 cpu/ std st nar osc1 osc2 osc3/test address controller i/o interface osc xt/cr 16-bit (msm9802) 17-bit (msm9803) 18-bit (msm9805) multiplexer 512-kbit (msm9802) 1-mbit (msm9803) 2-mbit (msm9805) rom (including 11 kbits of edit rom & address rom) 6 16-bit (msm9802) 17-bit (msm9803) 18-bit (msm9805) address counter data controller pcm synthesizer 10-bit dac & lpf 8 10 timing controller xt/ c r r ese t v dd gnd v ref a out
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 22/53 pin configuration (top view) 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 i3 i4 i5 r ese t xt/ cr nar gnd v ref aout i2 i1 i0 st cpu/ std osc3/ test osc2 osc1 v dd 18-pin plastic dip note: applicable to msm9802-xxxr s, msm9803-xxxrs, and msm9805-xxxrs. 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 v dd osc1 osc2 nc osc3/ t es t nc cpu/ s t d st nc i0 i1 i2 a out v ref gnd nc nar nc xt/ cr r ese t nc i5 i4 i3 nc: no connection 24-pin plastic sop 10 15 11 14 12 13 note: applicable to msm9802-xxxgs-k, msm9803-xxxgs-k, and msm9805-xxxgs-k.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 23/53 1 2 3 4 5 6 7 8 9 30 29 28 27 26 25 24 23 22 v dd osc1 osc2 nc nc osc3/ t es t nc cpu/ s t d nc st nc nc i0 i1 i2 a out v ref gnd nc nc nar nc xt/ cr nc r ese t nc nc i5 i4 i3 nc: no connection 30-pin plastic ssop 10 21 11 20 12 19 13 18 14 17 15 16 note: applicable to msm9802-xxxgs-ak, msm9803-xxxgs-ak, and MSM9805-XXXGS-AK.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 24/53 pin descriptions pin dip sop ssop symbol type description 4 17 21 reset i the ic enters the standby state if th is pin is set to ?l? level. at this time, oscillation stops and aout drives a current of 0 ma and becomes gnd level, then the ic returns to the initial state. apply a ?l? pulse upon power-on. this pin has an internal pull-up resistor. 6 20 25 nar o signal output pin that indicate s whether the 6-bit latch (see block diagram) is idle. nar at ?h? level indicates that the latch is empty and st input is enabled. 5 18 23 xt/ cr i xt/cr switching pin. set to ?h? level if ceramic oscillation is used. set to ?l? level if cr oscillation is used. 14 7 8 cpu/ std i microcontroller interface/stand-al one mode switching pin. set to ?h? level if the msm9802/03/ 05 is used in microcontroller interface mode. 8 23 29 v ref i volume setting pin. if this pin is set to gnd level, the maximum current is forced in, and if set to v dd level, the minimum current is forced in. an approx. 10 k ? pull-down resistor is internally connected to this pin during operation. 9 24 30 aout o voice output pin. the voice signals are output as current changes. in standby state, this pin drives a current of 0 ma and becomes gnd level. 7 22 28 gnd ? ground pin. 10 1 1 v dd ? power supply pin. insert a bypass capacitor of 0.1 f or more between this pin and the gnd pin. 11 2 2 osc1 i ceramic oscillator connection pin when ceramic oscillation is selected. cr connection pin when cr oscillation is selected. input from this pin if external clock is used. 12 3 3 osc2 o ceramic oscillator connection pin when ceramic oscillation is selected. cr connection pin when cr oscillation is selected. leave this pin open if external clock is used. outputs ?l? level in standby state. 13 5 6 osc3/ test o leave this pin open when ceramic oscillation is used. cr connection pin when cr oscillation is selected. outputs ?h? level in standby state when cr oscillation is selected. 15 8 10 st i voice synthesis starts at fall of st , and addresses i0 to i5 are fetched at rise of st . input st when nar, the status signal, is at ?h? level. this pin has internal pull-up resistor. 16-18 1-3 10-15 13-18 i0 - i5 i phrase input pins corresponding to playback sound.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 25/53 absolute maximum ratings (gnd = 0v) parameter symbol condition rating unit power supply voltage v dd ?0.3 to +7.0 v input voltage v in ta = 25c ?0.3 to v dd +0.3 v storage temperature t stg ? ?55 to +150 c recommended operating conditions (gnd = 0v) parameter symbol condition rating unit power supply voltage v dd ? 2.0 to 5.5 v operating temperature t op ? ?40 to +85 c min. typ. max. original oscillation frequency 1 f osc1 when crystal is selected 3.5 4.096 4.5 mhz original oscillation frequency 2 f osc2 when cr is selected (*1) 200 256 300 khz *1 the accuracy of the oscillation frequency when cr oscillation is selected depends largely on the accuracy of the external r and c.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 26/53 electrical characteristics dc characteristics (1) (v dd = 5.0 v, gnd = 0 v, ta = ?40 to +85c, unless otherwise specified) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ? 4.2 ? ? v ?l? input voltage v il ? ? ? 0.8 v ?h? output voltage v oh i oh = ?1 ma 4.6 ? ? v ?l? output voltage v ol i ol = 2 ma ? ? 0.4 v ?h? input current 1 i ih1 v ih = v dd ? ? 10 a ?h? input current 2 i ih2 applies to osc1 pin only. v ih = v dd ? ? 15 a ?l? input current 1 i il1 v il = gnd ?10 ? ? a ?l? input current 2 *1 i il2 internal pull-up resistor ?200 ?90 ?30 a dynamic supply current 1 *2 i dd1 v ref = v dd , aout bias voltage = 0v ? 0.4 1 ma dynamic supply current 2 *3 i dd2 at maximum output current v ref = gnd, aout bias voltage = 0v ? ? 16 ma standby current i ds ta = ?40 to +70c ? ? 10 a ta = 70 to 85c ? ? 50 a aout output current i aout at maximum output current, v ref = gnd, aout bias voltage = 0v 6 9.5 15 ma v ref pin pull-down resistance r vref ? 7 10 13 k ? *1 applicable to reset , st *2 dynamic supply current (e xcluding dac output current) *3 dynamic supply current at maximum output current
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 27/53 dc characteristics (2) (v dd = 3.1 v, gnd = 0 v, ta = ?40 to +85c, unless otherwise specified) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ? 2.7 ? ? v ?l? input voltage v il ? ? ? 0.5 v ?h? output voltage v oh i oh = ?1 ma 2.6 ? ? v ?l? output voltage v ol i ol = 2 ma ? ? 0.4 v ?h? input current 1 i ih1 v ih = v dd ? ? 10 a ?h? input current 2 i ih2 applies to osc1 pin only. v ih = v dd ? ? 15 a ?l? input current 1 i il1 v il = gnd ?10 ? ? a ?l? input current 2 *1 i il2 internal pull-up resistor ?100 ?30 ?10 a dynamic supply current 1 *2 i dd1 v ref = v dd , aout bias voltage = 0v ? 0.15 0.5 ma dynamic supply current 2 *3 i dd2 at maximum output current v ref = gnd, aout bias voltage = 0v ? ? 5.5 ma ta = ?40 to +70c ? ? 5 a standby current i ds ta = 70 to 85c ? ? 20 a aout output current i aout at maximum output current, v ref = gnd, aout bias voltage = 0v 1.4 3.2 5 ma v ref pin pull-down resistance r vref ? 7 10 13 k ? *1 applicable to reset , st *2 dynamic supply current (e xcluding dac output current) *3 dynamic supply current at maximum output currents
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 28/53 ac characteristics (v dd = 5.0 v, gnd = 0 v, ta = ?40 to +85c) parameter symbol condition min. typ. max. unit master clock duty cycle f duty ? 40 50 60 % reset input pulse width t w( rst ) ? 10 ? ? s reset input time after power-on t d( rst ) ? 0 ? ? s st signal setup time t stp at power-on 1 ? ? s st input pulse width t ( st ) ? 0.35 ? 2000 s st - st pulse interval t ss upon entering the stop code (note) 40 ? ? s data setup time t dw ? 1 ? ? s data hold time t wd ? 1 ? ? s nar output time (1) t sns f sam = 8 khz ? ? 10 s nar output time (2) t naa f sam = 8 khz (note) 350 375 400 s nar output time (3) t nab f sam = 8 khz (note) 315 440 500 s nar output time (4) t nac f sam = 8 khz (note) 350 375 500 s d/a converter change time t dar , t daf ? (note) 60 64 68 ms standby transition time (at end of voice output) t stb ? (note) 200 250 300 ms silence time between phrases t bln f sam = 8 khz (note) 350 375 500 s (note) proportional to master the periods of oscillation frequencies f osc1 and f osc2 . the rated values show values when t he standard master oscillation frequency is used.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 29/53 timing diagrams ac characteristics at power-on st (o) t d (rst) v dd reset (i) nar (o) v dd min t w (rst) t stp ac characteristics in standby status and when the ic is activated a out (o) t dar t stb t daf nar (o) st (i) t ( st ) i5 - i0 (i) t dw t wd voice playback t sns t naa standby transition time d/a converter change time oscillation start
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 30/53 playback timing t nac 3rd p hrase address 2nd p hrase address 1st p hrase address 3rd phrase playback 2nd phrase playback 1st phrase playback i5-i0 (i) st (i) nar (o) aout (o) oscillation start t nab t bln t dar
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 31/53 functional description 1. playback code specification the user can specify a maximum of 63 phrases. table 1.1 shows the settings by the i5-i0 pins. table 1.1 user-specified phrases i5-i0 code details 000000 stop code 000001 111111 user-specified phrase (63 phrases) 2. address data if a phrase is input at i5-i0 pins by address data, and if a st pulse is then applied, voice playback starts. figure 2.1 shows voice start timing. figure 2.2 shows timing when an address other than a phrase is input. i5-i0 (i) st (i) nar (o) a out (o) user phrase oscillation start voice end figure 2.1 voice start timing oscillation start i5-i0(i) st (i) nar (o) aout (o) address other than user phrase figure 2.2 timing when address other than a phrase is input in stand-by mode
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 32/53 3. stop code if i5-i0 are set to ?000000? during voice playback, and a st signal is input, playback stops regardless of whether nar is at ?h? or ?l? level, then aout becomes 1/2 i aout . stop code becomes valid at the falling edge of st . figure 3.1 shows stop code input timing. i5 - i0 ( i ) st ( i ) nar ( o ) a out ( o ) user phrase ?000000? voice stop t ss figure 3.1 stop code input timing the stop code does not initialize internal units but only stop s playback. to initialize an internal register, use the reset pin.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 33/53 4. generating pseudo- busy signal through nar pin if the application in use requires a busy signal when this ic is used in microcontroller interface mode, a pseudo- busy signal can be generated thr ough the nar pin by controlling si gnal timing, as shown below. when edit rom is not used i5 -i0 st nar (pseudo- busy ) aou t t dar phrase 1 01(phrase 1) 02(phrase 2) 03(phrase 3) 04(silence phrase of 32 ms or more) 30 s or more t nab phrase 2 phrase 3 t daf t stb silence phrase 30 s or more 30 s or more t nab t nab when edit rom is used i5-i0 st nar (pseudo- busy ) aou t t dar phrase 1 01 (phrases 1 + 2+3) 02(silence phrase of 32 ms or more) 30 s or more t bln t nab phrase 2 t daf t stb silence phrase t bln phrase 3
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 34/53 application circuit + ? + ? p1.5 p1.4 p1.3 p1.2 p1.1 p1.0 p2.2 p2.1 p3.0 i5 i4 i3 i2 i1 i0 s t reset nar rest xtal1 xtal2 gnd osc3 v dd v ref aout cpu/ s t d xt/ cr osc2 osc1 a in stby vr gnd sel sp sp v cc msm83c154 ( mcu ) msm9802/03/05 msc1157 ( s p eaker amp ) application circuit in microcontroller interface
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 35/53 (3) common sampling frequency as shown in table 1.1, 7 sampling frequencies are available. a sampling frequency can be selected a nd assigned to each phrase in rom data. table 1.1 sampling frequency frequency diving ratio sampling frequency (at standard oscillation frequency) xt/ cr = ?h? ceramic oscillation xt/ cr = ?l? cr oscillation 4.0 khz f osc1 /1024 f osc2 /64 5.3 khz f osc1 /768 f osc2 /48 6.4 khz f osc1 /640 f osc2 /40 8.0 khz f osc1 /512 f osc2 /32 10.6 khz f osc1 /384 unavailable 12.8 khz f osc1 /320 unavailable 16.0 khz f osc1 /256 unavailable note: when cr oscillation is selected, 10.6 khz, 12.8 khz, and 16 khz cannot be selected. recording/playback time figure 2.1 below shows memory allocation of the on-chip mask rom. about 11 kbits of data area is allocated for the phrase control table, phrase data control and test data. therefore, actual data area for storing sound data equals the total mask rom capacity minus 11 kbits. phrase control table area 4k bit phrase data control area 4k bit test data area 3k bit on-chip mask rom capacity 501k bit(msm9802) 512k bit (msm9802) 1013k bit (msm9803) 1m bit (msm9803) 2037k bit (msm9805) 2m bit (msm9805) user's area figure 2.1 memory allocation of on-chip mask rom
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 36/53 the playback time is obtained by dividing the memory capacity by the bit rate. the playback time for 8-bit pcm algorithm is obtained by using the following equation. memory capacity [bit] memory capacity [bit] playback time [sec] = = bit rate [bps] sampling frequency [hz] 8 [bit] for example, if all phrases are stor ed in the msm9802 at 8 khz sampling frequency, the maximum playback time is as follows. (512?11) 1024 [bit] playback time = ? 8.0 [sec] 8000 [hz] 8 [bit] table 2.1 maximum playback time maximum playback time (sec) model rom capacity user's area f sam = 4.0 khz f sam = 6.4 khz f sam = 8.0 khz f sam = 16.0 khz msm9802 512k bit 501k bit 16.0 10.0 8.0 4.0 msm9803 1m bit 1013k bit 32.4 20.2 16.2 8.1 msm9805 2m bit 2037k bit 65.1 40.7 32.5 16.2 playback method this ic provides two kinds of playback methods, non-linear pcm algorithm and straight pcm algorithm. when the 8-bit non-linear pcm algorithm is selected, sound quality can be improved because a resolution equivalent to 10-bit straight pcm is available around the waveform cente r. you can select either non-linear pcm algorithm or straight pcm algorithm for each phrase. table 3.1 shows the relationship between playback methods and applicable sounds. it is recommended to ev aluate the sound quality before actual use. table 3.1 relationship between playback methods and applicable sounds playback method applicable sound 8-bit non-linear pcm algorithm human voice 8-bit straight pcm algorit hm beep tone, sound effects
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 37/53 phrase control table because the lsi contains the phrase control table, it is possible to play back multiple phrases in succession by a single easy control operation like controlling a single regular phrase playback. up to 8 combined phrases including a silence can be registered in a si ngle address in the phrase control table. further, you can use the maximum memory space for data storage because it is not required to have the same phrase data. to show an example, let's assume that your application needs to speak two similar sentences, ?it is fine today? and ?it is rainy today.? the two sentences have the common word s ?it?, ?is? and ?today?. what you have to do is to prepare these common sound data, not in sentences but in words, and to store each combined phrase data in phrase control table as shown in table 4.1 and figure 4.1 multiple phrases can be played continuously merely by specifying a desired phrase using an x address. for an example from table 4.1, when address ?01? is specified, ?it is fine today? is played, and when address?02? is specified, ?it is rainy? is played. phrase control table, a silence can be inserted without using the user's area. minimum time for silence 32 ms maximum time for silence 2016 ms time unit for setting up silence 32 ms table 4.1 matrix of the phrase control table no. x-address (hex) y-address (up to 8 phrases) sound data 1 01 [01] [02] silence [10] [03] it is (silence) fine today. 2 02 [01] [02] silence [12] [03] it is (silence) rainy today. 3 03 [01] [02] [ 10] [21] [11] [ 12] [22] [03] it is fine becoming cloudy, rainy in some areas today. 62 3e 63 3f
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 38/53 phrase control table area phrase data registration area no. x-address phrase addigned no. y-address phrase 1 01 1 [01] it 1 01 it 2 02 2 [02] is 2 02 is 3 03 3 silence (64ms) 3 03 today 4 04 4 [12] rainy 5 05 5 [03] today 16 10 fine 6 06 6 ? 17 11 cloudy 7 07 7 ? 18 12 rainy 8 08 8 ? 19 13 snowy 9 09 silence time setting 32 20 ocasionally (32ms n) 33 21 becoming 0 silence time 34 22 in some areas 1 32 ms 2 64 ms 63 3f 63 2016 ms 63 3f ? figure 4.1 phrase combination matrix for phrase control table
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 39/53 cr oscillation figure 5.1 shows an external circuit using cr oscillation. figure 5.2 shows the cr oscillation frequency characteristics. figure 5.1 cr oscillation 10 20 30 40 50 60 70 100 200 300 400 oscillaiton frequency f osc (khz) load resistance r2 (k ) v dd =5 v c=30 pf v dd =5 v c=47 pf 150 250 350 450 0 50 500 v dd =3 v c=47 pf v dd =3 v c=30 pf r1=100 k figure 5.2 cr oscillation frequency characteristics r1 r2 c osc1 osc2 osc3
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 40/53 determining cr constants the cr oscillation frequency characteristics are shown in figure 5.2. if f osc is set to 256 khz, use the following values as a guide (see figure 5.2) to set the c and r2 that fit the printed-circuit board type used. r1 = 100 k ? , r2 = 30 k ? , c = 30 pf when choosing cr oscillation, the cr oscillation frequenc y varies according to the fluc tuation of the external c and r2. fluctuation of cr oscillation frequencies when choosing cr oscillation, the error of cr oscillation frequency due to process variations of the ic is 4% maximum, and the fluctuation of the cr oscillation freque ncy when using a capacitor (c) of 1% accuracy and a resistor (r2) of 2% accuracy is a maximum of 7% approximately. ceramic oscillation figure 6.1 shows an external circuit using a ceramic oscillator. osc1 osc2 c1 c2 figure 6.1 ceramic oscillation diagram
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 41/53 for example, the following table shows the optimum lo ad capacitances, power supply voltage ranges, and operating temperature ranges when ceramic oscillators ma de by murata mfg co., ltd., kyocera co., ltd. and tdk co., ltd. are used. ceramic oscillator optimal load capacity maker type frequency (mhz) c1 (pf) c2 (pf) supply voltage range (v) operating temperature range (c) cstcr4m09g53-r0 2.3 to 5.5 murata mfg cstls4m09g53-b0 4.096 built in built in 2.4 to 5.5 ?40 to +85 pbrc4.00a kbr-4.0msb 33 33 pbrc4.00b kyocera kbr-4.0mkc 4.0 built in built in 3.1 to 5.5 ?20 to +80 tdk ccr4.00mc3 4.0 built in built in 2.4 to 5.5 ?40 to +85 (note) when a 4 mhz ceramic oscillator is used, the playback speed of msm 9802/03/05 is slower by 2 percent than that of an analysis tool or a demonstration board.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 42/53 low-pass filter in this ic, all voice outputs are through the built-in low-pa ss filter (lpf). figure 7.1 and table 7.2 show the lpf frequency characteristics and lpf cutoff frequency respectively. only the voice output through lpf is enabled in this ic. figure. 7.1 lpf frequency characteristics (f sam = 8 khz) table 7.2 lpf cutoff frequency sampling frequency (khz) (f sam ) cutoff frequency (khz) (f cut ) 4.0 1.2 5.3 1.6 6.4 2.0 8.0 2.5 10.6 3.2 12.8 4.0 16.0 5.0
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 43/53 standby transition when playback of a phrase is finished, if playback of the next phrase does not start up within t stb (0.25 sec. typ.), the ic enters standby status and the entire operation stops. a2 - a0 sw0 aout b us y sw2 - sw1?l? figure 8.1 timing for voice playback during d/a converter change time (stand-alone mode) i5 - i0 a out nar st figure 8.2 timing for voice playback during d/a converter change time (microcontroller interface mode) if playback is attempted during d/a converter change time as shown in figures 8.1 and 8.2, the ic exits from standby status and the output from the d/a converter begins going to the 1/2 i aout level. when the output reaches 1/2 i aout , voice playback starts.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 44/53 voice output unit equivalent circuit (aout, fref pins) pcm value v dd current-sourcing type d/a converter a out standby signal 10k ? (typ) v ref (the above switch positions show those when the circuit is active.) i aout figure 9.1 voice output unit equivalent circuit
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 45/53 d/a converter output current characteristics 14 12 10 8 6 4 2 0 0123456 aout output current [ma] power supply voltage [v] power supply voltage vs. output current characteristics (ta = 25c, v aout = 0v) temperature vs. output current characteristics (v dd = 5v, v aout = 0v) 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v ref [v] aout output current [ma] v ref voltage vs. output current characteristics (ta = 25c, v dd = 5v, v aout = 0v) aout output current [ ma] 14 12 10 8 6 4 2 0 ? 50 ambient tem p erature ta [ c ] ? 25 0 25 50 75 100
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 46/53 pad configuration msm9802 pad layout chip size : x = 3.22mm y = 3.17mm chip thickness : 350 m 30 m pad size : 110 m 110 m substrate potential : gnd 321181716 78 9 1011 12 4 5 (nc) 6 15 14 13 y-axis msm9802 x-axis pad coordinates (chip center is located at x = 0 and y = 0) (unit: m) pad no. pad name x-axis y-axis pad no. pad name x-axis y-axis 1 i3/ (a0) ?415 1385 10 vdd 462 ?1347 2 i4/ (a1) ?816 1385 11 osc1 742 ?1333 3 i5/ (a2) ?1460 1385 12 osc2 1349 ?1333 4 reset ?1460 1049 13 osc3 1460 ?972 5 xt/ cr ?1458 ?20 14 cpu/ std 1389 183 6 nar ?1460 ?899 15 st /( rnd ) 1389 1058 7 gnd ?1460 ?1375 16 i0/(sw0) 1389 1385 8 v ref ?1135 ?1333 17 i1/(sw1) 719 1385 9 aout ?585 ?1333 18 i2/(sw2) 276 1385 pad name in parentheses is for stand-alone mode.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 47/53 msm9803 pad layout chip size : x = 3.22mm y = 4.06mm chip thickness : 350m 30m pad size : 110m 110m substrate potential : gnd 321181716 78 9 1011 12 4 5 (nc) 6 15 14 13 y-axis msm9803 x-axis pad coordinates (chip center is located at x = 0 and y = 0) (unit: m) pad no. pad name x-axis y-axis pad no. pad name x-axis y-axis 1 i3/ (a0) ?415 1829 10 vdd 452 ?1788 2 i4/ (a1) ?816 1829 11 osc1 742 ?1776 3 i5/ (a2) ?1460 1829 12 osc2 1349 ?1776 4 reset ?1460 1493 13 osc3 1460 ?1415 5 xt/ cr ?1458 424 14 cpu/ std 1389 628 6 nar ?1460 ?1342 15 st /( rnd ) 1389 1502 7 gnd ?1460 ?1818 16 i0/(sw0) 1389 1829 8 v ref ?1135 ?1776 17 i1/(sw1) 720 1829 9 aout ?585 ?1776 18 i2/(sw2) 276 1829 pad name in parentheses is for stand-alone mode.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 48/53 msm9805 pad layout chip size : x = 3.22mm y = 5.96mm chip thickness : 350m 30m pad size : 110m 110m substrate potential : gnd 321181716 78 9 1011 12 4 5 (nc) 6 15 14 13 y-axis msm 9805 x-axis pad coordinates (chip center is located at x = 0 and y = 0) (unit: m) pad no. pad name x-axis y-axis pad no. pad name x-axis y-axis 1 i3/ (a0) ?415 2777 10 vdd 452 ?2723 2 i4/ (a1) ?816 2777 11 osc 742 ?2726 3 i5/ (a2) ?1460 2777 12 osc2 1349 ?2726 4 reset ?1460 882 13 osc3 1460 ?1532 5 xt/ cr ?1458 364 14 cpu/ std 1453 267 6 nar ?1460 ?1546 15 st /( rnd ) 1455 1338 7 gnd ?1460 ?2768 16 i0/(sw0) 1432 2777 8 vref ?1136 ?2726 17 i1/(sw1) 754 2777 9 aout ?585 ?2726 18 i2/(sw2) 312 2777 pad name in parentheses is for stand-alone mode.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 49/53 package dimensions dip18-p-300-2.54 package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 1.30 typ. 5 rev. no./last revised 2/dec. 11, 1996 (unit: mm)
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 50/53 notes for mounting the surface mount type package the surface mount type packages ar e very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform refl ow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). sop24-p-430-1.27-k mirror finish package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 0.58 typ. 5 rev. no./last revised 5/oct. 13, 1998 (unit: mm)
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 51/53 notes for mounting the surface mount type package the surface mount type packages ar e very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform refl ow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ssop30-p-56-0.65-k mirror finish package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 0.19 typ. 5 rev. no./last revised 5/dec. 5, 1996 (unit: mm)
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 52/53 revision history page document no. date previous edition current edition description fedl9802-03-05-04 nov. 2001 ? ? final edition 4 fedl9802-03-05-05 nov. 4, 2003 33 33 the pulse widths of the pseudo busy signals (through the nar pin) when edit rom is not used and when edit rom is used have been changed from 30 ms or more to 30 s or more.
fedl9802-03-05-05 oki semiconductor msm9802/03/05-xxx 53/53 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are refl ected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, imprope r installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this docu ment are intended for use in genera l electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not, unless specifically authorized by oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automo tive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of dete rmining the legality of export of these products and will take appropriate and necessary st eps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2003 oki electric industry co., ltd.

▲Up To Search▲

Price & Availability of MSM9805-XXXGS-AK

	To Download MSM9805-XXXGS-AK Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .