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cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting preliminary data 2002 sep 09 integrated circuits
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2 2002 sep 09 features ? 5 w switch connection between two ports ? ttl-compatible input levels ? designed to be used in level shifting applications ? minimal propagation delay through the switch ? esd protection exceeds 2000 v hbm per jesd22-a114, 200 v mm per jesd22-a115 and 1000 v cdm per jesd22-c101 ? latch-up testing is done to jesdec standard jesd78 which exceeds 100 ma description the cbtd3253 is a dual 1-of-4 high-speed ttl-compatible fet multiplexer/demultiplexer. the low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. 1oe , 2oe , s0, and s1 select the appropriate b output for the a-input data. internal diode allows voltage level shifting from 5 v inputs to 3.3 v outputs. the cbtd3253 is characterized for operation from 40 to +85 c. pin configuration 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 1b4 1b3 1b2 1b1 1a 1oe gnd v cc s0 sa00574 s1 2oe 2b4 2b3 2b2 2b1 2a pin description pin number symbol name and function 1 1oe output enable 2 s1 select-control input 3, 4, 5, 6 1b[14] b outputs 7 1a a input 8 gnd ground (0 v) 9 2a a input 10, 11, 12, 13 2b[14] select-control input 14 s0 select-control input 15 2oe output enable 16 v cc positive supply voltage ordering information packages temperature range order code topside mark dwg number 16-pin plastic soic 40 to 85 c cbtd3253d cbtd3253 sot109-1 16-pin plastic ssop 40 to 85 c cbtd3253db cd3253 sot338-1 16-pin plastic ssop (qsop) 40 to 85 c cbtD3253DS cbd3253 sot519-1 16-pin plastic tssop 40 to 85 c cbtd3253pw cbd3253 sot403-1 standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 3 logic diagram (positive logic) sa00593 1a 1b1 1b2 1b3 1b4 2b1 2b2 2b3 2b4 sw sw sw sw sw sw sw sw 2a 7 s0 s1 1oe 2oe 9 14 2 1 15 6 5 4 3 10 11 12 13 function table inputs function oe1 oe2 s1 s0 function h x x x disconnect 1a x h x x disconnect 2a l l l l 1a to 1b1 and 2a to 2b1 l l l h 1a to 1b2 and 2a to 2b2 l l h l 1a to 1b3 and 2a to 2b3 l l h h 1a to 1b4 and 2a to 2b4
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 4 absolute maximum ratings 1 symbol parameter conditions rating unit v cc dc supply voltage 0.5 to +7.0 v v i dc input voltage 2 0.5 to +7.0 v continuous channel current 128 ma i k input clamp current v i/o < 0 50 ma t stg storage temperature range 65 to +150 c notes: 1. stresses beyond those listed may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. exposur e to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. the package thermal impedance is calculated in accordance with jesd 51-7. recommended operating conditions symbol parameter limits unit symbol parameter min max unit v cc dc supply voltage 4.5 5.5 v v ih high-level input voltage 2 e v v il low-level input voltage e 0.8 v t amb operating free-air temperature range 40 +85 c note: 1. all unused control inputs of the device must be held at v cc or gnd to ensure proper device operation. dc electrical characteristics limits symbol parameter test conditions t amb = 40 to +85 c unit min typ 1 max v ik input clamp voltage v cc = 4.5 v; i i = 18 ma e e 1.2 v v p pass voltage v i = v cc = 5.5 v; i/o = 100 ma 3.4 3.6 3.9 v i i input leakage current v cc = 5 v; v i = 5.5 or gnd e e 1 m a i cc quiescent supply current v cc = 5.5 v; i o = 0, v i = v cc or gnd e e 15 ma d i cc control inputs 2 v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd e e 1.5 ma c i control pins v i = 3 v or 0 e 4.5 e pf c o(o ) power off leakage current a port v o = 3 v or 0; oe = v cc e 23.5 e p f c io(off) po w er - off leakage c u rrent b port v o = 3 v or 0; oe = v cc e 6.5 e pf 3 v i = 0 v; i i = 64 ma e 5 7 r on 3 on-resistance v cc = 4.5 v v i = 0 v; i i = 30 ma e 5 7 w v i = 2.4 v; i i = 15 ma e 16 50 notes: 1. all typical values are at v cc = 5 v, t amb = 25 c. 2. this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd 3. measured by the voltage drop between the a and the b terminals at the indicated current through the switch. on-state resistance is determined by the lowest voltage of the two (a or b) terminals.
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 5 ac characteristics t amb = 40 to +85 c; c l = 50 pf to limits symbol parameter from (input) to (output) v cc = +5.0 v 0.5 v unit (output) min max t pro p agation delay 1 a or b b or a e 0.25 ns t pd propagation dela y 1 s a or b 1.6 11.0 ns t output enable time s aorb 1.6 11.0 ns t en to high and low level oe a or b 1.6 11.4 ns t output disable time s aorb 2.2 8 ns t dis from high and low level oe a or b 2.0 7 ns note: 1. the propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified l oad capacitance, when driven by an ideal voltage source (zero output impedance).
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 6 ac waveforms v m = 1.5 v, v in = gnd to 3.0 v input 1.5 v output t plh t phl 1.5 v 1.5 v 1.5 v 3 v 0 v v oh v ol sa00591 waveform 1. pulse duration output control (low-level enabling) 1.5 v t pzh t phz v oh v ol t pzl t plz 3.5 v 0 v v ol + 0.3v v oh 0.3v 1.5 v 1.5 v 3 v output waveform 1 s1 at 4.3 v (see note) note: waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. output waveform 2 s1 at open (see note) 0 v sa00592 1.5 v waveform 2. 3-state output enable and disable times notes: 1. t plz and t phz are the same as t dis . 2. t pzl and t pzh are the same as t en . 3. t plh and t phl are the same as t pd . test circuit and waveforms c l = 50 pf load circuit definitions c l = load capacitance includes jig and probe capacitance; see ac characteristics for value. test s1 t pd open t plz /t pzl 7 v t phz /t pzh open sa00590 from output under test s1 7 v open gnd 500 w 500 w notes: 1. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. 2. the outputs are measured one at a time with one transition per measurement.
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 7 typical characteristics 100 m a 24 ma 24 ma 12 ma temp = 85 c temp = 0 c temp = 25 c temp = 70 c temp = 40 c v cc supply voltage v cc supply voltage v cc supply voltage v cc supply voltage v cc supply voltage v p v p v p 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 3.4 3.2 3.0 2.8 2.6 2.4 2.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6 4.4 4.6 4.8 5.0 5.2 5.4 5.6 100 m a 100 m a 100 m a 100 m a 6 ma 6 ma 6 ma 6 ma 12 ma 12 ma 24 ma 24 ma 24 ma sw00895 3.8 12 ma 12 ma 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 6 ma 2.0 v p v p 2.0 figure 1. v oh values (v in = v cc )
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 8 so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 9 ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 10 ssop16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm sot519-1
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 11 tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1
philips semiconductors preliminary data cbtd3253 dual 1-of-4 fet multiplexer/demultiplexer with level shifting 2002 sep 09 12 definitions short-form specification e the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition e limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the dev ice at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limi ting values for extended periods may affect device reliability. application information e applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support e these products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use i n such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes e philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors ass umes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or m ask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right in fringement, unless otherwise specified. philips semiconductors 811 east arques avenue p.o. box 3409 sunnyvale, california 940883409 telephone 800-234-7381 ? copyright philips electronics north america corporation 2001 all rights reserved. printed in u.s.a. date of release: 08-01 document order number: philips semiconductors data sheet status [1] objective data preliminary data product data product status [2] development qualification production definitions this data sheet contains data from the objective specification for product development. philips semiconductors reserves the right to change the specification in any manner without notice. this data sheet contains data from the preliminary specification. supplementary data will be published at a later date. philips semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. this data sheet contains data from the product specification. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. changes will be communicated according to the customer product/process change notification (cpcn) procedure snw-sq-650a. data sheet status [1] please consult the most recently issued datasheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com.

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