cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 1/6 BTC3097T3 cystek product specification high voltage npn triple di ffused planar transistor BTC3097T3 features ? high voltage, bv cbo =1600v min., bv ceo =800v min. ? pb-free lead plating package symbol outline absolute maximum ratings (ta=25 c) parameter symbol limit unit collector-base voltage v cbo 1600 v collector-emitter voltage v ceo 800 v emitter-base voltage v ebo 6 v i c (dc) 1 a collector current i c (pulse) 3 *1 a p d (ta=25 ) 1 power dissipation p d (tc=25 ) 10 w operating junction and storage temp erature range tj ; tstg -55~+150 c note : *1. single pulse pw 3 Q 00 s,duty 2% Q . to-126 BTC3097T3 b base c collector e emitter b c e
cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 2/6 BTC3097T3 cystek product specification characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv cbo 1600 - - v i c =100 a, i e =0 bv ceo 800 - - v i c =1ma, i b =0 bv ebo 6 - - v i e =100 a, i c =0 i cbo - - 10 a v cb =1600v, i e =0 i ceo - - 10 a v cb =800v, i b =0 i ebo - - 100 na v eb =6v, i c =0 *v ce(sat) - - 0.2 v i c =200ma, i b =40ma *v ce(sat) - - 0.35 v i c =500ma, i b =100ma *v be(sat) - - 1.2 v i c =500ma, i b =100ma *h fe 1 20 - - - v ce =5v, i c =10ma *h fe 2 24 - 35 - v ce =5v, i c =100ma *h fe 3 5 - - - v ce =5v, i c =500ma cob - 10 - pf v cb =10v, f=1mhz tr - - 0.8 tstg - - 3 tf - - 0.4 s v cc =400v, i c =0.5a, i b 1=0.1a i b 2=-0.2a *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping BTC3097T3 to-126 (pb-free lead plating package) 200 pcs / bag, 10 bags/box, 10 boxes/carton
cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 3/6 BTC3097T3 cystek product specification typical characteristics emitter grounded output characteristics 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0123456 collector-to-emitter voltage---vce(v) collector current---ic(a) 200u a 300u a 400u a 500ua 1ma ib=100ua emitter grounded output characteristics 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0123456 collector-to-emitter voltage---vce(v) collector current---ic(a) 1ma 1.5ma 2ma 2.5ma 5ma ib=500ua emitter grounded output characteristics 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0123456 collector-to-emitter voltage---vce(v) collector current---ic(a) ib=2m a 4ma 6ma 8m a 10ma 20ma emitter grounded output characteristics 0 0.1 0.2 0.3 0.4 0.5 0.6 0123456 collector-to-emitter voltage---vce(v) collector current---ic(a) ib=5ma 10ma 15ma 20ma 50m a current gain vs collector current 1 10 100 1 10 100 1000 10000 collector current---ic(ma) current gain---hfe vce=1v vce=2v vce=5v saturation voltage vs collector current 10 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vcesat@ic=5ib
cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 4/6 BTC3097T3 cystek product specification typical characteristics(cont.) saturation voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) saturation voltage---(mv) vbesat@ic=5ib capacitance vs reverse-biased voltage 1 10 100 1000 0.1 1 10 100 reverse-biased voltage---vr(v) capacitance---(pf) cib cob onn voltage vs collector current 100 1000 10000 1 10 100 1000 10000 collector current---ic(ma) on voltage---(mv) vbeon @ vce=5v power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 0 50 100 150 200 ambient temperature---ta() power dissipation---pd(w) power derating curve 0 2 4 6 8 10 12 0 50 100 150 200 case temperature---tc() power dissipation---pd(w)
cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 5/6 BTC3097T3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c6633 issued date : 2012.01.19 revised date : page no. : 6/6 BTC3097T3 cystek product specification to-126 dimension *: typical millimeters inches millimeters inches style: pin 1.base 2.collector 3.emitter 3-lead to-126 plastic package cystek package code: t3 marking: c3097 date code dim min. max. min. max. dim min. max. min. max. a 2.500 2.900 0.098 0.114 e *2.290 *0.090 a1 1.100 1.500 0.043 0.059 e1 4.480 4.680 0.176 0.184 b 0.660 0.860 0.026 0.034 h 0.000 0.300 0.000 0.012 b1 1.170 1.370 0.046 0.054 l 15.300 15.700 0.602 0.618 c 0.450 0.600 0.018 0.024 l1 2.100 2.300 0.083 0.091 d 7.400 7.800 0.291 0.307 p 3.900 4.100 0.154 0.161 e 10.600 11.000 0.417 0.433 3.000 3.200 0.118 0.126 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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