MP2004 dual, low noi se, high psrr 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 1 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. the future of analog ic technology descri ption the mp200 4 is a dual-channel, lo w noise, low dropout and high psrr linear regulator. the output voltage of mp20 04 ranges from 1.2v t o 5v and 1% accuracy by operating from a +2.5v to +6.0v input. the MP2004 can supply up to 200ma of load current a t each chan nel. the mp200 4 uses an internal pmos as the pass element, which consumes 114 a supply current (bot h ldos on) at no loa d condit i on. the en1 a nd en2 pi ns control each output respectively. when bot h channels shutdown simultaneously, the ch i p will be tur ned off and consume ne arly zero op eration curr ent which is suitable for battery-power devices. the mp200 4 features cur r ent limiting and over t e mperature protection. i t i s a v a i l a b l e i n a s m al l 6 - pi n t s ot 23 pa ck ag e . features ? two ldos i n a tsot23 -6 package ? up to 200ma output cu rrent (per channel ? two enable pins control each output ? 69db psrr (100hz) ? 95 v rm s low noise output ? 110mv dro pout at 100 ma load ? very fast t r ansient responses wit h small output cap a citor ? current limiting and the rmal protection appli c ations ? cellular phones ? laptop pcs ? hand-held equipment ? netbook computing ?mp s ? and ?th e fu ture o f a nal og ic t e chno lo gy ? are r e g i ste r ed t r a dem ar ks o f monolithic pow e r sy st em s , inc. typical application en 2 en 1 ou t 2 ou t1 in gn d out2 out1 en 1 en 2 MP2004 c in c ou t 2 c ou t 1 in http://
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 2 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. ordering information* part number v out1 v out2 package temperature top marking MP2004dj-jg-lf-z 2.5v 1.8v 2b MP2004dj-zs-lf-z 5.0v 3.3v 2l MP2004dj-pn-lf-z 3.0v 2.85v 3l MP2004dj-dd-lf-z 1.85v 1.85v 4l MP2004dj-sj-lf-z 3.3v 2.5v 5l MP2004dj-mg-lf-z 2.8v 1.8v tsot23 -6 -40 c to +85 c 6l * o t her output vo ltage versions betw e en 1.2v an d 5.0v are ava ilable in 100mv increments. contact f a ctory fo r availability . ordering guide** MP2004dj- -lf-z v out2 v out1 package t ype j: tsot23-6 ** for rohs co mpliant packaging, add suffi x - lf (e.g. MP2004dj - -lf); for tape and reel, add suffix -z (e.g. MP2004dj- - lf-z ). output voltage selector guide*** code v out code v out c 1.2 t 2.65 b 1.3 l 2.7 f 1.5 m 2.8 w 1.6 n 2.85 g 1.8 v 2.9 d 1.85 p 3.0 y 1.9 q 3.1 h 2.0 x 3.15 e 2.1 r 3.2 j 2.5 s 3.3 k 2.6 z 5.0 *** code in bold are standard versions. for other output voltages between 1.2v and 5.0v contact factory for availability. minimum order quantity on non-standard versions is 25,000 units. package reference out1 t op view in en1 en2 gnd 12 3 4 5 6 out2
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 3 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. absolute m a xi mum ratings (1) supply input voltage ................................. 6.5v continuous power dissipation (t a = +25c) (2) ........................................................... 0.45w operation temperature range ... -40c to 85c storage temperature range ..... -65c to 150c lead temperature (soldering, 10se c ) ..... 260c recommended operating conditions (3) supply input voltage ....................... 2.5v to 6.0v enable input voltage ......................... 0v to 6.0v junction te mperature range . ?40 c to +125 c thermal resistance (4) ja jc tsot23-6 .............................. 220 .... 110. . c/w notes : 1) exceeding these ratings may ca use permanent damage to the device. 2) the ma ximum allowable po w e r dissipation is a fun c tion of the maximum junction tempe r ature t j (max), the junction-to- ambient therm a l resistance ja , a nd the a m bient t e mperatu r e t a . the ma ximu m allow able cont inuous po w e r di ssipation at an y ambient tem peratur e is calculated b y p d (max)=(t j (max)- t a )/ ja . exceedi ng the m a ximum allow a ble po w e r dissipation w ill cause ex cessive die temperature, and the reg u l ator w ill go into thermal sh utdo w n . inte rnal thermal shutdo w n circuitr y protects the device from perma ne nt damage. 3) the device is no t guara n teed to f unction outside its operatin g conditions. 4) measured on jesd51-7 4-layer board.
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 4 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. electri c al characteristi cs v in =3.6v, v out1 =2.5v, v out2 =1.8v, c in =c out1 =c out2 =2.2uf, en1=en2=v in , t y pi cal value at t a =25 c for each ldo unless otherw i se not ed. notes : 5) load regulation= 100(%) v v v out(nom) ] out[i ] out[i out(min) out(max) ? 6) dropout voltag e is defined as the input to output dif f erent ial w hen th e output voltage drops 100mv bel ow its nominal va lue. 7) line regulation= ) 100(%/v v ] v [v v v out(nom) in(min) in(max) ] out[v ] out[v in(min) in(max) ? ? pin functio n s pin # name description 1 vout2 channel 2 output voltage 2 gnd common ground 3 en2 channel 2 enable (active high). do not float this pin. 4 en1 channel 1 enable (active high). do not float this pin. 5 vin supply input pin 6 vout1 channel 1 output voltage parameter symbol condition min typ max units output voltag e accu ra cy (loa d re gulati on) (5) v out i load = 1ma to 200ma -1 +1 % maximum output current i ma x contin uou s 200 ma current limit i li m r load =1 450 ma quie scent cu rre nt i q no lo ad 114 ua i out 1 = 100m a 110 mv dro pout volta ge (6) v drop i out 1 = 200m a 250 mv line regulation (7) ? v line v in =(v out +0.4v or 2.5v) to 6v, i ou t =1 ma -0.05 + 0 .05 % /v en input hig h thre sh old v ih v in = 2.5v to 6.0v 1.6 v en input low thre shol d v il v in = 2.5v to 6.0v 0.45 v en input bias current i sd en= v in =6.5 v 300 na shutdown su pply curre n t i gsd en1 = en2 = gnd 0.03 1 ua therm a l shut down temp erature t sd 140 c therm a l shut down hyste r e s is t sd 10 c output voltag e noi s e 10hz to 100 khz, c out =2. 2 f, i load =1ma 95 v rm s output psrr 100 hz, c ou t = 2. 2 f, i load = 100m a 69 db
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 5 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. typical perfo r manc e characteristics v in =3.6v, v out1 =2.5v, v out2 =1.8v, c in =c out1 =c out2 =2.2uf, en1=en2=v in , t y pi cal value at t a =25 c for both ch annel enabled. 0 20 40 60 80 100 120 100 1000 10000 100000 1000000 frequency(hz) channel-to-channel isolation vs. frequency -4 0 -2 0 0 2 0 4 0 6 0 8 5 quiescent current vs. temperature 200 150 100 50 0 dropout voltage vs. temperature -4 0 -2 0 0 2 0 4 0 6 0 8 5 out voltage accuracy vs. temperature 0 10 20 30 40 50 60 70 80 10 100 1000 10000 100000 1000000 frequency(hz) power supply rejection ratio vs. frequency v out 10mv/div v in 1v/div v out 10mv/div i load 50ma/div v out 1v/div v en 5v/div 200 220 240 260 280 300 -4 0 -2 0 0 2 0 4 0 6 0 85 i load =200ma -0 . 2 5 -0 . 2 0 -0 . 1 5 -0 . 1 0 -0 . 0 5 0. 00 0. 05 0. 10 0. 15 0. 20 0. 25
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 6 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. block diagram figure1?functional block diagram operation the mp20 04 integrat es two low noise, low dropout, lo w quiescent current an d high psrr linear regula t ors. it is int ended for use in device s that require very low voltage, low quiesce nt current power such as wireless lan, battery- powered equipment and hand-held equipment. the mp200 4 uses inte rnal pmoss as the pa ss ele m ents and features internal therm a l shutdown and an internal current lim it circuit. dropout vo ltage dropout volt age is the minimu m input to output differential voltage required for th e regulator to maintain an output volt age within 100mv of it s nominal val ue. because the pmos pass element behaves as a low-value resistor, the dropout voltage of MP2004 is very low. shutdow n the mp200 4 can be switched on or off by a logic input at the en p i n. a high voltage at this pin will turn the device on. when the en pin is low, the reg u lator output is off. the en pin shou ld be tied to vi n to keep th e regulator output alwa ys on if the applicat io n does no t require t he shutdown feature. do not float the e n pin. current li mit the mp200 4 includes t w o independent current limit structu r es which monitor and control ea ch pmos?s gate voltage limiting the guaranteed maxi mum o u tput curren t to 200ma. thermal protection thermal protection turn s off the pmos when the junction te mperature exceeds +140oc, allowing the ic to cool. w hen the i c ?s junct i o n temperature drops by 10oc, the pmos will be turned on again. thermal protectio n limits tota l power dissipation in th e MP2004. for reliable operation, ju nction temp erature sho u ld be limite d to 125 oc maximu m. load-transient considerations the output r e sponse of load-transien t consists of a dc shift and transie nt response . because of the excellent load regulation of MP2004, the dc shift is very small. the output voltage transie nt depends on the output capacitor?s value and the esr. increasing the cap acitance an d decreasin g the esr will improve the transie nt response. typical output voltage transient spike of MP2004 for a step ch ange in the load current from 0ma to 80ma is tens mv.
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 7 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. appli c ation information pow e r diss ipation the power dissipat ion f o r any package depend s on the thermal resistan ce of the ca se and circu i t board, the temperature difference between the junction and ambient air, and the ra te of airflow . the power dissipat ion across the device can be represented by the equation: p = (v in - v out ) i out the allowable power dissipation can be calculated u s ing the following equation: p (max ) = (t ju nc t i on - t ambien t ) / ja where (t ju ncti on - t amb i ent ) is t h e temperature difference between the junctio n and th e surrounding environment, ja is the ther ma l resistance from the junction to the ambient environment . connect th e gnd pin o f MP2004 to ground usin g a large pad or ground plane helps to channel h eat away. input capacitor selection using a capacitor whose value is >0.47f on t he MP2004 in put and the amount of capacita n ce can be incr eased without limit. larger values will help to improve line transient resp onse with the drawback of increased size . ceram i c capacitors are preferred, but tantalum c a p acitors m a y also suffice. output cap acitor selection the mp200 4 is designe d specifica l ly to work wi th very low esr ceramic o u tput capacitor in space - saving and performance consideration. a ceramic capacitor in t he range of 0.47f a nd 10f, and with esr lower than 1.2 ? is su itab le for the MP2004 application cir c uit. outpu t capacitor of larger values will help to improve load transie nt response and reduce noise wit h the drawback of increa sed size. lo ad current (ma) unstable stable 0. 1 1 10 100 0 4 0 80 120 160 200 figure 2?relationship between esr and ldo stabili ty reverse cu rrent path the pmos used in the MP2004 ha s an inhere n t diode conn ected betwe en input an d output ( s e e figure3). if v out -v in is more than a diode-drop, this diode gets forward biased and starts t o conduct. t o avoid mi soperation, an extern al schottky connected in parallel with the interna l parasitic dio de prevents it from being turned o n by limiting t he voltage drop across it to about 0.3v (see figure 4). figure 3?inherent diode connected bet w een each regulator input and output figure 4?external schottk y diode connected in parallel w i th the int e rnal paras i tic diode
MP2004-dual, l o w noise, high psrr, 200ma linear regulator MP2004 rev. 0. 92 www.monolithicpower.com 8 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. pcb la y o u t guide pcb layout is very important to achieve good regulatio n, ripple rejection, tran sient respo n se and thermal performance. it is highly recommended t o duplicate evb layout f o r optimum performance. if change is necessary, please follo w these guidelines and take figure 5 for reference. 1) input and o u tput bypass ceramic capacitors ar e suggested to be put close to the i n pin and out pin respectively. 2) ensure all feedback connection s are short and direct. place th e feedback resistor s and compensation components as close to the chip a s possib l e. 3) connect in, out and especially gnd respe c tively to a large copp er area to cool the chip to improve thermal performance and lo ng-term reliability. in r1 r2 en1 en2 ou t1 out2 gn d out1 MP2004 c out2 c ou t 1 in en1 en2 c in out2 1 2 34 5 out2 en2 gnd en1 in 6 out1 top lay e r figure 5?pcb la y out
MP2004-dual, l o w noise, high psrr, 200ma linear regulator notice: t he i n formatio n in this docum ent i s subject to chang e w i t h o u t notice. users sh oul d w a rra nt and gu arante e that third part y int e ll ectu al prop ert y r i g h ts are n o t inf r ing ed u p o n w hen i n tegr atin g mps product s into an y ap p licatio n. mps w i ll not assume a n y le gal res pons ib ili t y for an y sai d app licati ons. MP2004 rev. 0. 92 www.monolithicpower.com 9 4/6/2010 mps proprietar y information. un a u t horized photoc op y and duplication prohibited. ? 2010 mps. all rights reserved. package informati o n tsot23-6 0. 30 0. 50 seating plane 0.95 bsc 0.8 4 0.90 1.00 max 0.00 0.10 top view front view side view recommended land pattern 2.80 3.00 1.50 1.70 2.60 3.00 1 3 4 6 0.09 0.20 note: 1) a l l di me nsi o n s ar e in mi lli m eter s. 2) p a c kag e len g t h do es no t in clu d e m o ld f l as h, pr ot r u s i on or g a t e b u r r . 3) p a c kag e w i d t h do es no t in clu d e i n te rle a d fl ash or p r o t ru s ion . 4) le ad co p l an ar ity ( b o t to m o f le ad s afte r fo rm in g) s hal l b e 0.1 0 m i l l im et ers m ax . 5) d r a w i n g co nfo r m s to je dec m o - 193 , va ri ati o n a b . 6 ) dr aw in g i s no t t o s c a l e. 7 ) pi n 1 i s lo we r le f t p i n wh e n re ad in g t o p m a r k f r o m le ft to ri gh t, ( se e exa mp le to p m a rk) 0.30 0.50 0 o -8 o 0. 25 b s c gauge plane 2.60 typ 1.20 typ 0.95 bsc 0.60 typ see d e ta il "a" detail ?a? aaaa pi n 1 s ee note 7 ex am pl e to p ma rk
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