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  product specification (preliminary) part name: oel display module part id: UG-2828GDEDF13 doc no.: sas1-d037-a customer: approved by from: univision technology inc. approved by u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . 8, kebei rd 2, science park, chu-nan, taiwan 350, r.o.c. notes: 1. please contact univision technology inc. befo re assigning your pr oduct based on this module specification 2. the information contained herein is presente d merely to indicate the characteristics and performance of our products. no respons ibility is assumed by univision technology inc. for any intellectual property claims or other problems that may result from application based on the module described herein. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a i r r e e v v i i s s e e d d h h i i s s t t o o r r y y part number revision revision content revised on UG-2828GDEDF13 a new october 15, 2008 free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a ii n n o o t t i i c c e e : : no part of this material may be reproduces or duplicated in any form or by any means without the written permissi on of univision technology inc. univision technology inc. reserves the right to make changes to this material without notice. univision technology inc. does not assume any liability of any kind aris ing out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or wa rranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. this material or portions thereo f may contain technology or the subject relating to strategic products under the control of foreign exchange and foreign trade law of taiwan and may require an export license from the ministry of in ternational trade and industry or other approval fr om another government agency. ? univision technology inc. 2008, all rights reserved. all other product names mentioned herein are tr ademarks and/or registered trademarks of their respective companies. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a iii c c o o n n t t e e n n t t s s r r e e v v i i s s i i o o n n h h i i s s t t o o r r y y ................................................................................................... i n n o o t t i i c c e e ................................................................................................................... ii c c o o n n t t e e n n t t s s .............................................................................................................. iii 1 1 . . b b a a s s i i c c s s p p e e c c i i f f i i c c a a t t i i o o n n s s .................................................................................. 1~6 1.1 display specifications .................................................................................................1 1.2 mechanical specifications ...........................................................................................1 1.3 active area & pixel construction ...............................................................................1 1.4 mechanical drawing....................................................................................................2 1.5 pin definition............................................................................................................. ..3 1.6 block diagram .............................................................................................................6 2 2 . . a a b b s s o o l l u u t t e e m m a a x x i i m m u u m m r r a a t t i i n n g g s s .......................................................................... 7 3 3 . . o o p p t t i i c c s s & & e e l l e e c c t t r r i i c c a a l l c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s ......................................................... 8~12 3.1 optics characteristics ..................................................................................................8 3.2 dc characteristics .......................................................................................................8 3.3 ac characteristics .......................................................................................................9 3.3.1 68xx-series mpu parallel in terface timing characteristics ...........................9 3.3.2 80xx-series mpu parallel in terface timing characteristics .........................10 3.3.3 serial interface timing characteristics (4-wire spi).......................................11 3.3.4 serial interface timing characteristics (3-wire spi).......................................12 4 4 . . f f u u n n c c t t i i o o n n a a l l s s p p e e c c i i f f i i c c a a t t i i o o n n ....................................................................... 13~14 4.1 commands .................................................................................................................13 4.2 power down and power up sequence ........................................................................13 4.2.1 power up sequence ..........................................................................................13 4.2.2 power down sequence .....................................................................................13 4.3 reset circuit.............................................................................................................. .13 4.4 actual application example ......................................................................................14 5 5 . . r r e e l l i i a a b b i i l l i i t t y y...................................................................................................... 15 5.1 contents of reliability tests......................................................................................15 5.2 lifetime................................................................................................................... ...15 5.3 failure check standard..............................................................................................15 6 6 . . o o u u t t g g o o i i n n g g q q u u a a l l i i t t y y c c o o n n t t r r o o l l s s p p e e c c i i f f i i c c a a t t i i o o n n s s.............................................. 16~20 6.1 environment required ...............................................................................................16 6.2 sampling plan ............................................................................................................16 6.3 criteria & acceptable quality level .........................................................................16 6.3.1 cosmetic check (display off) in non-active area ........................................16 6.3.2 cosmetic check (display off) in active area.................................................19 6.3.3 pattern check (display on) in active area.....................................................20 7 7 . . p p a a c c k k a a g g e e s s p p e e c c i i f f i i c c a a t t i i o o n n s s ................................................................................ 21 free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a iv 8 8 . . p p r r e e c c a a u u t t i i o o n n s s w w h h e e n n u u s s i i n n g g t t h h e e s s e e o o e e l l d d i i s s p p l l a a y y m m o o d d u u l l e e s s....................... 22~24 8.1 handling precautions .................................................................................................22 8.2 storage precautions....................................................................................................23 8.3 designing precautions ...............................................................................................23 8.4 precautions when disposing of the oel display modules.........................................24 8.5 other precautions.......................................................................................................24 free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 1 1 1 . . b b a a s s i i c c s s p p e e c c i i f f i i c c a a t t i i o o n n s s 1.1 display specifications 1) display mode: passive matrix 2) display color: 262,144 colors (maximum) 3) drive duty: 1/128 duty 1.2 mechanical specifications 1) outline drawing: according to the annexed outline drawing 2) number of pixels: 128 (rgb) 128 3) panel size: 33.80 34.00 1.60 (mm) 4) active area: 26.855 26.864 (mm) 5) pixel pitch: 0.07 0.21 (mm) 6) pixel size: 0.045 0.194 (mm) 7) weight: 3.74 (g) 1.3 active area & pixel construction detail "a" scale (10:1) 0.045 0.07 0.194 0.21 0.185 0.21 r g b p0.21x128-0.016=26.864 (a/a) p0.07x(128x3)-0.025=26.855 (a/a) segment c127 ( column 384 ) common 64 ( row 127 ) common 127 ( row 1 ) segment a0 ( column 1 ) common 0 ( row 128 ) common 63 ( row 2 ) free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 2 1.4 mechanical drawing contact side protective film 25x6.7x0.1mm polarizer t=0.2mm remove tape t=0.15mm max active area 1.50" 128(rgb) x 128 pixels 33.80.2 (cap size) 33.80.2 (panel size) 28.855 (v/a) (3.472) (2.472) 28.864 (v/a) p0.21x128-0.016=26.864 (a/a) p0.07x(128x3)-0.025=26.855 (a/a) 320.2 (cap size) 340.2 (panel size) 32.5 (polarizer) 8 0.650.5 5 (2.1) (1.1) 0.50.5 30.5 (polarizer) 140.2 p0.75x(39-1)=28.50.05 (w0.40 0.03) 310.2 39 notes: 1. driver ic: ssd1351 2. die size: 10700um x 1500um 3. cof number: ssd1351u2 4. interface: 8-/16-/18-bits 68xx/80xx parallel, 3-/4-wire spi 5. general tolerance: 0.30 6. the total thickness (1.70 max) is without polarizer protective film & remove tape. the actual assembled total thickness with above materials should be 1.95 max. 0.80 max 0.1 (reference mechnical design) (8.7) (5.05) (23.25) (30.61) 1.60.1 0.2 1.4 3 80.1 4.50.1 vcc vcomh iref vlss vdd e/rd# r/w# d/c# res# cs# bs 0 vddio vci vsl n.c. (gnd) "a" detail "a" scale (10:1) 0.045 0.07 0.194 0.21 0.185 0.21 r g b 10 (1.4) (48) glue 8 cs# r/w# e/rd# symbol vlss 2 5 7 6 4 3 1 pin 9 10 d/c# the drawing contained herein is the exclusive property of univision. it is not allowed to copy, reproduce and or disclose in a ny formats without permission of univision. univision technology inc. UG-2828GDEDF13 folding type oel display module pixel number: 128(rgb) x 128, 262144 colors, cof package 0.3 mm unless otherwise specified unit tolerance angle dimension general roughness title date by drawn drawing number 1 of 1 sheet material panel / e. e.e. 1:1 scale a3 size date item remark rev. soda lime / polyimide customer approval signature 1 a 20080808 dfe2828hbcf37 humphrey lin 20080808 a original drawing p.m. 18 n.c. (gnd) iref res# vdd d8 12 15 17 16 14 13 11 vcomh 19 20 d9 d10 d11 d12 d13 d14 d15 vcc 28 22 25 27 26 24 23 21 29 30 32 35 36 34 33 31 n.c. (gnd) d0 d1 d2 d3 d4 d5 d6 d7 bs0 vddio vci vsl (42.7) (1.6) (1.6) (35.6) (1.8) segment c127 ( column 384 ) common 64 ( row 127 ) common 127 ( row 1 ) segment a0 ( column 1 ) common 0 ( row 128 ) common 63 ( row 2 ) d16 d17 bs1 38 37 39 d17 bs 1 280.1 1 n.c. (gnd) d16 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 7.355 9.7 13 vs s n.c. gpio0 n.c. vss n.c. gpio0 n.c. 20080808 sean lai 20080808 ivy lo 20080808 cherry lin 4-r0.50.05 free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 3 1.5 pin definition pin number symbol type function p p o o w w e e r r s s u u p p p p l l y y 36 vci p p p o o w w e e r r s s u u p p p p l l y y f f o o r r o o p p e e r r a a t t i i o o n n this is a voltage supply pin. it must b e connected to external source & always b e equal to or higher than vdd & vddio. 33 vdd p p p o o w w e e r r s s u u p p p p l l y y f f o o r r c c o o r r e e l l o o g g i i c c c c i i r r c c u u i i t t this is a voltage supply pin which is regulated internall y from vci. a capacitor should be connected between this pin & vss under all circumstances. 4 vddio p p p o o w w e e r r s s u u p p p p l l y y f f o o r r i i / / o o p p i i n n this pin is a power supply pin of i/o buffer. it shoul d be connected to vci or exte rnal source. all i/o signal should have vih reference to vddio. when i/o signal pins (bs0~bs1, d0~d17, control signals?) pull high, they should be co nnected to vddio. 37 vss p g g r r o o u u n n d d o o f f l l o o g g i i c c c c i i r r c c u u i i t t this is a ground pin. it also acts as a reference for the logic pins. it must be connected to external ground. 2 vcc p p p o o w w e e r r s s u u p p p p l l y y f f o o r r o o e e l l p p a a n n e e l l this is the most positive voltage supply pin of the chip. it must be connected to external source. 38 vlss p g g r r o o u u n n d d o o f f a a n n a a l l o o g g c c i i r r c c u u i i t t this is an analog ground pin. it should be connected to vss externally. d d r r i i v v e e r r 32 iref i c c u u r r r r e e n n t t r r e e f f e e r r e e n n c c e e f f o o r r b b r r i i g g h h t t n n e e s s s s a a d d j j u u s s t t m m e e n n t t this pin is segment current reference pin. a resisto r should be connected between this pin and vss. set the current lower than 12.5ua. 3 vcomh p v v o o l l t t a a g g e e o o u u t t p p u u t t h h i i g g h h l l e e v v e e l l f f o o r r c c o o m m s s i i g g n n a a l l this pin is the input pin for the voltage output high level for com signals. a tantalum capacitor should be connected between this pin and vss. 5 vsl p v v o o l l t t a a g g e e o o u u t t p p u u t t l l o o w w l l e e v v e e l l f f o o r r s s e e g g s s i i g g n n a a l l this is segment voltage reference pin. when external vsl is not used, this pin should b e lef t open. when external vsl is used, this pin should connect wit h resistor and diode to ground. e e x x t t e e r r n n a a l l i i c c c c o o n n t t r r o o l l 34 gpio0 i/o g g e e n n e e r r a a l l p p u u r r p p o o s s e e i i n n p p u u t t / / o o u u t t p p u u t t these pins could be left open individually or have signal inputted/outputted. they are able to use as the external dc/dc converter circuit enabled/disabled control or othe r applications. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 4 1.5 pin definition (continued) pin number symbol i/o function i i n n t t e e r r f f a a c c e e 26 27 bs0 bs1 i c c o o m m m m u u n n i i c c a a t t i i n n g g p p r r o o t t o o c c o o l l s s e e l l e e c c t t these pins are mcu interface selection input. see the following table: bs0 bs1 3-wire spi 1 0 4-wire spi 0 0 68xx-parallel (8-/16-/18-bit) 1 1 80xx-parallel (8-/16-/18-bit) 0 1 set the command abh for the mcu bus interface as 8- b i t (default) or 16-/18-bit. 31 res# i p p o o w w e e r r r r e e s s e e t t f f o o r r c c o o n n t t r r o o l l l l e e r r a a n n d d d d r r i i v v e e r r this pin is reset signal input. when the pin is low, initialization of the chip is executed. 29 cs# i c c h h i i p p s s e e l l e e c c t t this pin is the chip select input. the chip is enabled fo r mcu communication only when cs# is pulled low. 30 d/c# i d d a a t t a a / / c c o o m m m m a a n n d d c c o o n n t t r r o o l l this pin is data/command control pin. when the pin is pulled high, the input at d17~d0 is treated as displa y data. when the pin is pulled low, the input at d17~d0 will be transferred to the command register. for detail relationship to mcu interface signals, please refer to the timing characteristics diagrams. when 3-wire serial mode is selected, this pin must be connected to vss. 24 e/rd# i r r e e a a d d / / w w r r i i t t e e e e n n a a b b l l e e o o r r r r e e a a d d this pin is mcu interface input. when interfacing to a 68xx-series microprocessor, th is pin will be used as the enable (e) signal. read/write operation is initiated whe n this pin is pulled high and the cs# is pulled low. when connecting to an 80xx-microprocessor, this pi n receives the read (rd#) signal. data read operation is initiated when this pin is pulled low and cs# is pulle d low. when serial mode is selected , this pin must be connecte d to vss. 25 r/w# i r r e e a a d d / / w w r r i i t t e e s s e e l l e e c c t t o o r r w w r r i i t t e e this pin is mcu interface input. when interfacing to a 68xx-series microprocessor, this pin will be used as read/write (r/w#) selection input. pull this pin to ?high? for read mode and pull it to ?low? for write mode. when 80xx interface mode is selected, this pin will be the write (wr#) input. data write operation is initiate d when this pin is pulled low and the cs# is pulled low. when serial mode is selected , this pin must be connecte d to vss. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 5 1.5 pin definition (continued) pin number symbol i/o function i i n n t t e e r r f f a a c c e e ( ( c c o o n n t t i i n n u u e e d d ) ) 6~23 d17~d0 i/o h h o o s s t t d d a a t t a a i i n n p p u u t t / / o o u u t t p p u u t t b b u u s s these pins are 18-bit bi-directional data bus to be connected to the microprocesso r?s data bus. when serial mode is selected, d1 will be the serial data input sdin and d0 will be the serial clock input sclk. unused pins must be connected to vss except for d2. r r e e s s e e r r v v e e 28, 35 n.c. - r r e e s s e e r r v v e e d d p p i i n n the n.c. pins between function pins are reserved fo r compatible and flexible design. 1, 39 n.c. (gnd) - r r e e s s e e r r v v e e d d p p i i n n ( ( s s u u p p p p o o r r t t i i n n g g p p i i n n ) ) the supporting pins can reduce the influences fro m stresses on the function pins. these pins must be connected to external ground. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 6 1.6 block diagram r1 c3 ~ ~ common 63 ssd1351 common 0 ~~~ common 64 ~ common 127 active area 1.50" 128(rgb) x 128 pixels iref bs0 c4 vdd c7 c5 c6 c1 c2 r2 d1 vlss segment a0 segment c127 vcc vcomh vsl d17 d0 e/rd# r/w# d/c# res# cs# gpio0 bs1 vddio vci vss mcu interface selection: bs0 and bs1 pins connected to mcu interface: d17~d0, e/rd#, r/w#, cs#, d/c#, and res# c1, c5: 0.1 f c2: 4.7 f c6: 10 f c3, c4: 1 f c7: 4.7uf / 25v tantalum capacitor r1: 560k , r1 = (voltage at iref ? vss) / iref r2: 50 , 1/4w d1: 1.4v, 0.5w free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 7 2 2 . . a a b b s s o o l l u u t t e e m m a a x x i i m m u u m m r r a a t t i i n n g g s s parameter symbol min max unit notes supply voltage for operation v ci -0.3 4 v 1, 2 supply voltage for logic v dd -0.5 2.75 v 1, 2 supply voltage for i/o pins v ddio -0.5 v ci v 1, 2 supply voltage for display v cc -0.5 16 v 1, 2 operating temperature t op -30 70 c - storage temperature t stg -40 80 c - note 1: all the above voltages are on the basis of ?vss = 0v?. note 2: when this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur. also, for normal operations, it is desirable to use this module under the conditions according to section 3. ?optics & electrical charac teristics?. if this m odule is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 8 3 3 . . o o p p t t i i c c s s & & e e l l e e c c t t r r i i c c a a l l c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s 3.1 optics characteristics characteristics symbol conditions min typ max unit brightness (white) l br with polarizer (note 3) 70 90 - cd/m 2 c.i.e. (white) (x) (y) with polarizer 0.26 0.29 0.30 0.33 0.34 0.37 c.i.e. (red) (x) (y) with polarizer 0.60 0.30 0.64 0.34 0.68 0.38 c.i.e. (green) (x) (y) with polarizer 0.27 0.58 0.31 0.62 0.35 0.66 c.i.e. (blue) (x) (y) with polarizer 0.10 0.12 0.14 0.16 0.18 0.20 dark room contrast cr - >2000:1 - view angle >160 - - degree * optical measurement taken at v ci = 2.8v, v cc = 13v. software configuration follows section 4.4 initialization. 3.2 dc characteristics characteristics symbol conditions min typ max unit supply voltage for operation v ci 2.4 2.8 3.5 v supply voltage for logic v dd 2.4 2.5 2.6 v supply voltage for i/o pins v ddio 1.65 1.8 v ci v supply voltage for display v cc note 3 12.5 13 13.5 v high level input v ih 0.8 v ddio - v ddio v low level input v il 0 - 0.2 v ddio v high level output v oh i out = 100 a, 3.3mhz 0.9 v ddio - v ddio v low level output v ol i out = 100 a, 3.3mhz 0 - 0.1 v ddio v operating current for v ci i ci - 240 300 a note 4 - 23.2 29.0 ma operating current for v cc i cc note 5 - 33.4 41.8 ma sleep mode current for v ci i ci, sleep - 1 5 a sleep mode current for v cc i cc, sleep - 1 5 a note 3: brightness (l br ) and supply voltage for display (v cc ) are subject to the change of the panel characteris tics and the customer?s request. note 4: v ci = 2.8v, v cc = 13v, 50% display area turn on. note 5: v ci = 2.8v, v cc = 13v, 100% display area turn on. * software configuration follows section 4.4 initialization. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 9 3.3 ac characteristics 3.3.1 68xx-series mpu parallel in terface timing characteristics: symbol description min max unit t cycle clock cycle time 300 - ns t as address setup time 10 - ns t ah address hold time 0 - ns t dsw write data setup time 40 - ns t dhw write data hold time 7 - ns t dhr read data hold time 20 - ns t oh output disable time - 70 ns t acc access time - 140 ns chip select low pulse width (read) 120 pw csl chip select low pulse width (write) 60 - ns chip select high pulse width (read) 60 pw csh chip select high pulse width (write) 60 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 2.6v, v ddio = 1.65v, v ci = 2.8v, t a = 25c) * (1) when 8-bit used: d[7:0] instead when 16-bit used: d[15:0] instead when 18-bit used: d[17:0] instead free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 10 3.3.2 80xx-series mpu parallel in terface timing characteristics: symbol description min max unit t cycle clock cycle time 300 - ns t as address setup time 10 - ns t ah address hold time 0 - ns t dsw write data setup time 40 - ns t dhw write data hold time 7 - ns t dhr read data hold time 20 - ns t oh output disable time - 70 ns t acc access time - 140 ns t pwlr read low time 150 - ns t pwlw write low time 60 - ns t pwhr read high time 60 - ns t pwhw write high time 60 - ns t cs chip select setup time 0 - ns t csh chip select hold time to read signal 0 - ns t csf chip select hold time 20 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 2.6v, v ddio = 1.65v, v ci = 2.8v, t a = 25c) * (1) when 8-bit used: d[7:0] instead when 16-bit used: d[15:0] instead when 18-bit used: d[17:0] instead free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 11 3.3.3 serial interface timing characteristics: (4-wire spi) symbol description min max unit t cycle clock cycle time 50 - ns t as address setup time 15 - ns t ah address hold time 15 - ns t css chip select setup time 20 - ns t csh chip select hold time 10 - ns t dsw write data setup time 15 - ns t dhw write data hold time 15 - ns t clkl clock low time 20 - ns t clkh clock high time 20 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 2.6v, v ddio = 1.65v, v ci = 2.8v, t a = 25c) free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 12 3.3.4 serial interface timing characteristics: (3-wire spi) symbol description min max unit t cycle clock cycle time 50 - ns t css chip select setup time 20 - ns t csh chip select hold time 10 - ns t dsw write data setup time 15 - ns t dhw write data hold time 15 - ns t clkl clock low time 20 - ns t clkh clock high time 20 - ns t r rise time - 15 ns t f fall time - 15 ns * (v dd - v ss = 2.4v to 2.6v, v ddio = 1.65v, v ci = 2.8v, t a = 25c) free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 13 4 4 . . f f u u n n c c t t i i o o n n a a l l s s p p e e c c i i f f i i c c a a t t i i o o n n 4.1. commands refer to the technical manual for the ssd1351 4.2 power down and power up sequence to protect oel panel and extend the pane l life time, the driver ic power up/down routine should include a delay period be tween high voltage and low voltage power sources during turn on/off. it gives th e oel panel enough time to complete the action of charge and discharg e before/after the operation. 4.2.1 power up sequence: 1. power up v ci & v ddio 2. send display off command 3. initialization 4. clear screen 5. power up v cc 6. delay 100ms (when v cc is stable) 7. send display on command 4.2.2 power down sequence: 1. send display off command 2. power down v cc 3. delay 100ms (when v cc is reach 0 and panel is completely discharges) 4. power down v ci & v ddio 4.3 reset circuit when res# input is low, the chip is initialized with the following status: 1. display is off 2. 128(rgb) 128 display mode 3. normal segment and display data co lumn and row address mapping (seg0 mapped to column address 00h and com0 mapped to row address 00h) 4. display start line is set at display ram address 0 5. column address counter is set at 0 6. normal scan direction of the com outputs 7. command a2h, b1h, b3h, bbh, be h are locked by command fdh d d i i s s p p l l a a y y o o n n v ci /v ddio v v c c i i , , v v d d d d i i o o o o n n v v c c c c o o n n v ss /ground v cc v v c c i i , , v v d d d d i i o o o o f f f f v ci /v ddio d d i i s s p p l l a a y y o o f f f f v v c c c c o o f f f f v ss /ground v cc free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 14 4.4 actual application example command usage and explanation of an actual example if the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. set display offset 0xa2, 0x00 set sleep mode on 0xae set display clock divide ratio/oscillator frequency 0xb3, 0xf1 set multiplex ratio 0xca, 0x7f function selection 0xab, 0xc1 gamma look up table 0xb8, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x15, 0x17, 0x19, 0x1b, 0x1d, 0x1f, 0x21, 0x23, 0x25, 0x27, 0x2a, 0x2d, 0x30, 0x33, 0x36, 0x39, 0x3c, 0x3f, 0x42, 0x45, 0x48, 0x4c, 0x50, 0x54, 0x58, 0x5c, 0x60, 0x64, 0x68, 0x6c, 0x70, 0x74, 0x78, 0x7d, 0x82, 0x87, 0x8c, 0x91, 0x96, 0x9b, 0xa0, 0xa5, 0xaa, 0xaf, 0xb4 , 0x00, command lock 0xfd, 0xb1 command lock 0xfd, 0x12 set display start line 0xa1, 0x00 set re-map & color depth 0xa0, 0xb4 set master current control 0xc7, 0x0f set gpio 0xb5, 0x00 set phase length 0xb1, 0x32 enhance driving scheme capability 0xb2, 0xa4, 0x00, 0x00 clear screen set display mode 0xa6 set sleep mode off 0xaf set contrast current 0xc1, 0xc8, 0x80, 0xc8 set second pre-charge period 0xb6, 0x01 set vcomh voltage 0xbe, 0x05 set pre-charge voltage 0xbb, 0x17 set segment low voltage 0xb4, 0xa0, 0xb5, 0x55 free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 15 5 5 . . r r e e l l i i a a b b i i l l i i t t y y 5.1 contents of reliability tests item conditions criteria high temperature operation 70 c, 240 hrs low temperature operation -30 c, 240 hrs high temperature storage 80 c, 240 hrs low temperature storage -40 c, 240 hrs high temperature/humidity operation 60 c, 90% rh, 120 hrs thermal shock -40 c ? 85 c, 24 cycles 60 mins dwell the operational functions work. * the samples used for the above tests do not include polarizer. * no moisture condensation is observed during tests. 5.2 lifetime end of lifetime is specified as 50% of initial brightness. parameter min max unit condition notes operating life time 10,000 - hr 90 cd/m 2 , 50% checkerboard 6 storage life time 20,000 - hr t a = 25 c, 50% rh - note 6: the average operating lifetime at room temperature is estimated by the accelerated operation at hi gh temperature conditions. 5.3 failure check standard after the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 23 5 c; 55 15% rh. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 16 6 6 . . o o u u t t g g o o i i n n g g q q u u a a l l i i t t y y c c o o n n t t r r o o l l s s p p e e c c i i f f i i c c a a t t i i o o n n s s 6.1 environment required customer?s test & measurement are requi red to be conducted under the following conditions: temperature: 23 5 c humidity: 55 15 %rh fluorescent lamp: 30w distance between the panel & lamp: 50 cm distance between the panel & eyes of the inspector: 30 cm finger glove (or finger cover) must be worn by the inspector. inspection table or jig mu st be anti-electrostatic. 6.2 sampling plan level ii, normal inspection, single sampling, mil-std-105e 6.3 criteria & acceptable quality level partition aql definition major 0.65 defects in pattern check (display on) minor 1.0 defects in cosmetic check (display off) 6.3.1 cosmetic check (display off) in non-active area check item classification criteria panel general chipping minor x > 6 mm (along with edge) y > 1 mm (perpendicular to edge) x y x y free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 17 6.3.1 cosmetic check (display off) in non-active area (continued) check item classification criteria panel crack minor any crack is not allowable. cupper exposed (even pin or film) minor not allowable by naked eye inspection film or trace damage minor terminal lead twist minor not allowable terminal lead broken minor not allowable terminal lead prober mark acceptable free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 18 6.3.1 cosmetic check (display off) in non-active area (continued) check item classification criteria minor ng if any bent lead cause lead shorting. terminal lead bent (not twist or broken) minor ng for horizontally bent lead more than 50% of its width. glue or contamination on pin (couldn?t be removed by alcohol) minor ink marking on back side of panel (exclude on film) acceptable ignore for any free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 19 6.3.2 cosmetic check (display off) in active area it is recommended to execute in clear room environment (class 10k) if actual in necessary. check item classification criteria any dirt & scratch on protective film acceptable ignore for any scratches, fiber, line-shape defect (on polarizer) minor w 0.1 ignore w > 0.1, l 2 n 1 l > 2 n = 0 dirt, spot-shape defect (on polarizer) minor 0.1 ignore 0.1 < 0.25 n 1 0.25 < n = 0 dent, bubbles, white spot (any transparent spot on polarizer) minor 0.5 ? ignore if no influence on display 0.5 < n = 0 fingerprint, flow mark (on polarizer) minor not allowable * protective film should not be tear off when cosmetic check. ** definition of w & l & (unit: mm): = (a + b) / 2 w l b : minor axis a: ma j or axis free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 20 6.3.3 pattern check (display on) in active area check item classification criteria no display major not allowable bright line major missed line major pixel short major darker pixel major wrong display major un-uniform (luminance variation within a display) major free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 21 7 7 . . p p a a c c k k a a g g e e s s p p e e c c i i f f i i c c a a t t i i o o n n s s tray 420x285 t=0.8mm 16 pcs tray vacuum packing epe protecttive brimary box 4 set carton box module epe cover foam 351x212x1, antistatic x 1 pcs x 15 pcs x 1 pcs (empty) staggered stacking x 16 pcs wrapped with adhesive tape exsiccator x 2 pcs vacuum packing bag epe protecttive label primary l450mm x w296 x h110, b wave x 4pcs carton box l464mm x w313mm x h472mm, ab wave 370mm x 280mm x 20mm univision technology inc. part id : lot id : q'ty : qc : label item quantity holding trays (a) 15 per primary box total trays (b) 16 per primary box (including 1 empty tray) primary box (c) 1~4 per carton (4 as major / maximum) a b primary box c set b c (major / maximum) free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 22 8 8 . . p p r r e e c c a a u u t t i i o o n n s s w w h h e e n n u u s s i i n n g g t t h h e e s s e e o o e e l l d d i i s s p p l l a a y y m m o o d d u u l l e e s s 8.1 handling precautions 1) since the display panel is being made of glass, do not apply mechanical impacts such us dropping from a high position. 2) if the display panel is broken by some accident and the internal organic substance leaks out, be careful not to inhale nor lick the organic substance. 3) if pressure is applied to the disp lay surface or its neighborhood of the oel display module, the cell structure may be damaged and be careful not to apply pressure to these sections. 4) the polarizer covering the surface of the oel display module is soft and easily scratched. please be careful when handling the oel display module. 5) when the surface of the polarizer of the oel display module has soil, clean the surface. it takes advantage of by using following adhesion tape. * scotch mending tape n o. 810 or an equivalent never try to breathe upon the soiled surface nor wipe the surface using cloth containing solvent such as ethyl alcohol , since the surface of the polarizer will become cloudy. also, pay attention that the following li quid and solvent may spoil the polarizer: * water * ketone * aromatic solvents 6) hold oel display module very care fully when placing oel display module into the system housing. do not apply excessive stress or pressure to oel display module. and, do not over bend the film with electrode pattern layouts. these stresses will influence the display performance. also, secure sufficient rigidity for the outer cases. 7) do not apply stress to the lsi ch ips and the surrounding molded sections. 8) do not disassemble nor m odify the oel display module. 9) do not apply input signals while the logic power is off. 10) pay sufficient attention to the working environments when handing oel display modules to prevent occurrence of element breakage accidents by static electricity. * be sure to make human body gr ounding when handling oel display modules. * be sure to ground tools to use or assembly such as soldering irons. * to suppress generation of static electr icity, avoid carrying out assembly work under dry environments. * protective film is being applied to th e surface of the display panel of the oel display module. be careful since stat ic electricity may be generated when exfoliating the protective film. 11) protection film is being applied to th e surface of the disp lay panel and removes free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 23 the protection film before assembling it. at this time, if the oel display module has been stored for a long period of time, residue adhesive material of the protection film may remain on th e surface of the display panel after removed of the film. in such case, re move the residue material by the method introduced in the above section 5). 12) if electric current is applied when the oel display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful to avoid the above. 8.2 storage precautions 1) when storing oel display modules, put them in static el ectricity preventive bags avoiding exposure to direct sun light nor to lights of fluor escent lamps, etc. and, also, avoiding high temperature a nd high humidity environments or low temperature (less than 0 c) environments. (we recommend you to store these modules in the packaged state when they were shipped from univision technology inc.) at that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur with them. 2) if electric current is applied when wa ter drops are adhering to the surface of the oel display module, when the oel disp lay module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful about the above. 8.3 designing precautions 1) the absolute maximum ratings are the ratings which cannot be exceeded for oel display module, and if these valu es are exceeded, panel damage may be happen. 2) to prevent occurrence of malfunctioning by noise, pay atten tion to satisfy the vil and vih specifications and, at the sa me time, to make the signal line cable as short as possible. 3) we recommend you to install excess curr ent preventive unit (fuses, etc.) to the power circuit (vci). (recommend value: 0.5a) 4) pay sufficient attention to avoid occu rrence of mutual noise interference with the neighboring devices. 5) as for emi, take necessary measures on the equipment side basically. 6) when fastening the oel display modul e, fasten the external plastic housing section. 7) if power supply to the oel display m odule is forcibly shut down by such errors as taking out the main battery while th e oel display panel is in operation, we cannot guarantee the quality of this oel display module. 8) the electric potential to be connected to the rear face of the ic chip should be as follows: ssd1351 * connection (contact) to any other pot ential than the above may lead to rupture of the ic. free datasheet http:///
u u n n i i v v i i s s i i o o n n t t e e c c h h n n o o l l o o g g y y i i n n c c . . doc. no: sas1-d037-a 24 8.4 precautions when disposing of the oel display modules 1) request the qualified companies to handl e industrial wastes when disposing of the oel display modules. or, when burning them, be sure to observe the environmental and hygienic laws and regulations. 8.5 other precautions 1) when an oel display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. nonetheless, if the operation is interr upted and left unused for a while, normal state can be restored. also, there will be no problem in the reliability of the module. 2) to protect oel display modules from performance drops by static electricity rapture, etc., do not touch the follow ing sections whenever possible while handling the oel display modules. * pins and electrodes * pattern layouts such as the cof 3) with this oel display module, the oe l driver is being exposed. generally speaking, semiconductor elements change their characteristics when light is radiated according to the principle of th e solar battery. consequently, if this oel driver is exposed to light, malfunctioning may occur. * design the product and installation met hod so that the oel driver may be shielded from light in actual usage. * design the product and installation met hod so that the oel driver may be shielded from light during the inspection processes. 4) although this oel display module stor es the operation state data by the commands and the indication data, when ex cessive external noise, etc. enters into the module, the internal status may be changed. it therefore is necessary to take appropriate measures to suppre ss noise generation or to protect from influences of noise on the system design. 5) we recommend you to construct its soft ware to make periodical refreshment of the operation statuses (re-setting of th e commands and re-transference of the display data) to cope with catastrophic noise. free datasheet http:///


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