july 1996 ndt451an n-channel enhancement mode field effect transistor general description features ________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter ndt451an units v dss drain-source voltage 30 v v gss gate-source voltage 20 v i d drain current - continuous (note 1a) 7.2 a - pulsed 25 p d maximum power dissipation (note 1a) 3 w (note 1b) 1.3 (note 1c) 1.1 t j ,t stg operating and storage temperature range -65 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 42 c/w r q jc thermal resistance, junction-to-case (note 1) 12 c/w * order option j23z for cropped center drain lead. ndt451an re v. d power sot n-channel enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. these devices are particularly suited for low voltage applications such as dc motor control and dc/dc conversion where fast switching, low in-line power loss, and resistance to transients are needed. 7.2 a, 3 0v. r ds(on ) = 0.035 w @ v gs = 10v r ds(on ) = 0.05 w @ v gs = 4.5v . high density cell design for extremely low r ds(on) . high power and current handling capability in a widely used surface mount package. d d s g d s g ? 1997 fairchild semiconductor corporation
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 30 v i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a t j = 55c 10 a i gssf gate - body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2 ) v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 1 1.6 3 v t j = 125c 0.7 1.2 2.2 r ds(on) static drain-source on-resistance v gs = 10 v, i d = 7.2 a 0.03 0.035 w t j = 125c 0.042 0.063 v gs = 4.5 v, i d = 6.0 a 0.042 0.05 t j = 125c 0.058 0.09 i d (on) on-state drain current v gs = 10 v, v ds = 5 v 25 a v gs = 4.5 v, v ds = 5 v 15 g fs forward transconductance v ds = 10 v, i d = 7.2 a 11 s dynamic characteristics c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 720 pf c oss output capacitance 370 pf c rss reverse transfer capacitance 250 pf switching characteristics (note 2 ) t d(on) turn - on delay time v dd = 10 v, i d = 1 a, v gen = 1 0 v, r gen = 6 w 12 20 ns t r turn - on rise time 13 30 ns t d(off) turn - off delay time 29 50 ns t f turn - off fall time 10 20 ns q g total gate charge v ds = 10 v, i d = 7.2 a, v gs = 10 v 19 30 nc q gs gate-source charge 2.3 nc q gd gate-drain charge 5.5 nc ndt451an re v. d
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 2.3 a v sd drain-source diode forward voltage v gs = 0 v, i s = 7.2 a (note 2 ) 0.9 1.3 v t rr reverse recovery time v gs = 0 v, i f = 1.2 5 a, di f /dt = 100 a/s 100 ns notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. p d ( t ) = t j - t a r q j a ( t ) = t j - t a r q j c + r q c a ( t ) = i d 2 ( t ) r d s ( o n ) t j typical r q ja using the board layouts shown below on 4.5"x5" fr-4 pcb in a still air environment : a. 42 o c/w when mounted on a 1 in 2 pad of 2oz copper. b. 95 o c/w when mounted on a 0.066 in 2 pad of 2oz copper. c. 110 o c/w when mounted on a 0.0123 in 2 pad of 2oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. ndt451an re v. d 1a 1b 1c
ndt451an re v. d 0 0.5 1 1.5 2 2.5 3 0 5 10 15 20 25 v , drain-source voltage (v) i , drain-source current (a) ds d v =10v gs 6.0 4.0 3.5 3.0 5.0 4.5 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j v =10v gs i = 7.2a d r , normalized ds(on) -50 -25 0 25 50 75 100 125 150 0.6 0.7 0.8 0.9 1 1.1 1.2 t , junction temperature (c) gate-source threshold voltage j i = 250a d v = v ds gs v , normalized th 0 5 10 15 20 25 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance r , normalized ds(on) v = 3.0v gs d 4.0 10 6.0 4.5 5.0 3.5 0 5 10 15 20 25 0.5 0.75 1 1.25 1.5 1.75 2 i , drain current (a) drain-source on-resistance d v = 10v gs t = 125c j 25c -55c r , normalized ds(on) typical electrical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation wit h gate voltage and drain current. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with drain current and temperature. figure 5. transfer characteristics. figure 6. gate threshold variation with temperature. 1 2 3 4 5 6 0 5 10 15 20 25 v , gate to source voltage (v) i , drain current (a) v = 10v ds gs d t = -55c j 25c 125c
ndt451an re v. d -50 -25 0 25 50 75 100 125 150 0.9 0.95 1 1.05 1.1 t , junction temperature (c) drain-source breakdown voltage i = 250a d bv , normalized dss j 0.2 0.4 0.6 0.8 1 1.2 1.4 0.001 0.01 0.1 1 10 25 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v =0v gs sd s 0 5 10 15 20 25 0 2 4 6 8 10 q , gate charge (nc) v , gate-source voltage (v) g gs i = 7.2a d v = 5v ds 10v 20v 0.1 0.2 0.5 1 2 5 10 20 30 100 200 500 1000 1500 2000 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 7. breakdown voltage variation with temperature. figure 8. body diode forward voltage variation with current and temperature . figure 9. capacitance characteristics. figure 10. gate charge characteristics. typical electrical characteristics 0 5 10 15 20 25 0 4 8 12 16 20 i , drain current (a) g , transconductance (siemens) t = -55c j d fs v = 10v ds 125c 25c figure 11. transconductance variation with drain current and temperature.
ndt451an re v. d typical thermal characteristics 0 0.2 0.4 0.6 0.8 1 3 4 5 6 7 8 2oz copper mounting pad area (in ) i , steady-state drain current (a) 2 1c 1b 1a 4.5"x5" fr-4 board t = 25 c still air v = 10v a o gs d figure 13 . maximum steady-state drain current versus copper mounting pad area. 0.1 0.2 0.5 1 2 5 10 30 50 0.01 0.05 0.1 0.2 0.5 1 5 10 30 v , drain-source voltage (v) i , drain current (a) ds d 1s 100ms 10s 10ms rds(on) limit dc 1ms v = 10v single pulse r = see note 1c t = 25c gs a q ja 100us figure 14 . maximum safe operating area. figure 15 . transient thermal response curve . note: thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. 0 0.2 0.4 0.6 0.8 1 0.5 1 1.5 2 2.5 3 3.5 2oz copper mounting pad area (in ) steady-state power dissipation (w) 2 1c 1b 1a 4.5"x5" fr-4 board t = 25 c still air a o figure 12 . sot-223 maximum steady-state power dissipation versus copper mounting pad area. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = see note 1 c q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2
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