cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 1/6 csod58 17-581 9 s 2 c y s t ek product s pecification 1.0amp. surface mount schottky barrier diodes csod5817-5819s2 features ? for surface mounted applications. ? for use in low voltage, high frequency inverters, free wheeling, and polarity protection applications ? plastic material used carries underwriters laboratory flammability classification 94v-0 ? low leakage current ? high sur g e capability ? high temperature soldering: 250 c/10 seconds at terminals ? exceeds environmental standards of mil-s-19500/228 ? rohs compliant package mechanical data ? case: molded plastic, jedec sod-323. ? terminals: pure tin plated, solderable per mil-std-750 method 2026 ? polarity: indicated by cathode band. ? weight: 4.507 mg approximately s y m b o l o u t l i n e csod58xxs2 2 (anode) sod-323 ordering information device package shipping csod58xxs2-0-t1-g sod-323 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs/ tape & reel in 7? reel product rank, zero for no rank products product name http://
cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 2/6 csod58 17-581 9 s 2 c y s t ek product s pecification maximum ratings and electrical characteristics ( rating at 25 c ambient temperature unless otherwise specified. ) type parameter symbol 5817 5818 5819 units repetitive peak reverse voltage v rrm 20 30 40 v maximum rms voltage v rms 14 21 28 v maximum dc blocking voltage v r 20 30 40 v maximum instantaneous forward voltage, i f =1a (note 1) v f 0.45 0.55 0.6 v average forward rectified current i o 1 a peak forward sur g e current @8.3m s single half sine wave superimposed on rated load (jedec method) i fsm 10 a maximum dc reverse current v r =v rrm ,t j =25 (note 1) i r 1 ma maxi m u m ther m a l r esist ance, junction to ambient r th,ja 500(typ) /w diode junction capacitance @ f=1mhz and applied 4v reverse voltage c d 120 (max) pf storage temperature range tstg -65 ~ +150 operating temperature range t j -50 ~ +150 notes : 1.pulse test, pulse width=300 sec, 2% duty cycle recommended footprint mm inch
cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 3/6 csod58 17-581 9 s 2 c y s t ek product s pecification characteristic curves
cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 4/6 csod58 17-581 9 s 2 c y s t ek product s pecification reel dimension carrier tape dimension
cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 5/6 csod58 17-581 9 s 2 c y s t ek product s pecification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. t i me 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperature s refer to top s ide of t he p a cka g e , measure d on the p a cka ge body surfa c e.
cys tech electronics corp. s pec. no. : c338 s2 issued date : 20 09.04.03 revised date : 2 013.09.1 1 page no. : 6/6 csod58 17-581 9 s 2 c y s t ek product s pecification sod-323 dimension d a h j k c e b 1 2 s t yle: pin 1.c a thode 2.an o de 2-lead sod-323 plastic surface mounted package cystek package code: s2 marking: type marking code csod5817s2 sj CSOD5818S2 sk csod5819s2 sl 5 h xx inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0630 0.0709 1.60 1.80 e 0.0060 - 0.15 - b 0.0453 0.0531 1.15 1.35 h 0.0000 0.0040 0.00 0.10 c 0.0315 0.0394 0.80 1.00 j 0. 0035 0.0070 0.089 0.177 d 0.0098 0.0157 0.25 0.40 k 0.0906 0.1063 2.30 2.70 notes: 1.controlling dimension : millimeters. 2.lead thickness specified per l/f drawing with solder plating. 3.if there is any question with pa cking specification or packing me thod, please contact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. im portan t n otice : ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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