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standard and ultra e.mmc 4. 41 i/f released data sheet 80 - 36 - 03462 v1. 4 december 20 11 sandisk corporation corporate headquarters ? 601 mccarthy boulevard ? milpitas, ca 95035 phone (408) 801 - 1000 ? fax (408) 801 - 8657 www.sandisk.com
80 - 36 - 03462 sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation - 2 - 80 - 36 - 03462 r evision h istory doc. no revision date description reference 80 - 36 - 03462 0.1 14 - mar - 1 1 preliminary 80 - 36 - 03462 1. 1 9 - sep - 1 1 released version : added x3 configurations update d x2 inand registers 80 - 36 - 03462 1.2 11 - nov - 1 1 added sdin5c1 - 8g - l sku 80 - 36 - 03462 1. 4 15 - dec - 1 1 added sdin5d1 - 16g - l sku fix power class in ext_csd register sandisk ? corporation general policy does not recommend the use of its products in life support applications where in a failure or malfunction of the product may directly threaten life or injury. per sandisk terms and conditions of sale, the user of sandisk products in life support applications assumes all risk of such use and indemnifies sandisk against all damages. see disclaim er of liability. this document is for information use only and is subject to change without prior notice . sandisk corporation assumes no responsibility for any errors that may appear in this document, nor for incidental or consequen tial damages resulting from the furnishing, performance or use of this material. no part of this document may be reproduced, transmitted, transcribed, stored in a retrievable manner or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the prior written consent of an officer of san disk corporation. all parts of the sandisk documentation are protected by copyright law and all rights are reserved. sandisk and the sandisk logo are registered trademarks of sandisk corporation. product names mentioned herein are for identification purpo ses only and may be trademarks and/or registered trademarks of their respective companies. ? 20 11 sandisk corporation. all rights reserved. 80 - 36 - 03462 . december 2011 printed in u.s.a
80 - 36 - 03462 table of contents sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 3 t able of c ontents 1. introduction ................................ ................................ ................................ .................... 5 1.1. general description ................................ ................................ ................................ . 5 1.2. plug - and - play integratio n ................................ ................................ ......................... 5 1.3. feature overview ................................ ................................ ................................ ..... 6 1.4. functional description ................................ ................................ .............................. 7 1.5. technology independence ................................ ................................ ....................... 7 1.6. defect and error man agement ................................ ................................ .................. 7 1.7. mmc bus and power lines ................................ ................................ ....................... 8 1.7.1. bus operating conditions ................................ ................................ ............................. 8 2. e.mmc4.41 features overview ................................ ................................ ..................... 10 2.1. configurable boot partitions size ................................ ................................ ............ 10 2.2. automatic sleep mode ................................ ................................ ........................... 10 2.3. sleep (cmd5) ................................ ................................ ................................ ........ 10 2.4. enhanced reliable write ................................ ................................ ........................ 10 2.5. secure erase ................................ ................................ ................................ ......... 10 2.6. secure trim ................................ ................................ ................................ ........... 11 2.7. trim ................................ ................................ ................................ ....................... 11 2.8. partition management ................................ ................................ ............................ 11 2.9. enhanced write protect ion ................................ ................................ ..................... 12 2.10. high priority interrupt (hpi) ................................ ................................ ..................... 12 2.11. h/w reset ................................ ................................ ................................ ............. 12 2.12. ddr i/f ................................ ................................ ................................ ................. 12 3. product specifications ................................ ................................ ................................ . 13 3.1. typical power requirements ................................ ................................ .................. 13 3.2. operating conditions ................................ ................................ .............................. 13 3.2.1. operating and storage temperature specifications ................................ ................... 13 3.2.2. moisture sensitivity ................................ ................................ ................................ .... 13 3.3. system performance ................................ ................................ .............................. 13 3.4. physical specifications ................................ ................................ ........................... 15 4. interface description ................................ ................................ ................................ .... 18 4.1. mmc i/f ball array ................................ ................................ ................................ . 18 4.2. pins and signal description ................................ ................................ .................... 20 4.2.1. table 7 contains the sandisk inand, with mmc interface (153 balls), functional pin assignment. ................................ ................................ ................................ ........................... 20
80 - 36 - 03462 table of contents sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 4 4.2.2. table 8 contains the sandisk inand, with mmc interface (169 balls), functional pin assignment. ................................ ................................ ................................ ........................... 21 4.3. inand registers ................................ ................................ ................................ .... 22 4.3.1. ocr register ................................ ................................ ................................ ............ 22 4.3.2. cid register ................................ ................................ ................................ .............. 22 4.3.3. dsr register ................................ ................................ ................................ ............ 22 4.3.4. csd register ................................ ................................ ................................ ............ 23 4.3.5. ext_csd register ................................ ................................ ................................ .... 24 5. power delivery and capacitor specifications ................................ .............................. 29 5.1. sandisk inand power domains ................................ ................................ ............. 29 5.2. capacitor connec tion guidelines ................................ ................................ ............ 29 5.2.1. vddi connections ................................ ................................ ................................ ..... 29 5.2.2. vcc and vccq connections ................................ ................................ .................... 29 6. marking ................................ ................................ ................................ ......................... 31 7. ordering information ................................ ................................ ................................ .... 32 how to contact us ................................ ................................ ................................ ............. 33
80 - 36 - 03462 introducti on sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation - 5 - 80 - 36 - 03462 1. i ntroduction 1.1. general description inand is a n embedded flash drive (efd) designed for mobile handsets and consumer elect ronic devices. inand is a hyb rid device combining an embedded thin flash controller and standard mlc nand flash memory, with an industry standard e.mmc 4. 41 1 interface. empowered with a new e.mmc 4.41 feature set such as boot and rpmb partition s , hpi (implemented on mlc products only) , and hw reset the inand e.mmc is the optimal device for reliable code and data storage. designed specifically for mobile multimedia applications, inand is the most mature on board sd/mmc device since 2005, providing mass storage of up to 64 gb in jedec com patible form factors, with low power consumption and high performance - an ideal solution for multimedia handsets of 2.5g, 3g , 3.5g and 4g . in addition to the high reliability and high system performance offered by the current inand family of products, ina nd offers plug - and - play integration and support for multiple nand technology transitions , as well as fea t ures such as advanced power management scheme. inand uses advanced multi - level cell (mlc) nand flash technology , enhanced by sandisk?s embedded flash m anagement software running as firmware on the flash controller . inand architecture and embedded firmware fully emulate s a hard disk to the host processor, enabling read/write operations that are identical to a standard, sector - based hard drive . in addition, sandisk firmware employs patented methods, such as virtual mapping, dyna mic and s tatic wear - leveling, and automatic block management to ensure high data reliability and maximize flash life expectancy. sandisk inand provides up to 64 gb of mem ory for use in mass storage applications. in addition to the mass - storage - specific flash memory chip, inand includes an intelligent controller, which manages interface protocols, data storage and retrieval, error correction code (ecc) algorithms, defect ha ndling and diagnostics, p ower management and clock control. inand enable s multimedia driven applications such a s music, photo, video, tv, gps, games, email , office and other applications. the breakthrough in performance and design makes inand the ideal s olution for mobile handset vendors , portable navigation and automotive infotainment vendors who require e asy integration, fast time to market and high - capacity . 1.2. plug - and - play integration inand optimized architecture eliminates the need for complicated so ftware integration and testing processes and enables a practically plug - and - play integration in the system. the replacement of one inand device with another of a newer generation requires virtually no changes to the host. this m akes inand the perfect solution for platforms and reference designs, as it allows for the 1 compatible to jesd84 - a441
80 - 36 - 03462 introduction sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 6 utilization of more advanced nand flash technology with minimal integration or qualification efforts. sandisk inand is well - suited to meet the needs of small, low power, electr onic devices. with jedec form factors measuring 12mm x 16mm (169 balls) , and 11.5 x 13mm (1 53 balls) compatible with 0.5mm ball pitch, inand is fit for a wide variety of portable devices such as multi - media mobile handsets, personal media players, gps device s and automotive infotainment ( car multimedia and car navigation ). to support this wide range of applications, inand is offered with an mmc /sd interface. the mmc interface allow s for easy integration into any design, regardless of the host (chipset) type used. all device and interface configuration data (such as maximum frequency and device identification) are stored on the device. figure 1 shows a block diagram of the sandisk inand with mmc interface. figure 1 - sandisk inand with mmc i/f block diagram 1.3. feature overview sandisk inand , with mmc interface, features include the following: ? memory controller and nand f lash ? complies with e.mmc specification ver. 4. 4 1 2 ? mechanical design complies with jeded mo - 276c specification ? offered in five tf bga packages of e.mmc 4. 4 1 3 o 11.5mm x 13mm x 1.0mm ( 2gb, 4gb,8gb) o 11.5mm x 13mm x 1.2mm (16gb) o 12mm x 16mm x 1.0mm (8gb,16gb) o 12mm x 16mm x 1.2mm ( 32 gb ) o 12mm x 16mm x 1.4mm (64 gb ) 2 refer to jedec standards no. jesd84 - a441 3 refer to jedec standards no. jesd84 - c441 data in/out mmc bus interface single chip controller control flash memory sandisk inand
80 - 36 - 03462 introduction sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 7 ? operating t emperature range: C 25 c to +85c ? dual power system ? core voltage ( v cc ) 2.7 - 3.6v ? i/o (v ccq ) voltage, either: 1.7 - 1.9 5 v or 2.7 - 3.6v ? up to 64 gb of data storage . ? support s three data bus widths: 1bit (default), 4bit, 8bit. ? variable clock frequencies of 0 - 20 mhz, 0 - 2 6 mhz (default), 0 - 5 2 mhz (high - speed) ? up to 104 mb/sec bus transfer rate, using 8 parallel data lines at 52 mhz , ddr mode ? correction of memory field errors ? designed for portable and stationary applications that require high per formance and reliable data storage 1.4. functional description sandisk inand contains a high - level, intelligent subsystem as shown in figure 1 . this intelligent (microprocessor) subsystem provides many capabilities not found in other types of storage devices . these capabilities include: ? host independence from details of erasing and programming flash memory ? sophisticated system for managing defects ? sophisticated system for error recovery including a powerful ecc ? power management for low power operation 1.5. technology independence sandisk inand uses 512 bytes as sector size . to write or r ead a sector (or multiple sectors), the host software simply issues a read or write command to the device . the command contains the address and number of sectors to write or read. the host software then waits for the command to complete. there is no host software involvement in the details of flash operations such as erase, program or read. this is extremely important since flash devices are becoming increasingly complex with current advanced nand mlc processes. because inand uses an intelligent on - board c ontroller, host system software will not need to be updated as new flash memory evolves. in other words, systems that support inand technology today will be able to access future sandisk devices built with new flash technology without having to update or c hange the host software. 1.6. defect and error management the sandisk inand contains a sophisticated defect and error management system. if necessary, inand will rewrite data from a defective sector to a good sector. this is completely transparent to the host a nd does not consume any user data space. in the extremely rare case that a read error does occur, inand has innovative algorithms to recover the data. these defect and error management systems, coupled with the solid state construction, give sandisk inand unparalleled reliability.
80 - 36 - 03462 introduction sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 8 1.7. mmc bus and power lines sandisk inand with mmc interface support s the mmc protocol . for more details regarding these buses refer to jedec standards no. jesd84 - a441 . the inand bus has the following communication and power lines : ? c md: command is a bidirectional signal. the host and inand operate in two modes, open drain and push - pull. ? dat0 - 7 : data lines are bidirectional signals. host and inand operate in push - pull mode . ? clk: clock input . ? rst_n: hardware reset input ? v ccq : v ccq is the power supply line for host interface. ? v cc : v cc is the power supply line for internal flash memory . ? vdd i : vdd i is inand?s internal power node, not the power supply. connect 0.1uf capacitor from vddi to ground. ? vss , vssq : ground lines. 1.7.1. bus operating conditions table 1 - bus operating conditions parameter min max unit peak voltage on all lines - 0.5 vccq+0.5 v input leakage current (before initializing and/or connecting the internal pull - up resistors) - 100 100 a input leakage current (after changing the bus width and disconnecting the internal pull - up resistors) - 2 2 a output leakage current (before initializing and/or connecting the internal pull - up resistors) - 100 100 a output leakage current (after changing the bus width and disconnecting the internal pull - up resistors) - 2 2 a
80 - 36 - 03462 introduction sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 9 table 2 C power supply voltage parameter symbol min max unit supply voltage vccq (low) 1. 65 1.95 v vccq ( high) 2.7 3.6 v vcc 2.7 3.6 v vss - vssq - 0.5 0.5 v
80 - 36 - 03462 e.mmc4.41 features overview sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 10 2. e .mmc 4.41 f eatures o verview 2.1. configurable boot partition s size i nand supports e.mmc 4.41 boot operation mode s ? factory configuration supplies two boot partitions, 1mb for 2gb - 4gb and 2mb for >4gb ? the feature will enable the host to resize the boot partitions once during production , max b oot partition size is 32mb 2.2. automatic sleep mode a unique feature of inand is automatic entrance and exit from sleep mode. upon completion of an operation, inand enters sleep mode to conserve power if no further commands are received . typically the entrance to sleep mode occurs after 200ns , m ax value entering sleep mode is 850ms due to housekeeping operation. the host does not have to take any action for this to occur, h owever, in ord er to achieve the lowest sleep current, the host needs to shut down its clock to the memory device. in most systems, embedded devices are in sleep mode except when accessed by t he host, thus conserving power. when the host is ready to access a memory devic e in sleep mode, any command issued to it will cause it to exit sleep and respond immediately . 2.3. sleep (cmd5) a n inand device may be switched between a sleep and a standby state using the sleep/awake (cmd5). in the sleep state the power consumption of the me mory device is minimized and the memory device reacts only to the commands reset (cmd0) and sleep/awake (cmd5). all the other commands are ignored by the memory device. the vcc power supply may be switched off in sleep state is to enable even further syst em power consumption saving. for additional inf ormation please refer jesd84 - a441 section number 7. 6 .1 5 2.4. e nhanced reliable write inand supports enhanced relia ble write as defined in e.mmc 4.41 spec 4 . enhanced reliable write is a special write mode in which the old data pointed to by a logical address must remain unchanged until the new data written to same logical address has been successfully programmed. this is to ensure that the target address updated by the reliable write transaction never contains undefined data. when writing in reliable write, data will remain valid even if a sudden power loss occurs during programming. 2.5. secure erase in addition to the standard erase command the inand supports the optional secure e rase command 5 . the secure erase command differs from the basic erase command in that it requires the inand to 4 for additional information refer to jedec standards no. jesd84 - a441 5 for additional information refer to jedec standards no. jesd84 - a441
80 - 36 - 03462 e.mmc4.41 features overview sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 11 execute the erase operation on the memory array when the command is issued and requires the inand and host to wait until the operation is complet e before moving to the next inand operation. t he secure erase command requires the inand to perform a secure purge operation on the erase groups, and cop y items identified for erase , in those erase groups . a purge operation is defined as overwrit ing addressable locations with a single character and then perform ing an erase. th is new command meet s high security application requirements (e,g, those used by military and government customers ) that once data has been erased, it can no longer be retrieved from the device. 2.6. secure trim the secure trim 6 command is simil ar to the secure erase command but performs a secure purge operation on write blocks instead of erase groups. the size of a write block in the inand device is 512b 2.7. trim the trim function is similar to the erase command but applies the erase operation to write blocks instead of erase groups. the size of a write block in the inand device is 512b for additional information on the trim function, refer to jedec standards no. jesd84 - a44 1 2.8. partition management the inand offers the possibility for the host to configure additional split local memory partitions with independent addressable space starting from logical address 0x00000000 for different usage models. therefore memory block area scan be class ified as follows 7 : ? factory configuration supplies two boot partitions (refer to section 2.1) implemented as enhanced storage media and one rpmb partitioning of 128kb in size . ? the host is free to configure one segment in the user data area to be implemented as enhanced storage media, and to specify its starting location and size in terms of write protect groups. the attributes of this enhanced user data area can be programmed on ly once during the device life - cycle (one - time programmable). ? up to four general purpose area partitions can be configured to store user data or sensitive data , or for other host usage models . the size of these partitions is a multiple of the write protect group. size and attributes can be programmed once in device li fe - cycle (one - time programmable) . each of the general purpose area partitions can be implemented with enhanced technological features. 6 for additional information re fer to jedec standards no. jesd84 - a441 7 for additional information refer to jedec standards no. jesd84 - a441
80 - 36 - 03462 e.mmc4.41 features overview sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 12 2.9. enhanced write protection to allow the host to protect data against erase or write , the inand supports two levels o f writ e protect command 8 : ? the entire inand (including the boot area partitions, general purpose area partition, and user/enhanced user data area partition) may be write - protected by setting the pe rmanent or temporary write protect bits in the csd. ? specific segments of the inand may be permanent ly , power - on or temporarily write protected. segment size can be programmed via the ext_csd register. for additional information please refer jesd84 - a441 st andard . 2.10. high priority interrupt (hpi) many operating - systems use demand - paging to launch a process requested by the user . i f the host needs to fetch pages while in a middle of a write operation the request will be delayed until the completion of the write command . the high priority interrupt (hpi) as define d in jesd84 - a441 enable s low read latency operation by suspending a lower priority operation before it is actually completed. this mechanism can reduce read latency, in typical condition to below 10 msec. for additional information on the hpi function, refer to jesd84 - a44 1 standard section 7.6.20 note: hpi is implemented on mlc products only 2.11. h/w reset h ardware reset may be used by host to reset the device, moving the device to a pre - idle state and di sabling the power - on period write protect on blocks that was set as power - on write protect before the reset was asserted. for more information, refer to jesd84 - a441 standard. 2.12. ddr i/f support ddr signaling to double bus performance . for additional information please refer to jesd84 - a441 standard. 8 for additional information refer to jedec standards no. jesd84 - a441
80 - 36 - 03462 product specifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 13 3. p roduct s pecifications 3.1. typical power requirements table 3 - inand power requirements (ta=25c@3.3v) max value x2 max value x3 measurement auto sleep mode 350 350 ua sleep (cmd5) 200 (max) 130 (typical) 200 ua read default speed 100 4gb - 16gb: 100 32gb - 64gb: 200 ma high speed 200 4gb - 16gb: 200 32gb - 64gb: 300 ma write default speed 100 4gb - 16gb: 100 32gb - 64gb: 200 ma high speed 200 4gb - 16gb: 200 32gb - 64gb: 4 00 ma vcc (ripple: max, 100 mv peak - to - peak) 2.7 v C 3.6 v note 1 : current measurements are average over 1 00 msec s. note 2: sleep is measured at room temperature note 3: in sleep state, triggered by cmd5 , flash vcc power supply is switched off 3.2. operating conditions 3.2.1. operating and storage temperature specifications table 4 - operating and storage temperatures temperature operating - 25 c to 85 c non - operating: after soldered onto pc board - 40 c to 85 c 3.2.2. moisture sensitivity the moisture sensitivity level for inand is msl = 3. 3.3. system performance all performance values for inand in table 5 were measured under the following condi tions: ? voltage range : core voltage (v cc ): 2.7 - 3.6v host voltage (vccq) , either: 1.7 - 1.9 5 v or 2.7 - 3.6v ? operating t emperature - 25 c to 85 c
80 - 36 - 03462 product specifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 14 table 5 a - system performance note 1 : sus tained read & write performance is measured under bus width of 8b it at 52mhz. table 5 b - system timing performance sku sustained write sustained read x2 sdin5d1 - 2 g - l 5mb/s 40mb/s sdin5d2 - 4g - l sdin5c2 - 8g - l 13mb/s 4 0mb/s sdin5d2 - 8g - l sdin5d2 - 16g - l sdin5c2 - 16g - l sdin5c2 - 32g - l sdin5c2 - 64g - l 20mb/s 40mb/s x3 sdin5d1 - 4g - l sdin5c1 - 8g - l 5mb/s 40mb/s sdin5d1 - 8g - l sdin5c1 - 16g - l 8mb/s 40mb/s sdin5d1 - 16g - l sdin5c1 - 32g - l sdin5c1 - 64g - l 13mb/s 40mb/s timing value block read access time (max) 100 ms block write access time (max) 250 ms cmd1 to ready after power - up (max) 1000 ms
80 - 36 - 03462 product specifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 15 3.4. physical specifications the sandisk inand is a 169 - pin, thin fine - pitched ball grid array (bga). see figure 2 , figure 3 and table for physical specifications and dimensions. figure 2 - inand specification top and side view (detail a) figure 3 - package outline drawing C bottom view ball test pad (for sandisk internal use only). legend
80 - 36 - 03462 product specifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 16 table 6 - inand package specification dimension in millimeters dimension in inches package size symbol minimum nominal maximum minimum nominal maximum 16x12x1.0 11.5x13x1.0 a --- --- 1.0 0 --- --- 0.0 39 16x12x1.2 11.5x13x1.2 a --- --- 1.20 --- --- 0.0 47 16x12x1.4 a --- --- 1.40 --- --- 0.0 55 all a1 0.17 0.22 0.27 0.007 0.009 0.011 16x12x1.0 11.5x13x1.0 a2 0. 61 0.66 0.71 0.024 0.0 26 0.0 28 16x12x1.2 11.5x13x1.2 a2 0.785 0. 835 0.885 0.0 31 0.033 0.0 35 16x12x1.4 a2 0.98 1.03 1.08 0.038 0.040 0.042 16x12x1.0 16x12x1.2 11.5x13x1.0 11.5x13x1.2 c 0.17 0.21 0.25 0.007 0.008 0.010 16x12x1.4 c 0.10 0.13 0.16 0.004 0.005 0.006 16x12x1.0 16x12x1.2 16x12x1.4 d 11.93 12.00 12.07 0.470 0.472 0.475 11.5x13x1.0 11.5x13x1.2 d 11.43 11.50 11.57 0.450 0.453 0.456 16x12x1.0 16x12x1.2 16x12x1.4 e 15.93 16.00 16.07 0.627 0.630 0.633 11.5x13x1.0 11.5x13x1.2 e 12.93 13.00 13.07 0.509 0.512 0.515 16x12x1.0 16x12x1.2 16x12x1.4 d1 --- 1.50 --- --- 0.059 --- 16x12x1.0 16x12x1.2 16x12x1.4 d2 --- 3.50 --- --- 0.138 --- 16x12x1.0 16x12x1.2 16x12x1.4 d3 --- 5.50 --- --- 0.217 ---
80 - 36 - 03462 product spec ifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 17 dimension in millimeters dimension in inches all d4 --- 6.50 --- --- 0.256 --- all e1 --- 6.50 --- --- 0.256 --- 16x12x1.0 16x12x1.2 16x12x1.4 e2 --- 10.50 --- --- 0.413 --- 16x12x1.0 16x12x1.2 16x12x1.4 e3 --- 12.50 --- --- 0.492 --- 16x12x1.0 16x12x1.2 16x12x1.4 e4 --- 13.50 --- --- 0.531 --- all e --- 0 .50 --- --- 0.020 --- all b 0.25 0.30 0.35 0.010 0.012 0.014 all a aa 0.10 0.004 all b bb 0.10 0.004 all d dd 0.08 0.003 all e ee 0.15 0.006 all f ff 0.05 0.002 all md/me 14/14 14/14
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 18 4. i nterface d escription 4.1. mmc i/f ball array figure 4 - 169 balls - ball array (top view) n c d a t 3 d a t 4 d a t 5 d a t 6 d a t 7 n c n c n c n c n c n c n c n c n c v d d i n c v s s q n c v c c q n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c v c c v s s n c n c n c n c n c n c n c n c n c v c c n c n c n c n c n c n c n c v s s n c n c n c n c n c n c n c n c v s s n c n c n c n c n c n c n c v c c n c n c n c n c n c n c r e s e t n c n c v s s v c c n c n c n c n c n c n c n c n c n c n c n c n c n c v c c q c m d c l k n c n c n c n c n c n c n c n c n c v s s q n c v c c q v s s q n c n c n c n c n c n c n c n c n c n c n c v c c q v s s q v c c q v s s q n c n c n c n c n c n c n c n c n c n c d a t 0 d a t 1 d a t 2 n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c n c a b c d e f g h j k l m n p n c r t v w y a a a b a c a d a e a f a g a h u
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 19 figure 5 - 153 balls - ball array (top view) nc dat 3 dat 4 dat 5 dat 6 dat 7 nc nc nc nc nc nc nc nc nc vddi nc vssq nc vccq nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc vcc vss nc nc nc nc nc nc nc nc nc vcc nc nc nc nc nc nc nc vss nc nc nc nc nc nc nc nc vss nc nc nc nc nc nc nc vcc nc nc nc nc nc nc reset nc nc nc nc nc nc nc nc nc nc nc nc nc vccq cmd clk nc nc nc nc nc nc nc nc nc vssq nc vccq vssq nc nc nc nc nc nc nc nc nc nc nc vccq vssq vccq vssq nc nc nc nc nc nc nc nc nc nc dat 0 dat 1 dat 2 nc nc nc nc nc nc nc nc nc a b c d e f g h j k l m n p 9 10 1 2 3 4 5 6 7 8 11 12 13 14 nc nc nc vss vcc index
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation - 20 - 80 - 36 - 03462 4.2. pins and signal description 4.2.1. table 7 contains the sandisk inand , with mmc interface (1 53 balls) , functional pin assignment . table 7 C functional pin assignment , 153 balls note: all other pins are not connected [nc] and can be connected to gnd or left floating. ball no. ball signal type description a3 dat0 i/o data i/o: bidirectional channel used for data transfer a4 dat 1 a5 dat 2 b2 dat 3 b3 dat 4 b4 dat 5 b5 dat 6 b6 dat 7 m5 cmd i/o command : a bidirectional channel used for device initialization and command transfers. m6 clk input clock : each cycle directs a 1 - bit transfer on the command and dat lines k5 rst_n hardware reset e6 vcc supply flash i/o and memory power supply f5 vcc j10 vcc k9 vcc c 6 vccq supply memory controller core and mmc i/f i/o power supply m4 vccq n4 vccq p3 vccq p5 vccq e7 vss supply flash i/o and memory ground connection g5 vss h10 vss k8 vss c4 vssq memory controller core and mmc i/f ground connection n2 vssq n5 vssq p4 vssq p6 vssq c2 vddi internal power node. connect 0.1uf capacitor from vddi to ground
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 21 4.2.2. table 8 contains the sandisk inand, with mmc interface ( 169 balls), functional pin assignment. table 8 C functional pin assignment , 169 balls note: all other pins are not connected [nc] and can be connected to gnd or left floating. ball no. ball signal type description h3 dat0 i/o data i/o: bidirectional channel used for data transfer h4 dat 1 h5 dat 2 j2 dat 3 j3 dat 4 j4 dat 5 j5 dat 6 j6 dat 7 w5 cmd i/o command : a bidirectional channel used for device initialization and command transfers. w6 clk input clock : each cycle directs a 1 - bit transfer on the command and dat lines u5 rst_n hardware reset m6 vcc supply flash i/o and memory power supply n5 vcc t10 vcc u9 vcc k6 vccq supply memory controller core and mmc i/f i/o power supply w4 vccq y4 vccq aa3 vccq aa5 vccq m7 vss supply flash i/o and memory ground connection p5 vss r10 vss u8 vss k4 vssq memory controller core and mmc i/f ground connection y2 vssq y5 vssq aa4 vssq aa6 vssq k2 vddi internal power node. connect 0.1uf capacitor from vddi to ground
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 22 4.3. inand registers 4.3.1. ocr register value for 4gb - 32gb : 0x c 0 ff 8080 note: bit 30 is set because the device is high capacity ; bit 31 will be set only when the device is ready parameter ocr slice description value width access mode [30:29] access mode <=2gb 00b >2gb 10b 2 [23:15] vdd: 2.7 - 3.6 range 111111111b 9 [14:8] vdd: 2.0 - 2.6 range 0000000b 7 [7] vdd: 1. 7 - 1.95 range 1b 1 4.3.2. cid register 4.3.3. dsr register dsr is not implemented; in case of read, value of 0x0404 will be returned. parameter cid slice description value width mid [127:120] manufacturer id 45h 8 cbx [113:112] card bga 01h 2 oid [111 :104] oem/application id 0000h 8 pnm [103:56] product name 2gb: 53454d303247h ("sem02g") 4gb: 53454d303447h ("sem04g") 8gb: 53454d303847h ("sem08g") 16gb: 53454d313647h ("sem16g") 32gb: 53454d333247h ("sem32g") 64gb: 53 4 54d3634 47 h (sem64g) 48 prv [55:48] product revision 90h 8 psn [47:16] product serial number random by production 32 mdt [15:8] manufacturing date month, year 8 crc [7:1] crc7 checksum 0000000b 7 parameter dsr slice description value width rsrvd [1 5 : 8 ] reserved 04h 8 rsrvd [ 7 : 0 ] reserved 04h 8
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 23 4.3.4. csd register parameter csd slice description value width csd_structure [127:126] csd structure 11b 3 spec_vers [125:122] system specification version 0100b 4 taac [119:112] data read access - time 1 0fh 8 nsac [111:104] data read access - time 2 in clk cycles (nsac*100) 00h 8 tran_speed [103:96] max. bus clock frequency 32 h 8 ccc [95:84] card command classes 0f5h 12 read_bl_len [83:80] max. read data block length 9h C not 2gb ah C for 2gb 4 read_bl_partial [79:79] partial blocks for read allowed 0b 1 write_blk_misalign [78:78] write block misalignment 0b 1 read_blk_misalign [77:77] read block misalignment 0b 1 dsr_imp [76:76] dsr implemented 0b 1 * c_size [73:62] device size 2gb - e9 8 h >2gb fffh 12 vdd_r_curr_min [61:59] max. read current @ vdd min 111b 3 vdd_r_curr_max [58:56] max. read current @ vdd max 11 1 b 3 vdd_w_curr_min [55:53] max. write current @ vdd min 111b 3 vdd_w_curr_max [52:50] max. write current @ vdd max 11 1 b 3 c_size_mult [49:47] device size multiplier 111b 3 erase_grp_size [46:42] erase group size 11111b 5 erase_grp_mult [41:37] erase group size multiplier 2gb 00111b 4gb 01111b >=8gb 11111b 5 wp_grp_size [36:32] write protect group size 11111b 5 wp_grp_enable [31:31] write protect group enable 1b 1 default_ecc [30:29] manufacturer default 00b 2 r2w_factor [28:26] write speed factor 100b 3 write_bl_len [25:22] max. write data block length 9h 4 write_bl_partial [21:21] partial blocks for write allowed 0b 1 content_prot_app [16:16] content protection application 0b 1 file_format_grp [15:15] file format group 0b 1 copy [14:14 ] copy flag (otp) 1b 1 perm_write_protect [13:13] permanent write protection 0b 1 tmp_write_protect [12:12] temporary write protection 0b 1 file_format [11:10] file format 00b 2 ecc [9:8] ecc code 00b 2 crc [7:1] calculated crc 0000000b 7
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 24 4.3.5. ext_csd register parameter ecsd slice [bytes] description value s_cmd_set [504] supported command sets 1h hpi_features [503] hpi features 1h bkops_support [502] background operations support 0 h bkops_status [246] background operations status default = 0h updated in run tim e correctly_prg_sectors_ num [245:242] number of correctly programmed sectors default = 0h updated in run tim e ini_timeout_ap [241] 1 st initialization time after partitioning 2 - 32gb: ah 64gb: 14h pwr_cl_ddr_52_360 [239] power class for 52mhz, ddr at 3.6v x2 = 0h x3: 4gb - 16gb = 0h x3: 32gb - 64gb = 77h x3: 16 g b ( 11.5x13 ) = 77h trim _mult [232] trim multiplier x2 = 1h x3 = 2h sec_feature_support [231] secure feature support 15h sec_erase_mult [230] secure erase multiplier 96h sec_trim_mult [229] secure trim multiplier 2 h boot_info [228] boot information 7h boot_size_mult i [226] boot partition size 10 h access_size [225] access size 0 h hc_erase_group_size [224] high capacity erase unit size table 10 erase_timeout_mult [223] high capacity erase time out 3 h rel_wr_sec_c [222] reliable write sector count 1h hc_w p_ gr p _size [221] high capacity write protect group size table 10 s _ c_vcc [220] sleep current [vcc] 8h s _ c_vcc q [219] sleep current [vccq] 7h s _ a_timeout [217] sleep/awake time out 11h sec_count [215:212] sector count table 6 min_perf_w_8_52 [210 ] minimum write performance for 8 bit @ 52 mhz x2= a h x3= 8h min_perf_r_ 8 _ 52 [20 9 ] minimum read performance for 8bit @52 mhz x2= a h x3= 8h min_perf_w_ 8 _26 _4_52 [20 8 ] minimum write performance for 4bit @ 52 mhz or 8 bit @ 26 mhz x2= a h x3= 8h
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 25 parameter ecsd slice [bytes] description value min_perf_ r _ 8 _26 _4_52 [207 ] minimum read performance for 4bit @ 52 mhz or 8 bit @ 26 mhz x2= a h x3= 8h min_perf_w_4_26 [206] minimum write performance for 4bit @26mhz x2= a h x3= 8h min_perf_r_4_26 [205] minimum read performance for 4bit @26mhz x2= a h x3= 8h pwr_cl_26_360 [203] power class for 26mhz @ 3.6v x2 = 0h x3: 4gb - 16gb = 0h x3: 32gb - 64gb = 77h x3: 16 g b ( 11.5x13 ) = 77h pwr_cl_52_360 [202] power class for 52mhz @ 3.6v x2 = 0h x3: 4gb - 16gb = 0h x3: 32gb - 64gb = 77h x3: 16 g b ( 11.5x13 ) = 77h pwr_cl_26_195 [201] power class for 26mhz @ 1.95v 0h pwr_cl_52_195 [200] power class for 52mhz @ 1.95v 0h partition_switch_time [199] partition switching timing 1h out_of_interrupt_time [198] out - of - interrupt busy timing 2 h card_type [196] card type 7 h csd_structure [194] csd structure version 2h ext_csd_rev [192] extended csd revision 5h cmd_set [191] command set 0h cmd_set_rev [189] command set revision 0h power_class [187] power class 0h hs_timing [185] high speed interface timing 0h bus_width [183] bus width mode 0h erase_mem_cont [181] content of explicit erased memory range 0h partition_config [179] partition configuration 0h boot_config_prot [178] boot config protection 0h boot_bus_width [17 7 ] boot bus width 1 0h erase_group_def [175] high - density erase group definition 0h boot_wp [173] boot area write protect register 0h user_wp [171] user area write protect register 0h fw_config [169] fw configuration 1 h rpmb_size_mult [168] rpmb size 1h wr_rel_set [167] write reliability setting register 1 h
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 26 parameter ecsd slice [bytes] description value wr_rel_param [166] write reliability parameter register 4 h bkops_start [164] manually start background operations 0h bkops_en [163] enable background operations handshake 0h rst_n_function [162] h/w reset function 0 h hpi_mgmt [161] hpi management 0h partitioning support [160] partitioning support 3h max_enh_size_mult [159:157] max enhanced area size x2 x3 2gb e8h na 4gb e0h 9dh 8gb eah 9eh 16gb ebh 9eh 32gb ech 9fh 64gb e9h 9ch partitions_attribute [156] partitions attribute 0h gp_size_mult [154:143] general purpose partition size 0h enh_size_mult [142:140] enhanced user data area size 0h enh_start_addr [139:136] enhanced user data start address 0h sec_bad_blk_mgmnt [134] bad block management mode 0h
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 27 the following table shows the capacity available for user data for the various device capacities: table 6 : capacity * for user data * note : exported capacity numbers in table 9 are the factory default exported capacity. by implementing e nhanced u ser d ata a rea the exported capacity is reduced . table 7 : write protect group size capacity lba [hex] lba [dec] capacity [ bytes ] sdin 5d1 - 2 g - l 0 x3a6000 3 , 825 , 664 1 , 958 , 739 , 968 sdin5d2 - 4g - l 0 x 760 000 7 , 733 , 248 3 , 959 , 422 , 976 sdin5d2 - 8g - l 0 x ecc000 15 , 515 , 648 7 , 944 , 011 , 776 sdin5c2 - 8g - l 0 x ecc000 15 , 515 , 648 7 , 944 , 011 , 776 sdin5d2 - 16g - l 0x1da a 000 31 , 105 , 024 15 , 925 , 772 , 288 sdin5c2 - 16g - l 0x1da a 000 31 , 105 , 024 15 , 925 , 772 , 288 sdin5c2 - 32g - l 0x3b70000 62 , 324 , 736 31 , 910 , 264 , 832 sdin5c2 - 64g - l 0x74f0000 122 , 617 , 856 62 , 780 , 342 , 272 sdin5d1 - 4g - l 0x760000 7,733,248 3,959,422,976 sdin5d1 - 8g - l 0xecc000 15,515,648 7,944,011,776 sdin5c1 - 8g - l 0xecc000 15,515,648 7,944,011,776 sdin5c1 - 16g - l 0x1daa000 31,105,024 15,925,772,288 sdin5d1 - 16g - l 0x1daa000 31,105,024 15,925,772,288 sdin5c1 - 32g - l 0x3b70000 62,324,736 31,910,264,832 sdin5c1 - 64g - l 0x74f0000 122,617,856 62,780,342,272 sku hc_erase_group _size hc_wp_grp_ size erase unit size [mb] write protect group size [mb] sdin5d1 - 2 g - l 4 h 2 h 4mb 4mb sdin5d2 - 4g - l 4h 4h 4mb 8mb sdin5d1 - 4g - l 8h 2h 4mb 8mb sdin5d2 - 8g - l 8h 4 h 4mb 16mb sdin5c2 - 8g - l 8h 4 h 4mb 16mb sdin5d1 - 8g - l 8h 4h 4mb 16mb sdin5 c 1 - 8g - l 8h 4h 4mb 16mb sdin5d2 - 16g - l 8h 8h 4mb 32mb sdin5c2 - 16g - l 8h 8h 4mb 32mb sdin5c1 - 16g - l 8h 8h 4mb 32mb sdin5d1 - 16g - l 8h 8h 4mb 32mb
80 - 36 - 03462 interface description sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 28 sdin5c2 - 32g - l 8h 10h 4mb 64mb sdin5c1 - 32g - l 8h 10h 4mb 64mb sdin5c2 - 64g - l 8h 20h 4mb 128mb sdin5c1 - 64g - l 8h 20h 4mb 128mb
80 - 36 - 03462 power delivery and capacitor specifications sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 29 5. p ower d elivery and c apacitor s pecifications 5.1. sandisk inand power domains sandisk inand has three power domains assigned to vccq , vcc and vddi , as shown in table 8 . table 8 - power domains pin power domain comments v ccq host interface supported voltage ranges: high voltage region: 3.3v (nominal) low voltage region: 1.8v (nominal) v cc memory supported voltage range: high voltage region: 3.3v (nominal) vddi internal vddi is the internal regulator connection to an external decoupling capacitor. 5.2. capacitor connection guidelines 5.2.1. vddi connections the vddi ( c2/ k2) ball must only be connected to an external capacitor that is connected to vss. this signal may not be left floating. the capacitor?s specifications and its placement instructions are detailed below. the capacitor is part of an internal voltage regula tor that provides power to the controller. caution : failure to follow the guidelines below , or connecting the vddi ball to any external signal or power supply , may cause the device to malfunction. the trace requirements for the vddi ( c2/ k2) ball to the cap acitor are as follows: ? resistance: <2 ohm ? inductance: <5 nh the capacitor requirements are as follows: ? capacitance: >= 0.1 uf ? voltage rating: >=6.3 v ? dielectric: x7r or x5r 5.2.2. vcc and vccq connections ? all vcc balls should be connected to a 3.3v supply ? all v ccq balls should be connected either to a 3.3v or 1.8v supply sandisk recommends providing separate bypass capacitors for each power domain as shown in error! reference source not foun d.
80 - 36 - 03462 power delivery and capacitor specific ations sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 30 note : signal routing in the diagram is for illustration purposes only and the final routing depends on your pcb layout. also, for clarity, the diagram does not show the vss connection. all balls marked vss should be connected to a ground (gnd) plane. figure 6 - recommended power domain connections t 1 0 v c c u 9 v c c k 6 v c c q m 6 v c c a a 5 v c c q w 4 v c c q y 4 v c c q 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 a b c d e f g h j k l m n p a a 3 v c c q n 5 v c c c _ 1 c _ 2 c _ 3 c _ 4 c _ 5 v s s v s s v s s v s s v s s c _ 1 = c _ 3 > = 4 . 7 u f c _ 2 = c _ 4 < = 1 0 0 n f c l o s e t o b a l l n 5 c l o s e t o b a l l a a 3 c a p a c i t o r c _ 5 : c a p a c i t a n c e > = 0 . 1 u f v o l t a g e > = 6 . 3 v d i e l e c t r i c : x 7 r o r x 5 r t r a c e r e q u i r e m e n t s ( c _ 5 ) : r e s i s t a n c e < 2 o h m i n d u c t a n c e < 5 n h k 2 v d d i t o p v i e w v c c q p o w e r s u p p l y v c c = 3 . 3 v ( n o m ) r t v w y a a a b a c a d a e a f a g a h u
80 - 36 - 03462 marking sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 31 6. m arking first row: simplified sandisk logo second row: sales item p/n third row: country of origin i.e. ?taiwan? or ?china? * no es marking for product in mass production. fourth row: y - last digit of year ww - w ork week d - a day within the week. mllxxx C internal use 2d barcode : store the 10 digital unique id information as reflected in the fourth row. figure 7 : product m arking
80 - 36 - 03462 ordering information sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation 80 - 36 - 03462 32 7. o rdering i nformation table 9 C ordering information capacity technology part number package 2gb x2 sdin5d1 - 2g - l 11.5 mm x 13 mm x 1.0 mm 4gb x2 sdin5d2 - 4g - l 11.5 mm x 13 mm x 1.0 mm x3 sdin5d1 - 4g - l 11.5 mm x 13 mm x 1.0 mm 8gb x2 sdin5d2 - 8g - l 11.5 mm x 13 mm x 1.0 mm x2 sdin5c2 - 8g - l 12 mm x 16 mm x 1.0 mm x3 sdin5d1 - 8g - l 11.5 mm x 13 mm x 1.0 mm x3 sdin5c1 - 8g - l 12 mm x 16 mm x 1.0 mm 16gb x2 sdin5d2 - 16g - l 11.5mm x 13mm x1.2mm x2 sdin5c2 - 16g - l 12 mm x 16 mm x 1.0 mm x3 sdin5c1 - 16g - l 12 mm x 16 mm x 1.0 mm x3 sdin5d1 - 16g - l 11.5mm x 13mm x1.2mm 32gb x2 sdin5c2 - 32g - l 12 mm x 16 mm x 1.2 mm x3 sdin5c1 - 32g - l 12 mm x 16 mm x 1.2 mm 64gb x2 sdin5c2 - 64g - l 12 mm x 16 mm x 1.4 mm x3 sdin5c1 - 64g - l 12 mm x 16 mm x 1.4 mm note: suffix t added to the p/n indicates tape/reel. for example, sdin5c2 - 8g - l would become sdin5c2 - 8g - l t . the default p/ns in table 1 2 are shipped in tray s .
80 - 36 - 03462 ordering information sandisk inand e.mmc 4.41 i/f - data sheet ? 2011 sandisk corporation - 33 - 80 - 36 - 03462 h ow to c ontact u s usa sandisk corporation, corporate headquarters . 601 mccarthy blvd milpitas, ca 95035 phone : +1 - 408 - 801 - 1000 fax: +1 - 408 - 801 - 8657 europe sandisk il ltd. 7 atir yeda st. kfar saba 44425, israel phone : +972 - 9 - 764 - 5000 fax: +972 - 3 - 548 - 8666 japan sandisk limited (japan) nisso 15 bldg. 8f 2 - 17 - 19 shin - yokohama, kohoku - ku yokohama, japan, 222 - 0033, phone: + 81 - 45 - 474 - 0181 fax: + 81 - 45 - 474 - 0371 korea sandisk korea ltd. 6f samhwa bldg, yangjae - dong 14 - 8, seocho - gu, seoul 137 - 130, korea phone:+82 - 2 - 345 2 - 9079 fax: +82 - 2 - 3452 - 9145 taiwan sandisk asia ltd. 37f, taipei 101 tower, no 7, xinyi rd, section 5. taipei, taiwan, 110 tel: +886 - 2 - 8758 - 2966 fax: +886 - 2 - 8758 - 2999 china sandisk china ltd. room 121 - 122 bldg. 2, international commerce & exhibition ctr. hong hua rd. futian free trade zone shenzhen, china phone: +86 - 755 - 8348 - 5218 fax: +86 - 755 - 8348 - 5418 internet http://www.sandisk.com/mobile sales and technical information techsupport@sandisk.com

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