io ducta., one. 20 stern ave. springfield, new jersey 07081 u.s.a. telephone: (973) 376-2922 (212)227-6005 fax: (973) 376-8960 tmos v? power field effect transistor n-channel enhancement-mode silicon gate tmos v is a new technology designed to achieve an on-resis- tancearea product about one-half that of standard mosfets. this new technology more than doubles the present cell density of our 50 and 60 volt tmos devices. just as with our tmos e-fet designs, tmos v is designed to withstand high energy in the avalanche and commutation modes. designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. new features of tmos v ? on-resistance area product about one-half that of standard mosfets with new low voltage, low rds(oh) technology ? faster switching than e-fet predecessors features common to tmos v and tmos e-fets ? avalanche energy specified ? bss and vds(on) specified at elevated temperature ? static parameters are the same for both tmos v and tmos e-fet MTP50N06V tmos power fet 42 amperes 60 volts rds(on) = 0.028 ohm d 9 o s to-220ab maximum ratings (tc = 25c unless otherwise noted) rating drain-source voltage drain-gate voltage (res = 1 .0 m2) gate-source voltage ? continuous ? non-repetitive (tp < 10 ms) drain current ? continuous @ 25c ? continuous? 100c ? single pulse (tp < 10 us) total power dissipation @ 25c derate above 25c operating and storage temperature range single pulse drain-tc?source avalanche energy ? starting tj = 25c 0/dd = 25vdc, v(3s = 1qvdc, l|_ = 42apk, l = 0.454 uh, rq = 25 n) thermal resistance ? junction to case ? junction to ambient maximum lead temperature for soldering purposes, 1/8" from case for 10 seconds symbol vdss vdgr vgs vgsm id id i dm pd tj, tstg eas rbjc rgja tl value 60 60 + 20 + 25 42 30 147 125 0.83 -55 to 175 400 1.2 62.5 260 unit vdc vdc vdc vpk adc apk watts w/c c mj c/w c nj semi-conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. information furnished by nj semi-conductors is believed to be both accurate and reliable at the time of going to press. however, nj semi-conductors assumes no responsibility for any errors or omissions discovered in its use. nj semi-conductors encourages customers to verify that datasheets are current before placing orders. ounlitv
MTP50N06V electrical characteristics (tj = 25c unless otherwise noted) characteristic symbol mm typ max unit off characteristics drain-source breakdown voltage (vgs = 0 vdc, id = 250 uadc) temperature coefficient (positive) zero gate voltage drain current (vds = 60 vdc, vgs = 0 vdc) (vds = 60 vdc, vgs = vdc. tj = 150c) gate-body leakage current (vgs = 20 vdc, vds = ) v(br)dss !dss 'gss 60 _ ? 69 i ? ? 10 100 100 vdc mv/c uadc nadc on characteristics (1) gate threshold voltage (vds = vgs, id = 25 nadc) temperature coefficient (negative) static drain-source on-resistance (vgs = 10 vdc, id = 21 adc) drain-source on-voltage (vqs = 10 vdc) (i d = 42 adc) (id = 21 adc, tj = 150c) forward transconductance (vds = 6 25 vdc, id = 20 adc) vqs(th) rds(on) vds(on) 9fs 2.0 ? = 16 2.7 3.0 0.025 1.4 23 4.0 0.028 1.7 1.6 ? vdc mv/c ohm vdc mhos dynamic characteristics input capacitance output capacitance reverse transfer capacitance (vds ~ 25 vdc, vgs - vdc, f = 1.0 mhz) cjss coss crss ? ? ? 1644 465 112 2320 660 230 pf switching characteristics (2) turn-on delay time rise time turn-off delay time fall time gate charge (see figure 8) (vdq = 25 vdc, id = 42 adc, vgs = 10 vdc, rg = 9.1 q) (vds = 48 vdc, id = 42 adc, vgs = 10 vdc) td(on) ?r td(off) tf qt qi q2 q-3 ? ? ? ? ? ? ? ? 12 122 64 54 47 9 21 16 20 250 110 90 70 ? ? ? ns nc source-drain diode characteristics forward on-voltage (1) reverse recovery time (see figure 14) reverse recovery stored charge (is = 42 adc, vgs = 0 vdc) (is = 42 adc, vgs = 0 vdc, tj = 150c) (is = 42 adc, vgs = vdc, dls/dt = 100a/|is) vsd trr ta |
