analog devices fax-on-demand hotline - page 12 -. analog ~ devices i features 30 mb/s data transfer rate capability (ad892e) 25 mb/s data transfer rate capability (ad892t) 1 ns (max) additional pulse pairing two versions differential ecl data output (ad892e) til data output (ad892t) variable gain amplifier with 30 db max gain and 40 db control range two gain of 4 rf buffers with 200 n differential-load drive capability 0.2 db/ms typical gain drift in hold mode 1 ...s agc attack/decay times using a 1000 pf external capacitor dynamic input clamp ensures fast recovery after write to read transients two matched offset trimmed comparators one-shot pulse width set using external resistor operates from +5 v and +12 v supplies product description the ad892e1ad892t is a complete subsystem for recovering binary information from differentiating channels with transfer rates up to 30 megabits per second. it is connected to the out- put of the head amplifier and performs the signal conditioning and the data qualification task with a minimum of external components. the ad892e/ad892t has the flexibility to perform both con- tinuous and sampled agc functions; it is also ideal for embed- ded, dedicated, or mixed servo applications. fast acquisition and low droop while in the hold mode allows for the agc oper- ation to be performed within the sector header without compro- mising channel behavior when reading data. two user-defined filter/equalizer stages may be employed, thus allowing maximum design flexibility. this greatly simplifies the design of the over- all channel characteristics. three low offset, 50 mhz full-wave rectifiers are provided. one rectifier drives the internal sample-and-hold circuitry; this signal is available to the user to set the attack and decay characteris- tics of the sample and hold. the other two rectifier outputs are provided to generate the qualification level and to feed the single- ended passive differentiator. the threshold setting and differen- tiation is performed by an external rlc network. this is an abridged version of the data sheet. to obtain a complete data sheet, contact your nearest sales office. 30 mb/s peak detectors ad892e/ad892t i functional block diagram ..5 i i- 1-'" l- i- :>"' """ "" "" "", :or: g~ ~!e 5 ~~;:: agc level. set vaa input ad81i2ejad892t amp comp reet , output recr 2 output va. ou11'ut vga level set euff 1 input recr 3 output rect input -i- '" ni- ~~ ?;5 ~~ "0 .." ..ii: ~ n5 ~~ the ad892e/ad892t provides both level and time-domain qualification. level qualification is performed on half cycles of the rectified data waveform using a user-defined threshold level which is applied to the level qualification comparator. the out- put of this comparator drives the data input of a master. slave flip-flop. a second, matched comparator detects zero-crossings and clocks the flip-flop. each valid zero-crossing causes a time- domain filter one-shot to generate a pulse with a user-defined period. during the one-shot period the flip-flop is disabled, pre- venting the detection of additional zero-crossing events. this technique prevents single-bit errors from being propagated into two-bit errors. the zero-crossing event also triggers an output one-shot, again with a user defined pulse width. for maximum flexibility, the data output is a schortky open-collector transistor with a separate digital ground to minimize digital feedthrough (ad892t) or differential ecl (ad892e). the ad892e1ad892t is available in a 44-pin plastic leaded chip carrier (plcc) and is specified to operate over the com- mercial (0 to + 70cc) temperature range. -1- obsolete
analog devices fax-on-demand hotline - page 13 pin assignents ordering guide m""'r-"""""'-""""'" . ",-",.., m.mmmm.mm :~: :~~ ;...1-.,:: ~:i~~~~ ~~~i.p ti 0 n..",...,'t-..: ~:: g e.,?~t~~: ~,~892'~lf_l~~in i~l~c_.m m._ly.-44~ -for outline information see pa.:kage information se.:tjon, caution esd (electrostatic discharge) sensitive device. the digital control inputs are diode protected; however, permanent damage may occur on unconnected devices subject to high energy electro- static fields. unused devices must be stored in conductive foam or shunts. the protective foam should be discharged to the destination socket before devices are inserted. ad892e/ad892t pin description + 5 v supply no connection (can be left floating) no connection (can be left floating) mode control bit b (ttl compatible) mode control bit a (ttl compatible) digital ground no connection (can be left floating) "age level set" input voltage variable gain amplifier input (+) variable gain amplifu:r input (- ) "vga level set" input voltage no connection (can be left floating) variable gain amplifier output (-) variable gain amplifier output (+) no connection (can be left floating) #1 12.75 db buffer input (- ) #1 12.75 db buffer input (+) + 12 v supply (analog) # 1 12.75 db buffer output (+ ) # 1 12.75 db buffer output (- ) no connection (can be left floating) sample-and-hold capacitor no connection (can be left floating) #2 12.75 db buffer input (- ) #212.75 db buffer input (+) #2 12.75 db buffer output (+) #2 12.75 db buffer output (- ) analog ground no connection (can be left floating) full wave rectifier input (+) full wave rectifier input (- ) rectified signal to derive threshold rectified signal for differentiator rectified signal to 51h; age attack and decay is programmed at this point zero crossing comparator input (+) zero crossing comparator input (- ) minimum threshold level input signal amplitude comparator input internal voltage reference + 12 v supply (digital) apply resistor to program time domain filter pulse width apply resistor to program output pulse width data output (open collector ad892t) data output (+ ecl ad892e) data output ground (emitter of output device ad892t) data output (- ecl ad892e) --- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 -2- -~-- obsolete
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