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  1 input voltage (v) 0 v out1 current (ma) 330 230 130 280 180 80 10 20 8058 ta01b 30 5 15 25 typical application features description 3.1v in to 31v in isolated module dc/dc converter with ldo post regulator the lt m ? 8058 is a 2kv ac isolated flyback module ? (micromodule) dc/dc converter with ldo post regulator. included in the package are the switching controller, power switches, transformer, ldo, and all support components. operating over an input voltage range of 3.1v to 31v, the LTM8058 supports an output voltage range of 2.5v to 13v, set by a single resistor. there is also a linear post regulator whose output voltage is adjustable from 1.2v to 12v as set by a single resistor. only output and input capacitors are needed to finish the design. other components may be used to control the soft-start control and biasing. the LTM8058 is packaged in a thermally enhanced, com - pact (9mm 11.25mm 4.92mm) overmolded ball grid array (bga) package suitable for automated assembly by standard surface mount equipment. the LTM8058 is available with snpb or rohs compliant terminal finish. l , lt, ltc, ltm, linear technology, the linear logo and module are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. applications n 2kv ac isolated module converter (tested to 3kvdc) n ul60950 recognized file e464570 n wide input voltage range: 3.1v to 31v n v out1 output: up to 440ma (v in = 24v , v out1 = 2.5v) 2.3v to 13v output range n v out2 low noise linear post regulator: up to 300ma 1.2v to 12v output range n current mode control n programmable soft-start n user configurable undervoltage lockout n low profile (9mm 11.25mm 4.92mm) bga package n industrial sensors n industrial switches n ground loop mitigation total output current vs v in 2kv ac isolated low noise module regulator v out2 adj2 byp v out ? LTM8058 162k 8058 ta01a 22f v out1 5.7v v out2 5v 10f v out1 v in run gnd bias adj1 2kvac isolation 4.7f 2.2f v in 4.3v to 29v 6.19k low noise ldo ss   8058f for more information www.linear.com/LTM8058 LTM8058
2 pin configuration absolute maximum ratings v in , run, bias ........................................................ 32v a dj1, ss ..................................................................... 5v v out1 relative to v out C .......................................... +16 v v in + v out1 (note 2) ................................................. 3 6v v out2 relative to v out C .......................................... +20 v adj2 relative to v out C ............................................. +7v b yp relative to v out C ............................................ +0.6 v bias above v in ........................................................ 0.1 v gnd to v out C isolation (note 3) ......................... 2k v ac maximum internal temperature (note 4) .............. 1 25c maximum solder temperature .............................. 25 0c storage temperature .............................. C55c to 125c (note 1) top view h g f e d c b a 1 2 3 4 5 6 7 bank 2 v out ? bank 1 v out1 bank 4 gnd bias run adj2 byp adj1 ss bank 5 v in bank 3 v out2 bga package 38-lead (11.25mm 9mm 4.92mm) t jmax = 125c, v ja = 23.2c/w, v jcbottom = 5.8c/w, v jctop = 23.2c/w, v jb = 6.7c/w weight = 1.1g, v values determined per jedec 51-9, 51-12 part number pad or ball finish part marking* package type msl rating temperature range (note 4) device finish code LTM8058ey#pbf sac305 (rohs) LTM8058y e1 bga 3 C40c to 125c LTM8058iy#pbf sac305 (rohs) LTM8058y e1 bga 3 C40c to 125c LTM8058iy snpb (63/37) LTM8058y e0 bga 3 C40c to 125c LTM8058mpy#pbf sac305 (rohs) LTM8058y e1 bga 3 C55c to 125c LTM8058mpy snpb (63/37) LTM8058y e0 bga 3 C55c to 125c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking: www.linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and t ray drawings: www .linear.com/packaging order information 8058f for more information www.linear.com/LTM8058 LTM8058
3 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: v in + v out1 is defined as the sum of: (v in C gnd) + (v out1 C v out C ) note 3: the LTM8058 isolation is tested at 3kv dc for one second. note 4: the LTM8058e is guaranteed to meet performance specifications from 0c to 125c. specifications over the C40c to 125c internal temperature range are assured by design, characterization and correlation with statistical process controls. LTM8058i is guaranteed to meet the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c, run = 12v (note 4). parameter conditions min typ max units minimum input dc voltage bias = v in , run = 2v bias open, run = 2v l l 3.1 4.3 v v v out1 dc voltage r adj1 = 12.4k r adj1 = 6.98k r adj1 = 3.16k l 4.75 2.5 5 12 5.25 v v v v in quiescent current v run = 0v not switching 850 1 a a v out1 line regulation 6v v in 31v, i out = 0.15a, run = 2v 1.7 % v out1 load regulation 0.05a i out 0.2a, run = 2v 1.5 % v out1 ripple (rms) i out = 0.1a, 1mhz bw 20 mv input short-circuit current v out1 shorted 30 ma run pin input threshold run pin rising 1.18 1.24 1.30 v run pin current v run = 1v v run = 1.3v 2.5 0.1 a a ss threshold 0.7 v ss sourcing current ss = 0v C10 a bias current v in = 12v, bias = 5v, i load1 = 100ma 8 ma minimum bias voltage (note 5) i load1 = 100ma 3.1 v ldo (v out2 ) minimum input dc voltage (note 6) 1.8 2.3 v v out2 voltage range v out1 = 16v, r adj2 open, no load (note 6) v out1 = 16v, r adj2 = 41.2k, no load (note 6) 1.22 15.8 v v adj2 pin voltage v out1 = 2v, i out2 = 1ma (note 6) v out1 = 2v, i out2 = 1ma (note 6) l 1.19 1.22 1.25 v v v out2 line regulation 2v < v out1 < 16v, i out2 = 1ma (note 6) 1 5 mv v out2 load regulation v out1 = 5v, 10ma < i out2 = 300ma (note 6) 2 10 mv ldo dropout voltage i out2 = 10ma (note 6) i out2 = 100ma (note 6) i out2 = 300ma (note 6) 0.25 0.34 0.43 v v v v out2 ripple (rms) c byp = 0.01f, i out2 = 300ma, bw = 100hz to 100khz (note 6) 20 v rms specifications over the full C40c to 125c internal operating temperature range. the LTM8058mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 5: this is the bias pin voltage at which the internal circuitry is powered through the bias pin and not the integrated regulator. see bias pin considerations for details. note 6: v run = 0v (flyback not running), but the v out2 post regulator is powered by applying a voltage to v out1 . 8058f for more information www.linear.com/LTM8058 LTM8058
4 typical performance characteristics efficiency vs output current efficiency vs output current input current vs output current efficiency vs output current efficiency vs output current input current vs output current efficiency vs output current input current vs output current input current vs output current unless otherwise noted, operating conditions are as in t able 1 (t a = 25c). output current (ma) 0 efficiency (%) 60 65 400 8058 g01 55 50 100 200 300 75 12v in v out1 = 2.5v bias = 5v 24v in 70 output current (ma) 0 50 efficiency (%) 55 60 65 70 12v in 24v in 75 80 v out1 = 3.3v bias = 5v 100 200 300 400 8058 g02 output current (ma) 0 50 efficiency (%) 55 60 65 70 12v in 24v in 75 80 v out1 = 5v bias = 5v 100 200 300 400 8058 g03 output current (ma) 0 85 12v in 24v in 80 75 70 65 60 55 50 150 250 8058 g04 50 100 200 300 efficiency (%) v out1 = 8v bias = 5v output current (ma) 0 70 75 85 12v in 24v in 150 8058 g05 65 60 50 100 200 55 50 80 efficiency (%) v out1 = 12v bias = 5v output current (ma) 1 input current (ma) 50 60 70 400 8058 g06 40 30 20 0 100 200 300 10 90 12v in 24v in v out1 = 2.5v bias = 5v 80 output current (ma) 0 0 input current (ma) 10 30 40 50 100 12v in 24v in 70 100 200 8058 g07 20 80 90 60 300 400 v out1 = 3.3v bias = 5v output current (ma) 0 80 100 140 12v in 24v in 300 8058 g08 60 40 100 200 400 20 0 120 input current (ma) v out1 = 5v bias = 5v output current (ma) 0 0 input current (ma) 20 60 80 100 200 180 12v in 24v in 8058 g09 40 100 50 250 150 300 120 140 160 v out1 = 8v bias = 5v 8058f for more information www.linear.com/LTM8058 LTM8058
5 typical performance characteristics input current vs output current bias current vs output current bias current vs output current maximum output current vs v in maximum output current vs v in minimum required load vs input voltage bias current vs output current bias current vs output current bias current vs output current unless otherwise noted, operating conditions are as in t able 1 (t a = 25c). output current (ma) 0 0 input current (ma) 20 60 80 100 200 12v in 24v in 140 50 100 8058 g10 40 160 180 120 150 200 v out1 = 12v bias = 5v output current (ma) 1 bias current (ma) 5 6 7 400 8058 g11 4 3 2 0 100 200 300 1 9 12v in 24v in v out1 = 2.5v bias = 5v 8 output current (ma) 0 0 bias current (ma) 1 3 4 5 10 7 100 200 8058 g12 2 8 9 6 300 400 v out1 = 3.3v bias = 5v 12v in 24v in output current (ma) 0 6 8 12 12v in 24v in 300 8058 g13 4 2 100 200 400 0 10 bias current (ma) v out1 = 5v bias = 5v output current (ma) 0 0 bias current (ma) 2 4 6 8 12 12v in 24v in 50 100 150 200 8058 g14 250 300 10 v out1 = 8v bias = 5v output current (ma) 0 8 10 14 12v in 24v in 150 8058 g15 6 4 50 100 200 2 0 12 bias current (ma) v out1 = 12v bias = 5v v in (v) 0 0 maximum output current (ma) 100 200 300 400 500 5 10 15 20 8058 g16 25 30 v out1 = 2.5v v out1 = 3.3v v out1 = 5v bias = 5v for v in 5v bias = v in for v in < 5v v in (v) 0 0 maximum output current (ma) 100 200 300 400 5 10 15 20 8058 g17 25 30 v out1 = 8v v out1 = 12v bias = 5v for v in 5v bias = v in for v in < 5v input voltage (v) 0 maximum required load (ma) 25 30 35 40 8058 g18 20 15 10 0 10 20 30 5 45 40 v out1 = 2.5v v out1 = 3.3v v out1 = 5v bias = 5v for v in 5v bias = v in for v in < 5v 8058f for more information www.linear.com/LTM8058 LTM8058
6 minimum required load vs input voltage typical performance characteristics typical output ripple 100ma output current, v in = 12v dc1988 v out1 start-up behavior for different c ss values typical switching frequency vs output current stock dc1988a unless otherwise noted, operating conditions are as in t able 1 (t a = 25c). input voltage (v) 0 *see applications information section for discussion of 12v out minimum load 0 minimum required load (ma) 5 10 15 20 25 5 10 15 20 8058 g19 25 30 v out1 = 8v v out1 = 12v* bias = 5v for v in 5v bias = v in for v in < 5v v out1 5mv/div v out2 500v/div 500ns/div measured on dc1988 with addional 1f and bnc attached to output terminals. c7 = 0.1f. used hp461a 150mhz amplifier, set to 40db gain. 8058 g20 1v/div c ss = 0.01f c ss = 0.1f no c ss 200s/div 100ma resistive load 8058 g21 output current (ma) 0 0 switching frequency (khz) 100 300 400 500 100 200 250 900 5v in 12v in 8058 g22 200 50 150 600 700 800 input current vs v in , v out1 shorted input current vs v in , v out2 shorted junction temperature rise vs load current junction temperature rise vs load current v out2 dropout v in (v) input current (ma) 80 70 60 20 40 10 30 50 8058 g23 0 12 32 20 2824 16 84 v in (v) input current (ma) 225 200 175 75 125 50 100 150 8058 g24 0 40 20 30 10 v out2 load current (ma) v out2 dropout voltage (v) 0.7 0.6 0.5 0.4 0.3 0.2 0 0.1 8058 g25 0 100 300 200 250 150 50 ?40c 125c 25c v out2 = 3.3v v out2 load current (ma) temperature rise (c) 10 9 8 4 6 0 5 7 2 3 1 8058 g26 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 1.2v v out2 load current (ma) temperature rise (c) 10 9 8 4 6 0 5 7 2 3 1 8058 g27 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 1.5v 8058f for more information www.linear.com/LTM8058 LTM8058
7 typical performance characteristics unless otherwise noted, operating conditions are as in t able 1 (t a = 25c). junction temperature rise vs load current junction temperature rise vs load current junction temperature rise vs load current junction temperature rise vs load current junction temperature rise vs load current junction temperature rise vs load current v out2 load current (ma) temperature rise (c) 10 9 8 4 6 0 5 7 2 3 1 8058 g28 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 1.8v v out2 load current (ma) temperature rise (c) 10 9 8 4 6 0 5 7 2 3 1 8058 g29 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 2.5v v out2 load current (ma) temperature rise (c) 12 10 8 4 6 0 2 8058 g30 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 3.3v v out2 load current (ma) temperature rise (c) 14 12 10 8 4 6 0 2 8058 g31 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 5v v out2 load current (ma) temperature rise (c) 16 14 12 10 8 4 6 0 2 8058 g32 0 100 300 200 250 150 50 3.3v in 5v in 12v in 24v in v out2 = 8v v out2 load current (ma) temperature rise (c) 16 14 12 10 8 4 6 0 2 8058 g33 0 100 250 200 150 50 3.3v in 5v in 12v in 24v in v out2 = 12v 8058f for more information www.linear.com/LTM8058 LTM8058
8 pin functions v out1 (bank 1): v out1 and v out C comprise the isolated output of the LTM8058 flyback stage. apply an external capacitor between v out1 and v out C . do not allow v out C to exceed v out1 . v out C (bank 2): v out C is the return for both v out1 and v out2 . v out1 and v out C comprise the isolated output of the LTM8058. in most applications, the bulk of the heat flow out of the LTM8058 is through the gnd and v out C pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. apply an external capacitor between v out1 and v out C . v out2 (bank 3): the output of the secondary side linear post regulator. apply the load and output capacitor between v out2 and v out C . see the applications information section for more information on output capacitance and reverse output characteristics. gnd (bank 4): this is the local ground of the LTM8058 primary. in most applications, the bulk of the heat flow out of the LTM8058 is through the gnd and v out C pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. v in (bank 5): v in supplies current to the LTM8058s inter - nal regulator and to the integrated power switch. these pins must be locally bypassed with an external, low esr capacitor . adj2 (pin a2): this is the input to the error amplifier of the secondary side ldo post regulator. this pin is internally clamped to 7v. the adj2 pin voltage is 1.22v referenced to v out C and the output voltage range is 1.22v to 12v. ap - ply a resistor from this pin to v out C , using the equation r adj2 = 608.78/(v out2 C 1.22)k?. if the post regulator is not used, leave this pin floating. byp (pin b2): the byp pin is used to bypass the refer - ence of the ldo to achieve low noise performance from the linear post regulator. the byp pin is clamped internally to 0.6v relative to v out C . a small capacitor from v out2 to this pin will bypass the reference to lower the output voltage noise. a maximum value of 0.01f can be used for reducing output voltage noise to a typical 20v rms over a 100hz to 100khz bandwidth. if not used, this pin must be left unconnected. run (pin f3): a resistive divider connected to v in and this pin programs the minimum voltage at which the LTM8058 will operate. below 1.24v, the LTM8058 does not deliver power to the secondary. above 1.24v, power will be de - livered to the secondary and 10a will be fed into the ss pin. when run is less than 1.24v , the pin draws 2.5a, allowing for a programmable hysteresis. do not allow a negative voltage (relative to gnd) on this pin. adj1 (pins g7): apply a resistor from this pin to gnd to set the output voltage v out1 relative to v out C , using the recommended value given in table 1. if table 1 does not list the desired v out1 value, the equation r adj1 = 28.4 v out1 C0.879 ( ) k ? may be used to approximate the value. to the seasoned designer, this exponential equation may seem unusual. the equation is exponential due to nonlinear current sources that are used to temperature compensate the regulation. bias (pin h5): this pin supplies the power necessary to operate the LTM8058. it must be locally bypassed with a low esr capacitor of at least 4.7f. do not allow this pin voltage to rise above v in . ss (pin h6): place a soft-start capacitor here to limit inrush current and the output voltage ramp rate. do not allow a negative voltage (relative to gnd) on this pin. 8058f for more information www.linear.com/LTM8058 LTM8058
9 block diagram v in run adj1 *do not allow bias voltage to be above v in gnd 0.1f 1f 499k v out2 v out1 adj2 current mode controller low noise ldo v out ? byp ss bias* 8058 bd   operation the LTM8058 is a stand-alone isolated flyback switching dc/dc power supply that can deliver up to 440ma of output current. this module provides a regulated output voltage programmable via one external resistor from 2.3v to 13v. it is also equipped with a high performance linear post regulator. the input voltage range of the LTM8058 is 3.1v to 31v. given that the LTM8058 is a flyback converter, the output current depends upon the input and output voltages, so make sure that the input voltage is high enough to support the desired output voltage and load current. the typical performance characteristics section gives several graphs of the maximum load versus v in for several output voltages. a simplified block diagram is given. the LTM8058 contains a current mode controller, power switching element, power transformer, power schottky diode, a modest amount of input and output capacitance, and a high performance linear post regulator. the LTM8058 has a galvanic primary to secondary isola - tion rating of 2kv ac. this is verified by applying 3kv dc between the primar y to secondar y for 1 second. note that the 2kv ac isolation is verified by a 3kv dc test. the peak voltage of a 2kv ac waveform is 2.83kv dc, so 3kv dc is applied. for details please refer to the isolation, working voltage and safely compliance section. the LTM8058 is a ul 60950 recognized component. an internal regulator provides power to the control cir - cuitry. the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external voltage higher than 3.1v, bias power will be drawn from the external source, improving efficiency. v bias must not exceed v in . the run pin is used to turn on or off the LTM8058, disconnecting the output and reducing the input current to 1a or less. the LTM8058 is a variable frequency device. for a fixed input and output voltage, the frequency increases as the load increases. for light loads, the current through the internal transformer may be discontinuous. the post regulator is a high performance 300ma low dropout regulator with micropower quiescent current and shutdown. the device is capable of supplying 300ma at a dropout voltage of 430mv. output voltage noise can be lowered to 20v rms over a 100hz to 100khz bandwidth with the addition of a 0.01f reference bypass capacitor. additionally, this reference bypass capacitor will improve transient response of the regulator, lowering the settling time for transient load conditions. the linear regulator is protected against both reverse input and reverse output voltages. 8058f for more information www.linear.com/LTM8058 LTM8058
10 applications information for most applications, the design process is straight forward, summarized as follows: 1. look at table 1a (or t able 1b, if the post linear regula - tor is used) and find the row that has the desired input range and output voltage. 2. apply the recommended c in , c out1 , c out2 , r adj1 , r adj2 and c byp if required. 3. connect bias as indicated, or tie to an external source up to 15v or v in , whichever is less. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current may be limited by junction temperature, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. capacitor selection considerations the c in , c out1 and c out2 capacitor values in table 1 are the minimum recommended values for the associated op - erating conditions. applying capacitor values below those indicated in t able 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessar y. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap - plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8058. a ceramic input capacitor combined with trace or cable inductance forms a high-q (underdamped) tank circuit. if the LTM8058 circuit is plugged into a live supply, the input voltage can ring to much higher than its nominal value, possibly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. LTM8058 table 1a. recommended component values and configuration for specific v out1 voltages (t a = 25c) v in v out1 v bias c in c out1 r adj1 3.1v to 31v 2.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 12.4k 3.1v to 31v 3.3v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10k 3.1v to 29v 5v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 16v, 1210 6.98k 3.1v to 26v 8v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 10v, 1206 4.53k 3.1v to 24v 12v 3.1v to 15v or open 2.2f, 25v, 0805 10f, 16v, 1210 3.16k/8.2pf* 9v to 15v 2.5v v in 2.2f, 50v, 1206 100f, 6.3v, 1210 12.4k 9v to 15v 3.3v v in 2.2f, 50v, 1206 47f, 6.3v, 1210 10k 9v to 15v 5v v in 2.2f, 50v, 1206 22f, 16v, 1210 6.98k 9v to 15v 8v v in 2.2f, 50v, 1206 22f, 10v, 1206 4.53k 9v to 15v 12v v in 2.2f, 25v, 0805 10f, 16v, 1210 3.16k 18v to 31v 2.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 12.4k 18v to 31v 3.3v 3.1v to 15v or open 2.2f, 50v, 1206 47f, 6.3v, 1210 10k 18v to 29v 5v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 16v, 1210 6.98k 18v to 26v 8v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 10v, 1206 4.53k 18v to 24v 12v 3.1v to 15v or open 2.2f, 50v, 1206 10f, 16v, 1210 3.16k/8.2pf* note: do not allow bias to exceed v in , a bulk input capacitor is required. if bias is open, the minimum v in is 4.3v. *connect 3.16k in parallel with 8.2pf from adj1 to gnd 8058f for more information www.linear.com/LTM8058 LTM8058
11 LTM8058 table 1b. recommended component values and configuration for specific v out2 voltages (t a = 25c) v in v out1 v out2 v bias c in c out1 c out2 r adj1 r adj2 3.1v to 31v 2.3v 1.2v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k open 3.1v to 31v 2.3v 1.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k 2.32m 3.1v to 31v 2.3v 1.8v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 13.3k 1.07m 3.1v to 31v 3.08v 2.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 10.5k 487k 3.1v to 31v 3.92v 3.3v 3.1v to 15v or open 2.2f, 50v, 1206 47f, 6.3v, 1210 10f, 6.3v, 1206 8.66k 294k 3.1v to 29v 5.7v 5v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 16v, 1210 10f, 6.3v, 1206 6.19k 162k 3.1v to 26v 8.85v 8v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 10v, 1206 10f, 10v, 1206 4.12k 88.7k 3.1v to 21v 13v 12v 3.1v to 15v or open 2.2f, 25v, 0805 10f, 16v, 1210 22f, 16v, 1206 2.94k/22pf* 56.2k 9v to 15v 2.3v 1.2v v in 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k open 9v to 15v 2.3v 1.5v v in 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k 2.32m 9v to 15v 2.3v 1.8v v in 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 13.3k 1.07m 9v to 15v 3.08v 2.5v v in 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 10.5k 487k 9v to 15v 3.92v 3.3v v in 2.2f, 50v, 1206 47f, 6.3v, 1210 10f, 6.3v, 1206 8.66k 294k 9v to 15v 5.7v 5v v in 2.2f, 50v, 1206 22f, 16v, 1210 10f, 6.3v, 1206 6.19k 162k 9v to 15v 8.85v 8v v in 2.2f, 50v, 1206 22f, 10v, 1206 10f, 10v, 1206 4.12k 88.7k 9v to 15v 13v 12v v in 2.2f, 25v, 0805 10f, 16v, 1210 22f, 16v, 1206 2.94k/22pf* 56.2k 18v to 31v 2.3v 1.2v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k open 18v to 31v 2.3v 1.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 133k 2.32m 18v to 31v 2.3v 1.8v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 13.3k 1.07m 18v to 31v 3.08v 2.5v 3.1v to 15v or open 2.2f, 50v, 1206 100f, 6.3v, 1210 10f, 6.3v, 1206 10.5k 487k 18v to 31v 3.92v 3.3v 3.1v to 15v or open 2.2f, 50v, 1206 47f, 6.3v, 1210 10f, 6.3v, 1206 8.66k 294k 18v to 29v 5.7v 5v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 16v, 1210 10f, 6.3v, 1206 6.19k 162k 18v to 26v 8.85v 8v 3.1v to 15v or open 2.2f, 50v, 1206 22f, 10v, 1206 10f, 10v, 1206 4.12k 88.7k note: do not allow bias to exceed v in , a bulk input capacitor is required. if bias is open, the minimum v in is 4.3v. *connect 2.94k in parallel with 22pf from adj1 to gnd. applications information bias pin considerations the bias pin is the output of an internal linear regulator that powers the LTM8058s internal circuitry. it is set to 3v and must be decoupled with a low esr capacitor of at least 4.7f. the LTM8058 will run properly without applying a voltage to this pin, but will operate more efficiently and dissipate less power if a voltage between 3.1v and v in is applied. at low v in , the LTM8058 will be able to deliver more output current if bias is 3.1v or greater. up to 31v may be applied to this pin, but a high bias voltage will cause excessive power dissipation in the internal circuitry. for applications with an input voltage less than 15v, the bias pin is typically connected directly to the v in pin. for input voltages greater than 15v, it is preferred to leave the bias pin separate from the v in pin, either powered from a separate voltage source or left running from the internal regulator. this has the added advantage of keeping the physical size of the bias capacitor small. do not allow bias to rise above v in . soft-start for many applications, it is necessary to minimize the inrush current at start-up. the built-in soft-start circuit significantly reduces the start-up current spike and output voltage overshoot by applying a capacitor from ss to gnd. when the LTM8058 is enabled, whether from v in reaching a sufficiently high voltage or run being pulled high, the LTM8058 will source approximately 10a out of the ss pin. as this current gradually charges the capacitor from ss to gnd, the LTM8058 will correspondingly increase the power delivered to the output, allowing for a graceful turn-on ramp. 8058f for more information www.linear.com/LTM8058 LTM8058
12 applications information isolation, working voltage and safety compliance the LTM8058 isolation is 100% hi-pot tested by tying all of the primary pins together, all of the secondary pins together and subjecting the two resultant circuits to a differential of 3kv dc for one second. this establishes the isolation voltage rating of the LTM8058 component. the isolation rating of the LTM8058 is not the same as the working or operational voltage that the application will experience. this is subject to the applications power source, operating conditions, the industry where the end product is used and other factors that dictate design re - quirements such as the gap between copper planes, traces and component pins on the printed cir cuit board, as well as the type of connector that may be used. t o maximize the allowable working voltage, the LTM8058 has two columns of solder balls removed to facilitate the printed circuit board design. the ball to ball pitch is 1.27mm, and the typical ball diameter is 0.78mm. accounting for the missing columns and the ball diameter, the printed circuit board may be designed for a metal-to-metal separation of up to 3.03mm. this may have to be reduced somewhat to allow for tolerances in solder mask or other printed circuit board design rules. for those situations where informa - tion about the spacing of LTM8058 internal circuitry is required, the minimum metal to metal separation of the primary and secondar y is 0.75mm. to reiterate, the manufacturers isolation voltage rating and the required working or operational voltage are often different numbers. in the case of the LTM8058, the isola - tion voltage rating is established by 100% hi-pot testing. the working or operational voltage is a function of the end product and its system level specifications. the ac - tual required operational voltage is often smaller than the manufacturer s isolation rating. the LTM8058 is a ul recognized component under ul 60950, file number e464570. the ul 60950 insula - tion category of the LTM8058 transformer is functional. considering ul 60950 t able 2n and the gap distances stated above, 3.03mm external and 0.75mm internal, the LTM8058 may be operated with up to 250v working voltage in a pollution degree 2 environment. the actual working voltage, insulation category, pollution degree and other critical parameters for the specific end application depend upon the actual environmental, application and safety compliance requirements. it is therefore up to the user to perform a safety and compliance review to ensure that the LTM8058 is suitable for the intended application. v out2 post regulator v out2 is produced by a high performance low dropout 300ma regulator. at full load, its dropout is less than 430mv over temperature. its output is set by applying a resistor from the r adj2 pin to gnd; the value of r adj2 can be calculated by the equation: r adj2 = 608.78 v out2 C 1.22 k ? adj1 and line regulation for v out1 greater than 8v, parasitics in the transformer interacting with the controller cause a localized increase in minimum load. a small capacitor may need to be applied from adj1 to gnd to ensure proper line regulation. care must be taken when choosing this capacitor value. too small or no capacitor will result in poor line regulation; in general, a larger capacitor is needed for higher v out1 . too large of a capacitance will require excessive minimum load to maintain regulation. the plots in figure 1 show LTM8058 line regulation with three different capacitor values applied from adj1 to gnd. v in (v) 0 ?5 deviation (%) ?4 ?2 ?1 0 5 2 6 12 8058 f01 ?3 3 4 1 18 24 no cap 8.2pf cap 12pf cap figure 1. v out1 line regulation vs v in 8058f for more information www.linear.com/LTM8058 LTM8058
13 applications information the plots in figure 2 show the minimum load requirement for the same three capacitors. carefully choose the appropriate capacitor value for the intended application. capacitor, such as a x5r or x7r ceramic, is recommended. this capacitor will bypass the reference of the regulator, lowering the output voltage noise to as low as 20v rms . using a bypass capacitor has the added benefit of improv - ing transient response. safety rated capacitors some applications require safety rated capacitors, which are high voltage capacitors that are specifically designed and rated for ac operation and high voltage surges. these capacitors are often certified to safety standards such as ul 60950, iec 60950 and others. in the case of the l tm8058, a common application of a safety rated capacitor would be to connect it from gnd to v out C . to provide maximum flexibility, the LTM8058 does not include any components between gnd and v out C . any safety capacitors must be added externally. the specific capacitor and circuit configuration for any application depends upon the safety requirements of the system into which the LTM8058 is being designed. table 2 provides a list of possible capacitors and their manufacturers. the application of a capacitor from gnd to v out C may also reduce the high frequency output noise on the output. table 2. safety rated capacitors manufacturer part number description murata electronics ga343dr7gd472kw01l 4700pf, 250v ac,?x7r, 4.5mm 3.2mm capacitor johanson dielectrics 302r29w471kv3e-****-sc 470pf, 250v ac,?x7r, 4.5mm 2mm capacitor syfer technology 1808ja250102jctsp 100pf, 250v ac, c0g, 1808 capacitor pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8058. the LTM8058 is neverthe - less a switching power supply, and care must be taken to minimize electrical noise to ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see input voltage (v) 0 minimum required load (ma) 10 15 24 8058 f02 5 0 6 12 18 25 bias = 5v for v in 5v bias = v in for v in < 5v 20 no cap 8.2pf cap 12pf cap figure 2. minimum required load vs input voltage v out1 to v out C reverse voltage the LTM8058 cannot tolerate a reverse voltage from v out1 to v out C during operation. if v out C raises above v out1 during operation, the LTM8058 may be damaged. to protect against this condition, a low forward drop power schottky diode has been integrated into the LTM8058, anti-parallel to v out1 /v out C . this can protect the output against many reverse voltage faults. reverse voltage faults can be both steady state and transient. an example of a steady-state voltage reversal is accidentally misconnecting a powered LTM8058 to a negative voltage source. an example of transient voltage reversals is a momentary connection to a negative voltage. it is also possible to achieve a v out1 reversal if the load is short circuited through a long cable. the inductance of the long cable forms an lc tank circuit with the v out1 capacitance, which drives v out1 negative. avoid these conditions. v out2 post regulator bypass capacitance and low noise performance the v out2 linear regulator may be used with the addition of a 0.01f bypass capacitor from v out to the byp pin to lower output voltage noise. a good quality low leakage 8058f for more information www.linear.com/LTM8058 LTM8058
14 applications information figure 3 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r adj1 and r adj2 resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connections of the LTM8058. 3. place the c out1 capacitor as close as possible to v out1 and v out C . likewise, place the c out2 capacitor as close as possible to v out2 and v out C . 4. place the c in and c out capacitors such that their ground current flow directly adjacent or underneath the LTM8058. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8058. 6. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed cir cuit board. pay attention to the location and density of the thermal vias in figure 3. the LTM8058 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. figure 3. layout showing suggested external components, planes and thermal vias 8058 f03 bias run adj2 byp adj1 LTM8058 ss c out2 c bias c out1 v out ? v out2 v in v out1 c in thermal/interconnect vias 8058f for more information www.linear.com/LTM8058 LTM8058
15 applications information hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of the LTM8058. however, these capaci - tors can cause problems if the LTM8058 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt - age at the v in pin of the LTM8058 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8058s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the LTM8058 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is adding an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it can be a large component in the circuit. thermal considerations the LTM8058 output current may need to be derated if it is required to operate in a high ambient temperature. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance characteristics section can be used as a guide. these curves were generated by the LTM8058 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance. to that end, the pin configuration section of the data sheet typically gives four thermal coefficients: ja : thermal resistance from junction to ambient jcbottom : thermal resistance from junction to the bot- tom of the product case jctop : thermal resistance from junction to top of the product case jcboard : thermal resistance from junction to the printed circuit board. while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confu - sion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased as follows: ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi - ronment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jcboard is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module converter and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a 8058f for more information www.linear.com/LTM8058 LTM8058
16 figure 4 8058 f04 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance portion of the board. the board temperature is measured a specified distance from the package, using a two-sided, two-layer board. this board is described in jesd 51-9. given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module converter. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a graphical representation of these thermal resistances is given in figure 4. the blue resistances are contained within the module converter, and the green are outside. the die temperature of the LTM8058 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8058. the bulk of the heat flow out of the LTM8058 is through the bottom of the module and the bga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, result - ing in impaired performance or reliability. please refer to the pcb layout section for printed cir cuit board design suggestions. applications information 8058f for more information www.linear.com/LTM8058 LTM8058
17 typical applications 12v flyback converter with low noise bypass 3.3v and 2.5v flyback converter 3.3v flyback converter v out2 maximum output current vs v in v out2 maximum output current vs v in total maximum output current vs v in v in (v) 9 200 output current (ma) 220 240 260 280 300 10 11 12 13 8058 ta02b 14 15 v in (v) 5 output current (ma) 140 180 25 8058 ta03b 100 60 10 15 20 260 220 v in (v) 0 300 350 450 24 8058 ta04b 250 200 8 16 32 150 100 400 output current (ma) v out2 adj2 byp v out ? LTM8058 294k 8058 ta02a 47f (3.9v) v out2 3.3v 10f v out + v in run gnd bias adj1 2kv ac isolation 4.7f 2.2f v in 9v to 15v 8.66k low noise ldo ss   v out2 byp adj2 v out ? LTM8058 56.2k 8058 ta03a 10f 0.01f (13v) v out2 12v 10f v out + v in run gnd bias adj1 2kv ac isolation 4.7f 2.2pf 2.2f v in 5v to 23v 2.49k low noise ldo ss   v out2 adj2 byp v out ? LTM8058 487k 8058 ta04a 100f v out2 2.5v v out1 3.3v 10f v out + v in run gnd bias adj1 2kv ac isolation 4.7f 2.2f v in 3.1v to 32v 3.1v 10k low noise ldo ss   8058f for more information www.linear.com/LTM8058 LTM8058
18 pin function pin function pin function pin function pin function pin function pin function pin function a1 v out2 b1 v out2 c1 - d1 - e1 gnd f1 - g1 v in h1 v in a2 adj2 b2 byp c2 - d2 - e2 gnd f2 - g2 v in h2 v in a3 v out C b3 v out C c3 - d3 - e3 gnd f3 run g3 - h3 - a4 v out C b4 v out C c4 - d4 - e4 gnd f4 gnd g4 gnd h4 gnd a5 v out C b5 v out C c5 - d5 - e5 gnd f5 gnd g5 gnd h5 bias a6 v out1 b6 v out1 c6 - d6 - e6 gnd f6 gnd g6 gnd h6 ss a7 v out1 b7 v out1 c7 - d7 - e7 gnd f7 gnd g7 adj1 h7 gnd pin assignment table (arranged by pin number) package description package photo 8058f for more information www.linear.com/LTM8058 LTM8058
19 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 5. primary datum -z- is seating plane 6. solder ball composition is 96.5% sn/3.0% ag/0.5% cu 7 package row and column labeling may vary among module products. review each package layout carefully ! package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes h g f e d c b a 1234567 pin 1 bga 38 1212 rev a tray pin 1 bevel package in tray loading orientation component pin ?a1? notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (38 places) detail b substrate 0.27 ? 0.37 3.95 ? 4.05 // bbb z a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 4.72 0.50 4.22 0.60 0.60 nom 4.92 0.60 4.32 0.75 0.63 11.25 9.0 1.27 8.89 7.62 max 5.12 0.70 4.42 0.90 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 38 a2 d e e b f g suggested pcb layout top view 0.000 0.635 1.905 0.635 3.175 1.905 4.445 3.175 4.445 3.810 2.540 1.270 3.810 2.540 1.270 0.3175 0.3175 0.000 4.1275 4.7625 ltmxxxxxx module bga package 38-lead (11.25mm 9.00mm 4.92mm) (reference ltc dwg # 05-08-1925 rev a) 7 see notes 8058f for more information www.linear.com/LTM8058 LTM8058
20 ? linear technology corporation 2014 lt 0414 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTM8058 related parts typical application 5v flyback converter with low noise bypass total output current vs v in v in (v) 5 350 400 450 25 8058 ta05b 300 250 10 15 20 30 200 150 100 output current (ma) part number description comments ltm8048 725v dc isolated module converter with ldo post regulatovr 3.1v v in 32v; 2.5v v out1 13v; 1.2v v out2 12v: 1.5w output power ltm8047 725v dc isolated module converter 3.1v v in 32v; 2.5v v out 12v; 1.5w output power ltm8031 ultralow emi 1a module regulator en55022 class b compliant, 3.6v v in 36v; 0.8v v out 10v ltm8032 ultralow emi 2a module regulator en55022 class b compliant, 3.6v v in 36v; 0.8v v out 10v ltm8033 ultralow emi 3a module regulator en55022 class b compliant, 3.6v v in 36v; 0.8v v out 24v ltm4612 ultralow emi 5a module regulator en55022 class b compliant, 5v v in 36v; 3.3v v out 15v ltm8061 li-ion/polymer module battery charger 4.95v v in 32v, 2a charge current, 1-cell and 2-cell, 4.1v or 4.2v per cell ltm4613 ultralow emi 8a module regulator en55022 class b compliant, 5v v in 36v; 3.3v v out 15v v out2 byp adj2 v out ? LTM8058 162k 8058 ta05a 22f 0.01f (5.7v) v out2 5v 10f v out + v in run gnd bias adj1 2kv isolation 4.7f 2.2f v in 5v to 23v 6.19k low noise ldo ss   design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products search 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power sear ch parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. 8058f for more information www.linear.com/LTM8058 LTM8058


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