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fedl610q428-03 issue date: july 25, 2014 ml610q428/ML610Q429 8-bit microcontroller with a built-in lcd driver 1/33 general description this lsi is a high-performance 8-bit cmos microcontroller into which rich peripheral circuits, such as synchronous serial port, uart, i2c bus interface (master), melody driver, battery level detect circuit, rc oscillation type a/d converter, and lcd driver, are incorporated around 8-bit cpu nx-u8/100. the cpu nx-u8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line architecture parallel procesing. the flash rom that is installed as program memory achieves low-voltage low-power consumption operation (read operation) equivalent to mask rom and is most suitable for battery-driven applications. the on-chip debug function that is installed enables program debugging and programming. features ? cpu ? 8-bit risc cpu (cpu name: nx-u8/100) ? instruction system: 16-bit instructions ? instruction set: transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on ? on-chip debug function ? minimum instruction execution time 30.5 s (@32.768 khz system clock) 0.24 4 s (@4.096 mhz system clock) ? internal memory ? internal 48kbyte flash rom (24k 16 bits) (including unusable 1kbyte test area) ? internal 3kbyte data ram (3072 8 bits), 1kbyte display allocation ram (1024 x 8bit) ? internal 192-byte ram for display ? interrupt controller ? 2 non-maskable interrupt sources (inte rnal source: 1, external source: 1) ? 27 maskable interrupt sources (internal sources: 19, external sources: 8) ? time base counter ? low-speed time base counter 1 channel frequency compensation (compensation range: approx. ? 488ppm to +488ppm. compensation accuracy: approx. 0.48ppm) ? high-speed time base counter 1 channel ? watchdog timer ? non-maskable interrupt and reset ? free running ? overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s) ? timers ? 8 bits 2 channels (16-bit configuration available) ? 1 khz timer ? 10 hz/1 hz interrupt function
fedl610q428-03 ml610q428/ML610Q429 2/33 ? pwm ? resolution 16 bits 3 channel ? synchronous serial port ? master/slave selectable ? lsb first/msb first selectable ? 8-bit length/16-bit length selectable ? timer interrupt is used as a seri al clock and selection is possible ? uart ? txd/rxd 1 channel ? bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits ? positive logic/negative logic selectable ? built-in baud rate generator ? i 2 c bus interface ? master function only ? fast mode (400 kbps@ mh ), standard mode (100 kbps@1mh , 50kbps@500khz) ? melody driver ? scale: 29 types (melody sound frequency: 508 hz to 32.768 khz) ? tone length: 63 types ? tempo: 15 types ? buzzer output mode (4 output modes, 8 frequencies, 16 duty levels) ? rc oscillation type a/d converter ? 24-bit counter ? time division 2 channels ? successive approximation type a/d converter ? 12-bit a/d converter ? input 2 channels ? general-purpose ports ? non-maskable interrupt input port 1 channel ? input-only port 10 channels (including secondary functions) ? output-only port 3 channels (including secondary functions) ? input/output port ml610q428: 14 channels (including secondary functions) ML610Q429: 20 channels (including secondary functions) ? lcd driver ? dot matrix can be supported. ml610q428: 1392 dots max. (58 seg 24 com), 1/1 to 1/24 duty ML610Q429: 512 dots max. (64 seg 8 com) , 1/1 to 1/8 duty ? 1/3 or 1/4 bias (built-in bias generation circuit) ? frame frequency selecable (approx. 32hz, 64 hz, 73 hz, 85 hz, and 102 hz) ? bias voltage multiplying clock selectable (8 types) ? contrast adjustment (1/3 bias: 32 steps, 1/4 bias: 20 steps) ? lcd drive stop mode, lcd display mode, all lcds on mode, and all lcds off mode selectable ? programmable display allocation function (available only when 1/1~1/8 duty is selected)
fedl610q428-03 ml610q428/ML610Q429 3/33 ? reset ? reset through the reset_n pin ? power-on reset generation when powered on ? reset when oscillation stop of the low-speed clock is detected ? reset by the watchdog timer (wdt) overflow ? power supply voltage detect function ? judgment voltages: one of 16 levels ? judgment accuracy: 2% (typ.) ? clock ? low-speed clock: (this lsi can not guarantee the operation withoug low-speed clock) crystal oscillation (32.768 khz) ? high-speed clock: built-in rc oscillation (2m/500khz) built-in pll oscillation (8.192 mhz 2.5%), crystal/ceramic oscillation (4.096 mhz), external clock ? selection of high-speed clock mode by software: built-in rc oscillation, built-in pll oscillation, crystal/ceramic oscillation, external clock ? power management ? halt mode: instruction execution by cpu is suspended (peripheral circuits are in operating states). ? stop mode: stop of low-speed oscillation and high-speed oscillation (operations of cpu and peripheral circuits are stopped.) ? clock gear: the frequency of high-speed system clock can be changed by software (1/1, 1/2, 1/4, or 1/8 of the oscillation clock) ? block control function: power down (reset registers and stop clock supply) the circuits of unused peripherals. ? guaranteed operating range ? operating temperature: ? 20 c to 70 c ? operating voltage: v dd = 1.1v to 3.6v
fedl610q428-03 ml610q428/ML610Q429 4/33 ? product name ? s upported function - chip (die) - rom type operating temperature product availability ml610q428- xxxwa flash rom -20c to +70c yes ml610q428p-xxxwa flash rom -40c to +85c - ML610Q429- xxxwa flash rom -20c to +70c yes ML610Q429p-xxxwa flash rom -40c to +85c - -128-pin plastic tqfp - rom type operating temperature product availability ml610q428- xxxtb flash rom -20c to +70c yes ml610q428p-xxxtb flash rom -40c to +85c - ML610Q429- xxxtb flash rom -20c to +70c - ML610Q429p-xxxtb flash rom -40c to +85c - xxx: rom code number (xxx of the blank product is nnn) q:flash rom version p: wide range temperature version wa: chip tb: tqfp
fedl610q428-03 ml610q428/ML610Q429 5/33 block diagram ml610q428 block diagram figure 1 show the block diagram of the ml610q428. "*" indicates the secondary function of each port. figure 1 ml610q428 block diagram program memory (flash) 48kbyte ssio sck0* sin0* sout0* uart rxd0* txd0* i 2 c sda* scl* int 1 ram 2048byte interrupt controller cpu (nx-u8/100) timing controller ea sp on-chip ice instruction decoder bus controller instruction register tbc int 8 int 1 int 1 int 1 wdt int 2 8bit timer 2 int 3 pwm 3 gpio p00 to p03 p10 to p11 p20 to p22 int 5 nmi p30 to p35 p40 to p47 data-bus pwm0* to pwm2* melody int 1 md0* test reset_n osc xt0 xt1 osc0* osc1* lsclk* outclk* bld power v ddl lcd driver com0 to com23 seg0 to seg57 lcd bias v l1 , v l2 , v l3 , v l4 c1 , c2 , c3 , c4 rc-adc 2 cs0* in0* rs0* rt0* crt0* rcm* cs1* in1* rs1* rt1* reset & test alu epsw1 3 psw elr1 3 lr ecsr1 3 dsr/csr pc greg 0 15 v pp v dd v ss v ddx 1khztc int 1 int 1 display ram 192byte display allocation ram 1kbyte
fedl610q428-03 ml610q428/ML610Q429 6/33 ML610Q429 block diagram figure 2 show the block diagram of the ML610Q429. "*" indicates the secondary function of each port. figure 2 ML610Q429 block diagram program memory (flash) 48kbyte ssio sck0* sin0* sout0* uart rxd0* txd0* i 2 c sda* scl* int 1 ram 2048byte interrupt controller cpu (nx-u8/100) timing controller ea sp on-chip ice instruction decoder bus controller instruction register tbc int 8 int 1 int 1 int 1 wdt int 2 8bit timer 2 int 3 pwm 3 gpio p00 to p08 p10 to p11 p20 to p22 int 9 nmi p30 to p35 p40 to p47 data-bus pwm0* to pwm2* melody int 1 md0* test reset_n osc xt0 xt1 osc0* osc1* lsclk* outclk* bld power v ddl lcd driver com0 to com7 seg0 to seg63 lcd bias v l1 , v l2 , v l3 , v l4 c1 , c2 , c3 , c4 rc-adc 2 cs0* in0* rs0* rt0* crt0* rcm* cs1* in1* rs1* rt1* reset & test alu epsw1 3 psw elr1 3 lr ecsr1 3 dsr/csr pc greg 0 15 v pp v dd v ss v ddx 1khztc int 1 int 1 display ram 192byte display allocation ram 1kbyte pa0 to pa5
fedl610q428-03 ml610q428/ML610Q429 7/33 pin configuration ml610q428 tqfp128 pin layout (nc): no connection figure 3 ml610q428 tqfp128 pin configuration com22 com21 com19 com18 com17 com16 com15 com14 com13 com12 com11 com10 com9 com8 seg57 seg56 seg55 seg54 seg53 seg52 seg51 seg50 seg49 seg48 seg47 seg46 seg45 seg44 seg43 (nc) com23 seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11 p20 p21 p22 p40 p41 v pp reset_n p44 p45 p46 p47 p30 p31 p34 p32 p33 p35 test v dd v ddl v ss v ddx xt0 xt1 p42 p43 v l1 v l2 v l3 v l4 c1 c2 p01 p02 p03 nmi v ss p10 (nc) p11 v dd com1 com2 com3 com4 com5 com6 com7 seg0 seg1 seg2 seg3 seg4 seg6 seg8 seg9 seg10 seg7 c3 (nc) c4 seg5 p00 1pin 128pin 64pin 65pin 32pin 33pin 96pin 97pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 91 90 89 88 87 86 85 84 83 82 96 95 94 93 92 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 ml610q428 com0 com20
fedl610q428-03 ml610q428/ML610Q429 8/33 ml610q428 chip dimension c3 1 c4 2 p00 3 p01 4 p02 5 p03 6 nmi 7 vss 8 p10 9 p11 10 vdd 11 com0 12 com1 13 com2 14 com3 15 com4 16 com5 17 com6 18 com7 19 seg0 20 seg1 21 seg2 22 seg3 23 seg4 24 seg5 25 seg6 26 seg7 27 seg8 28 seg9 29 seg10 30 31 seg11 32 seg12 33 seg13 34 seg14 35 seg15 36 seg16 37 seg17 38 seg18 39 seg19 40 seg20 41 seg21 42 seg22 43 seg23 44 seg24 45 seg25 46 seg26 47 seg27 48 seg28 49 seg29 50 seg30 51 seg31 52 seg32 53 seg33 54 seg34 55 seg35 56 seg36 57 seg37 58 seg38 59 seg39 60 seg40 61 seg41 62 seg42 seg43 63 seg44 64 seg45 65 seg46 66 seg47 67 seg48 68 seg49 69 seg50 70 seg51 71 seg52 72 seg53 73 seg54 74 seg55 75 seg56 76 seg57 77 78 com8 79 com9 80 com10 81 com11 82 com12 83 com13 84 com14 85 com15 86 com16 87 com17 88 com18 89 com19 90 com20 91 com21 92 93 com22 com23 94 p20 95 p21 96 p22 97 p40 98 p41 99 vpp 100 reset_n 101 p44 102 p45 103 p46 104 p47 105 p30 106 p31 107 p34 108 p32 109 p33 110 p35 111 test 112 vdd 113 vddl 114 vss 115 vddx 116 xt0 117 xt1 118 p42 119 p43 120 vl1 121 vl2 122 vl3 123 vl4 124 c1 125 c2 428 zf8 device name "428" device name "zf8" chip size: 2.99 mm 3.11 mm pad count: 125 pins minimum pad pitch: 80 m pad aperture: 70 m 70 m chip thickness: 350 m voltage of the rear side of chip: v ss level figure 4 ml610q428 chip dimension note: figure 4 is an image figure of the order of pad, and it differs from an actual image. refer to the pad coordinate for detailed arrangement. a chip angle can be checked by the distinguishing mark of three figures.
fedl610q428-03 ml610q428/ML610Q429 9/33 ML610Q429 chip dimension c3 1 c4 2 p00 3 p01 4 p02 5 p03 6 nmi 7 vss 8 p10 9 p11 10 vdd 11 com0 12 com1 13 com2 14 com3 15 com4 16 com5 17 com6 18 com7 19 seg0 20 seg1 21 seg2 22 seg3 23 seg4 24 seg5 25 seg6 26 seg7 27 seg8 28 seg9 29 seg10 30 31 seg11 32 seg12 33 seg13 34 seg14 35 seg15 36 seg16 37 seg17 38 seg18 39 seg19 40 seg20 41 seg21 42 seg22 43 seg23 44 seg24 45 seg25 46 seg26 47 seg27 48 seg28 49 seg29 50 seg30 51 seg31 52 seg32 53 seg33 54 seg34 55 seg35 56 seg36 57 seg37 58 seg38 59 seg39 60 seg40 61 seg41 62 seg42 seg43 63 seg44 64 seg45 65 seg46 66 seg47 67 seg48 68 seg49 69 seg50 70 seg51 71 seg52 72 seg53 73 seg54 74 seg55 75 seg56 76 seg57 77 78 com8 79 com9 80 com10 81 com11 82 com12 83 com13 84 com14 85 com15 86 com16 87 com17 88 com18 89 com19 90 com20 91 com21 92 93 com22 com23 94 p20 95 p21 96 p22 97 p40 98 p41 99 vpp 100 reset_n 101 p44 102 p45 103 p46 104 p47 105 p30 106 p31 107 p34 108 p32 109 p33 110 p35 111 test 112 vdd 113 vddl 114 vss 115 vddx 116 xt0 117 xt1 118 p42 119 p43 120 vl1 121 vl2 122 vl3 123 vl4 124 c1 125 c2 428 zf8 device name "428" device name "zf8" chip size: 2.99 mm 3.11 mm pad count: 125 pins minimum pad pitch: 80 m pad aperture: 70 m 70 m chip thickness: 350 m voltage of the rear side of chip: v ss level figure 5 ML610Q429 chip dimension note: figure 5 is an image figure of the order of pad, and it differs from an actual image. refer to the pad coordinate for detailed arrangement. a chip angle can be checked by the distinguishing mark of three figures.
fedl610q428-03 ml610q428/ML610Q429 10/33 pin list pad no. primary function secondary function tertiary function q429 q428 pin name i/o function pin name i/o function pin name i/o function 8,114 8,114 vss ? negative power supply pin ? ? ? ? ? ? 11,112 11,112 v dd ? positive power supply pin ? ? ? ? ? ? 113 113 v ddl ? power supply pin for internal logic (internally generated) ? ? ? ? ? ? 115 115 v ddx ? power supply pin for low-speed oscillation (internally generated) ? ? ? ? ? ? 99 99 v pp ? power supply pin for flash rom ? ? ? ? ? ? 120 120 v l1 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 121 121 v l2 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 122 122 v l3 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 123 123 v l4 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 124 124 c1 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 125 125 c2 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 1 1 c3 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 2 2 c4 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 111 111 test i/o input/output pin for testing ? ? ? ? ? ? 100 100 reset_n i reset input pin ? ? ? ? ? ? 116 116 xt0 i low-speed clock oscillation pin ? ? ? ? ? ? 117 117 xt1 o low-speed clock oscillation pin ? ? ? ? ? ? 7 7 nmi i non-maskable interrupt pin ? ? ? ? ? ? 3 3 p00/exi0 i input port, external interrupt 0 input ? ? ? ? ? ? 4 4 p01/exi1 i input port, external interrupt 1 input ? ? ? ? ? ? 5 5 p02/exi2 /rxd0 /p2ck i input port, external interrupt 2, uart0 receive, pwm2 external clock input ? ? ? ? ? ? 6 6 p03/exi3 i input port, external interrupt 3 ? ? ? ? ? ? 90 ? p04/exi4 i/o input port, external interrupt 4 ? ? ? ? ? ? 91 ? p05/exi5 i/o input port, external interrupt 5 ? ? ? ? ? ? 92 ? p06/exi6 i/o input port, external interrupt 6 ? ? ? ? ? ? 93 ? p07/exi7 i/o input port, external ? ? ? ? ? ?
fedl610q428-03 ml610q428/ML610Q429 11/33 pad no. primary function secondary function tertiary function q429 q428 pin name i/o function pin name i/o function pin name i/o function interrupt 7 9 9 p10 i input port osc0 i high-speed oscillation ? ? ? 10 10 p11 i input port osc1 o high-speed oscillation ? ? ? 94 94 p20/led0 o output port lsclk o low-speed clock output pwm2 o pwm2 output 95 95 p21/led1 o output port outclk o high-speed clock output ? ? ? 96 96 p22/led2 o output port md0 o melody output ? ? ? 105 105 p30 i/o input/output port in0 i rc type adc0 oscillation input pin pwm2 o pwm2 output 106 106 p31 i/o input/output port cs0 o rc type adc0 reference capacitor connection pin ? ? ? 108 108 p32 i/o input/output port rs0 o rc type adc0 reference resistor connection pin ? ? ? 109 109 p33 i/o input/output port rt0 o rc type adc0 resistor sensor connection pin ? ? ? 107 107 p34 i/o input/output port rct0 o rc type adc0 resistor/capacitor sensor connection pin pwm0 o pwm0 output 110 110 p35 i/o input/output port rcm o rc type adc oscillation monitor pwm1 o pwm1 output 97 97 p40 i/o input/output port sda i/o i 2 c data input/output sin0 i ssio data input 98 98 p41 i/o input/output port scl i/o i 2 c clock input/output sck0 i/o ssio synchronous clock 118 118 p42 i/o input/output port rxd0 i uart data input sout0 o ssio data output 119 119 p43 i/o input/output port txd0 o uart data output pwm0 o pwm0 output 101 101 p44/t02p 0ck i/o input/output port, timer 0/timer 2/pwm0 external clock input in1 i rc type adc1 oscillation input pin sin0 i ssio0 data input 102 102 p45/t13p 1ck i/o input/output port, timer 1/timer 3/pwm1 external clock input cs1 o rc type adc1 reference capacitor connection pin sck0 i/o ssio0 synchronous clock 103 103 p46/t46p 2ck i/o input/output port, pwm2 external clock input rs1 o rc type adc1 reference resistor connection pin sout0 o ssio0 data output 104 1004 p47 i/o input/output port rt1 o rc type adc1 resistor sensor connection pin pwm1 o pwm1 output 84 ? pa0 i/o input/output port ? ? ? ? ? ? 85 ? pa1 i/o input/output port ? ? ? ? ? ? 86 ? pa2 i/o input/output port ? ? ? ? ? ? 87 ? pa3 i/o input/output port ? ? ? ? ? ? 88 ? pa4 i/o input/output port ? ? ? ? ? ? 89 ? pa5 i/o input/output port ? ? ? ? ? ? 12 12 com0 o lcd common pin ? ? ? ? ? ? 13 13 com1 o lcd common pin ? ? ? ? ? ? 14 14 com2 o lcd common pin ? ? ? ? ? ? 15 15 com3 o lcd common pin ? ? ? ? ? ? 16 16 com4 o lcd common pin ? ? ? ? ? ? 17 17 com5 o lcd common pin ? ? ? ? ? ? 18 18 com6 o lcd common pin ? ? ? ? ? ? 19 19 com7 o lcd common pin ? ? ? ? ? ? ? 78 com8 o lcd common pin ? ? ? ? ? ? ? 79 com9 o lcd common pin ? ? ? ? ? ? ? 80 com10 o lcd common pin ? ? ? ? ? ? ? 81 com11 o lcd common pin ? ? ? ? ? ? ? 82 com12 o lcd common pin ? ? ? ? ? ? ? 83 com13 o lcd common pin ? ? ? ? ? ? ? 84 com14 o lcd common pin ? ? ? ? ? ? ? 85 com15 o lcd common pin ? ? ? ? ? ?
fedl610q428-03 ml610q428/ML610Q429 12/33 pad no. primary function secondary function tertiary function q429 q428 pin name i/o function pin name i/o function pin name i/o function ? 86 com16 o lcd common pin ? ? ? ? ? ? ? 87 com17 o lcd common pin ? ? ? ? ? ? ? 88 com18 o lcd common pin ? ? ? ? ? ? ? 89 com19 o lcd common pin ? ? ? ? ? ? ? 90 com20 o lcd common pin ? ? ? ? ? ? ? 91 com21 o lcd common pin ? ? ? ? ? ? ? 92 com22 o lcd common pin ? ? ? ? ? ? ? 93 com23 o lcd common pin ? ? ? ? ? ? 20 20 seg0 o lcd segment pin ? ? ? ? ? ? 21 21 seg1 o lcd segment pin ? ? ? ? ? ? 22 22 seg2 o lcd segment pin ? ? ? ? ? ? 23 23 seg3 o lcd segment pin ? ? ? ? ? ? 24 24 seg4 o lcd segment pin ? ? ? ? ? ? 25 25 seg5 o lcd segment pin ? ? ? ? ? ? 26 26 seg6 o lcd segment pin ? ? ? ? ? ? 27 27 seg7 o lcd segment pin ? ? ? ? ? ? 28 28 seg8 o lcd segment pin ? ? ? ? ? ? 29 29 seg9 o lcd segment pin ? ? ? ? ? ? 30 30 seg10 o lcd segment pin ? ? ? ? ? ? 31 31 seg11 o lcd segment pin ? ? ? ? ? ? 32 32 seg12 o lcd segment pin ? ? ? ? ? ? 33 33 seg13 o lcd segment pin ? ? ? ? ? ? 34 34 seg14 o lcd segment pin ? ? ? ? ? ? 35 35 seg15 o lcd segment pin ? ? ? ? ? ? 36 36 seg16 o lcd segment pin ? ? ? ? ? ? 37 37 seg17 o lcd segment pin ? ? ? ? ? ? 38 38 seg18 o lcd segment pin ? ? ? ? ? ? 39 39 seg19 o lcd segment pin ? ? ? ? ? ? 40 40 seg20 o lcd segment pin ? ? ? ? ? ? 41 41 seg21 o lcd segment pin ? ? ? ? ? ? 42 42 seg22 o lcd segment pin ? ? ? ? ? ? 43 43 seg23 o lcd segment pin ? ? ? ? ? ? 44 44 seg24 o lcd segment pin ? ? ? ? ? ? 45 45 seg25 o lcd segment pin ? ? ? ? ? ? 46 46 seg26 o lcd segment pin ? ? ? ? ? ? 47 47 seg27 o lcd segment pin ? ? ? ? ? ? 48 48 seg28 o lcd segment pin ? ? ? ? ? ? 49 49 seg29 o lcd segment pin ? ? ? ? ? ? 50 50 seg30 o lcd segment pin ? ? ? ? ? ? 51 51 seg31 o lcd segment pin ? ? ? ? ? ? 52 52 seg32 o lcd segment pin ? ? ? ? ? ? 53 53 seg33 o lcd segment pin ? ? ? ? ? ? 54 54 seg34 o lcd segment pin ? ? ? ? ? ? 55 55 seg35 o lcd segment pin ? ? ? ? ? ? 56 56 seg36 o lcd segment pin ? ? ? ? ? ? 57 57 seg37 o lcd segment pin ? ? ? ? ? ? 58 58 seg38 o lcd segment pin ? ? ? ? ? ? 59 59 seg39 o lcd segment pin ? ? ? ? ? ? 60 60 seg40 o lcd segment pin ? ? ? ? ? ? 61 61 seg41 o lcd segment pin ? ? ? ? ? ? 62 62 seg42 o lcd segment pin ? ? ? ? ? ? 63 63 seg43 o lcd segment pin ? ? ? ? ? ? 64 64 seg44 o lcd segment pin ? ? ? ? ? ?
fedl610q428-03 ml610q428/ML610Q429 13/33 pad no. primary function secondary function tertiary function q429 q428 pin name i/o function pin name i/o function pin name i/o function 65 65 seg45 o lcd segment pin ? ? ? ? ? ? 66 66 seg46 o lcd segment pin ? ? ? ? ? ? 67 67 seg47 o lcd segment pin ? ? ? ? ? ? 68 68 seg48 o lcd segment pin ? ? ? ? ? ? 69 69 seg49 o lcd segment pin ? ? ? ? ? ? 70 70 seg50 o lcd segment pin ? ? ? ? ? ? 71 71 seg51 o lcd segment pin ? ? ? ? ? ? 72 72 seg52 o lcd segment pin ? ? ? ? ? ? 73 73 seg53 o lcd segment pin ? ? ? ? ? ? 74 74 seg54 o lcd segment pin ? ? ? ? ? ? 75 75 seg55 o lcd segment pin ? ? ? ? ? ? 76 76 seg56 o lcd segment pin ? ? ? ? ? ? 77 77 seg57 o lcd segment pin ? ? ? ? ? ? 78 ? seg58 o lcd segment pin ? ? ? ? ? ? 79 ? seg59 o lcd segment pin ? ? ? ? ? ? 80 ? seg60 o lcd segment pin ? ? ? ? ? ? 81 ? seg61 o lcd segment pin ? ? ? ? ? ? 82 ? seg62 o lcd segment pin ? ? ? ? ? ? 83 ? seg63 o lcd segment pin ? ? ? ? ? ?
fedl610q428-03 ml610q428/ML610Q429 14/33 pin description pin name i/o description primary/ secondary/ tertiary logic system reset_n i reset input pin. when this pin is set to a ?l? level, system reset mode is set and the internal section is initialized. when this pin is set to a ?h? level subsequently, program execution starts. a pull-up resistor is internally connected. ? negative xt0 i ? ? xt1 o crystal connection pin for low-speed clock. a 32.768 khz crystal oscillator (see measuring circuit 1) is connected to this pin. capacitors cdl and cgl are connected across this pin and v ss as required. ? ? osc0 i secondary ? osc1 o crystal/ceramic connection pin for high-speed clock. a crystal or ceramic is connected to this pin (4.1 mhz max.). capacitors cdh and cgh (see measuring circuit 1) are connected across this pin and v ss . this pin is used as the secondary function of the p10 pin(osc0) and p11 pin(osc1). secondary ? lsclk o low-speed clock output pin. this pin is used as the secondary function of the p20 pin. secondary ? outclk o high-speed clock output pin. this pin is used as the secondary function of the p21 pin. secondary ? general-purpose input port p00-p03 i general-purpose input port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive p04-p07 i general-purpose input port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. these pins are for the ML610Q429, but are not provided in the ml610q428. primary positive p10-p11 i general-purpose input port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose output port p20-p22 o general-purpose output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose input/output port p30-p35 i/o general-purpose input/output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive p40-p47 i/o general-purpose input/output port. since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. primary positive pa0-pa5 i/o general-purpose input/output port. these pins are for the ML610Q429, but are not provided in the ml610q428. primary positive
fedl610q428-03 ml610q428/ML610Q429 15/33 pin name i/o description primary/ secondary/ tertiary logic uart txd0 o uart data output pin. this pin is used as the secondary function of the p43 pin. secondary positive rxd0 i uart data input pin. this pin is used as the secondary function of the p42 or the primary function of the p02 pin. primary/se condary positive i 2 c bus interface sda i/o i 2 c data input/output pin. this pin is used as the secondary function of the p40 pin. this pin has an nmos open drain output. when using this pin as a function of the i 2 c, externally connect a pull-up resistor. secondary positive scl o i 2 c clock output pin. this pin is used as the secondary function of the p41 pin. this pin has an nmos open drain output. when using this pin as a function of the i 2 c, externally connect a pull-up resistor. secondary positive synchronous serial (ssio) sck0 i/o synchronous serial clock input/output pin. this pin is used as the tertiary function of the p41 or p45 pin. tertiary ? sin0 i synchronous serial data input pin. this pin is used as the tertiary function of the p40 or p44 pin. tertiary positive sout0 o synchronous serial data output pin. this pin is used as the tertiary function of the p42 or p46 pin. tertiary positive pwm pwm0 o pwm0 output pin. this pin is used as the tertiary function of the p43 or p34 pin. tertiary positive t0p0ck i pwm0 external clock input pin. this pin is used as the primary function of the p44 pin. primary ? pwm1 o pwm1 output pin. this pin is used as the tertiary function of the p47 or p35 pin. tertiary positive t1p1ck i pwm1 external clock input pin. this pin is used as the primary function of the p45 pin. primary ? pwm2 o pwm2 output pin. this pin is used as the tertiary function of the p20 or p30 pin. tertiary positive p2ck i pwm2 external clock input pin. this pin is used as the primary function of the p02 pin. primary ? external interrupt nmi i external non-maskable interrupt input pin. an interrupt is generated on both edges. primary positive/ negative exi0-7 i external maskable interrupt input pins. interrupt enable and edge selection can be performed for each bit by software. these pins are used as the primary functions of the p00-p07 pins. primary positive/ negative timer t0p0ck i external clock input pin used for timer 0. this pin is used as the primary function of the p44 pin. primary ? t1p1ck i external clock input pin used for timer 1. this pin is used as the primary function of the p45 pin. primary ? melody md0 o melody/buzzer signal output pin. this pin is used as the secondary function of the p22 pin. secondary positive/ negative led drive led0-2 o nch open drain output pins to drive led. primary positive/ negative
fedl610q428-03 ml610q428/ML610Q429 16/33 pin name i/o description primary/ secondary/ tertiary logic rc oscillation type a/d converter in0 i channel 0 oscillation input pin. this pin is used as the secondary function of the p30 pin. secondary ? cs0 o channel 0 reference capacitor connection pin. this pin is used as the secondary function of the p31 pin. secondary ? rs0 o this pin is used as the secondary function of the p32 pin which is the reference resistor connection pin of channel 0. secondary ? rt0 o resistor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p34 pin. secondary ? crt0 o resistor/capacitor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p33 pin. secondary ? rcm o rc oscillation monitor pin. this pin is used as the secondary function of the p35 pin. secondary ? in1 i oscillation input pin of channel 1. this pin is used as the secondary function of the p44 pin. secondary ? cs1 o reference capacitor connection pin of channel 1. this pin is used as the secondary function of the p45 pin. secondary ? rs1 o reference resistor connection pin of channel 1. this pin is used as the secondary function of the p46 pin. secondary ? rt1 o resistor sensor connection pin for measurement of channel 1. this pin is used as the secondary function of the p47 pin. secondary ? lcd drive signal com0-7 o common output pins. ? ? com8-23 o common output pins. these pins are for the ml610q428, but are not provided in the ML610Q429. ? ? seg0-57 o segment output pin. ? ? seg58-63 o segment output pins. these pins are for the ML610Q429, but are not provided in the ml610q428. ? ? lcd driver power supply v l1 ? ? ? v l2 ? ? ? v l3 ? ? ? v l4 ? power supply pins for lcd bias (internally generated). capacitors ca, cb, cc, and cd (see measuring circuit 1) are connected between v ss and v l1 , v l2 , v l3 , and v l4 , respectively. ? ? c1 ? ? ? c2 ? ? ? c3 ? ? ? c4 ? power supply pins for lcd bias (internally generated). capacitors c12 and c34 (see measuring circuit 1) are connected between c1 and c2 and between c3 and c4, respectively. ? ? for testing test i/o input/output pin for testing. a pull-down resistor is internally connected. ? ? power supply v ss ? negative power supply pin. ? ? v dd ? positive power supply pin. ? ? v ddl ? positive power supply pin (internally generated) for internal logic. capacitors cl0 and cl1 (see measuring circuit 1) are connected between this pin and v ss . ? ? v ddx ? plus-side power supply pin (internally generated) for low-speed oscillation. capacitor cx (see measuring circuit 1) is connected between this pin and v ss . ? ? v pp ? power supply pin for programming flash rom. a pull-up resistor is internally connected. ? ?
fedl610q428-03 ml610q428/ML610Q429 17/33 termination of unused pins table 3 shows methods of terminating the unused pins. table 3 termination of unused pins pin recommended pin termination v pp open v l1 , v l2 , v l3 , v l4 open c1, c2, c3, c4 open reset_n open test open nmi open p00 to p07 v dd or v ss p10 to p11 v dd p20 to p22 open p30 to p35 open p40 to p47 open pa0 to pa5 open com0 to 23 open seg0 to 63 open note: it is recommended to set the unused input ports and input/output ports to the inputs with pull-down resistors/pull-up resistors or the output mode since the supply current may become excessively large if the pins are left open in the high impedance input setting. the main difference points of ml610q428 and ML610Q429 table 4 the main difference points of ml610q428 and ML610Q429. function ml610q428 ML610Q429 port0 p03 to p00 p07 to p00 porta nothing pa5 to pa0 lcd com com23 to com0 com7 to com0 lcd seg seg57 to seg0 seg63 to seg0
fedl610q428-03 ml610q428/ML610Q429 18/33 electrical characteristics absolute maximum ratings (v ss = 0v) parameter symbol condition rating unit power supply voltage 1 v dd ta = 25 c ? 0.3 to +4.6 v power supply voltage 2 v pp ta = 25 c ? 0.3 to +9.5 v power supply voltage 3 v ddl ta = 25 c ? 0.3 to +3.6 v power supply voltage 4 v ddx ta = 25 c ? 0.3 to +3.6 v power supply voltage 5 v l1 ta = 25 c ? 0.3 to +1.75 v power supply voltage 6 v l2 ta = 25 c ? 0.3 to +3.5 v power supply voltage 7 v l3 ta = 25 c ? 0.3 to +5.25 v power supply voltage 8 v l4 ta = 25 c ? 0.3 to +7.0 v input voltage v in ta = 25 c ? 0.3 to v dd +0.3 v output voltage v out ta = 25 c ? 0.3 to v dd +0.3 v output current 1 i out1 port3?a, ta = 25 c ? 12 to +11 ma output current 2 i out2 port2, ta = 25 c ? 12 to +20 ma power dissipation pd ta = 25 c 122 mw storage temperature t stg ? ? 55 to +150 c recommended operat ing conditions (v ss = 0v) parameter symbol condition range unit operating temperature t op ? ? 20 to +70 c operating voltage v dd ? 1.1 to 3.6 v v dd = 1.1 to 3.6v 30k to 36k v dd = 1.3 to 3.6v 30k to 650k operating frequency (cpu) f op v dd = 1.8 to 3.6v 30k to 4.2m hz c l0 ? 1.0 30% capacitor externally connected to v ddl pin c l1 ? 0.1 30% f capacitor externally connected to v ddx pin c x ? 0.1 30% f capacitors externally connected to v l1, 2, 3, 4 pins c a, b, c, d ? 1.0 30% f capacitors externally connected across c1 and c2 pins and across c3 and c4 pins c 12, c 34 ? 1.0 30% f
fedl610q428-03 ml610q428/ML610Q429 19/33 clock generation circuit operating conditions (v ss = 0v) rating parameter symbol condition min. typ. max. unit low-speed crystal oscillation frequency f xtl ? ? 32.768k ? hz recommended equivalent series resistance value of low-speed crystal oscillation r l ? ? ? 40k ? c l =6pf of crystal oscillation *2 ? 0 ? c l =9pf of crystal oscillation ? 6 ? low-speed crystal oscillation external capacitor *1 c dl /c gl c l =12pf of crystal oscillation ? 12 ? pf high-speed crystal/ceramic oscillation frequency f xth ? ? 4.0m / 4.096m ? hz c dh ? ? 24 ? high-speed crystal oscillation external capacitor c gh ? ? 24 ? pf *1 : the external c dl and c gl need to be adjusted in consideration of variation of internal loading capacitance c d and c g , and other additional capacitance such as pcb layout. *2 : when using a crystal oscillator c l = 6pf, there is a possibility that can not be adjusted by external c dl and c gl .
fedl610q428-03 ml610q428/ML610Q429 20/33 operating conditions of flash rom (v ss = 0v) parameter symbol condition range unit operating temperature t op at write/erase 0 to +40 c v dd at write/erase *1 2.75 to 3.6 v ddl at write/erase *1 2.5 to 2.75 operating voltage v pp at write/erase *1 7.7 to 8.3 v write cycles c ep ? 80 cycles data retention y dr ? 10 years *1 : in addition the power supply to vdd pin and vpp pin, within the range 2.5v to 2.75v has to be supplied to vddl pin when programming and eraseing flash rom. dc characteristics (1/5) (v dd = 1.1 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (1/5) rating parameter symbol condition min. typ. max. unit measuring circuit ta = 25 c typ. ? 10% 500 typ. + 10% khz 500khz rc oscillation frequency f rc v dd = 1.3 to 3.6v ta = ? 20 to +70 c typ. ? 25% 500 typ. + 25% khz pll oscillation frequency* 4 f pll lsclk = 32.768khz v dd = 1.8 to 3.6v -2.5% 8.192 +2.5% mhz low-speed crystal oscillation start time* 2 t xtl ? ? 0.3 2 s 500khz rc oscillation start time t rc ? ? 50 500 s high-speed crystal oscillation start time* 3 t xth v dd = 1.8 to 3.6v D 2 20 pll oscillation start time t pll v dd = 1.8 to 3.6v D 1 10 low-speed oscillation stop detect time *1 t stop ? 0.2 3 20 ms reset pulse width p rst ? 200 ? ? reset noise elimination pulse width p nrst ? ? ? 0.3 s power-on reset activation power rise time t por ? ? ? 10 ms 1 *1: when low-speed crystal oscillation stops for a duration more than the low-speed oscillation stop detect time, the system is reset to shift to system reset mode. * 2 : use 32.768khz crystal resonator dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) is used (c gl =c dl =12pf). * 3 : use 4.096mhz crystal osc illator chc49sfw b (kyocera). * 4 : 1024 clock average. reset_n reset pulse width (p rst ) p rst vil1 vil1 vdd 0.9xv dd 0.1xv dd t por powe r -on reset activation power rise time (t por )
fedl610q428-03 ml610q428/ML610Q429 21/33 dc characteristics (2/5) (v dd = 1.1 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (2/5) rating parameter symbol condition min. typ. max. unit measuring circuit cn4?0 = 00h 0.89 0.94 0.99 cn4?0 = 01h 0.91 0.96 1.01 cn4?0 = 02h 0.93 0.98 1.03 cn4?0 = 03h 0.95 1.00 1.05 cn4?0 = 04h 0.97 1.02 1.07 cn4?0 = 05h 0.99 1.04 1.09 cn4?0 = 06h 1.01 1.06 1.11 cn4?0 = 07h 1.03 1.08 1.13 cn4?0 = 08h 1.05 1.10 1.15 cn4?0 = 09h 1.07 1.12 1.17 cn4?0 = 0ah 1.09 1.14 1.19 cn4?0 = 0bh 1.11 1.16 1.21 cn4?0 = 0ch 1.13 1.18 1.23 cn4?0 = 0dh 1.15 1.20 1.25 cn4?0 = 0eh 1.17 1.22 1.27 cn4?0 = 0fh 1.19 1.24 1.29 cn4?0 = 10h 1.21 1.26 1.31 cn4?0 = 11h 1.23 1.28 1.33 cn4?0 = 12h 1.25 1.30 1.35 cn4?0 = 13h 1.27 1.32 1.37 cn4?0 = 14h *1 1.29 1.34 1.39 cn4?0 = 15h *1 1.31 1.36 1.41 cn4?0 = 16h *1 1.33 1.38 1.43 cn4?0 = 17h *1 1.35 1.40 1.45 cn4?0 = 18h *1 1.37 1.42 1.47 cn4?0 = 19h *1 1.39 1.44 1.49 cn4?0 = 1ah *1 1.41 1.46 1.51 cn4?0 = 1bh *1 1.43 1.48 1.53 cn4?0 = 1ch *1 1.45 1.50 1.55 cn4?0 = 1dh *1 1.47 1.52 1.57 cn4?0 = 1eh *1 1.49 1.54 1.59 v l1 voltage v l1 v dd = 3.0v, tj = 25 c cn4?0 = 1fh *1 1.51 1.56 1.61 v v l1 temperature deviation ? v l1 v dd = 3.0v ? ?1.5 ? mv/ c v l1 voltage dependency ? v l1 v dd = 1.3 to 3.6v ? 5 20 mv/v v l2 voltage v l2 v dd = 3.0v, tj = 25 c 300k ? load (v l4 ? v ss ) typ. ?10 % v l1 2 typ. +4% 1/3 bias v l1 2 v l3 voltage v l3 1/4 bias typ. ? 10% v l1 3 typ. +4% 1/3 bias v l1 3 v l4 voltage v l4 v dd = 3.0v, tj = 25 c 300k ? load (v l4 ? v ss ) 1/4 bias typ. ? 10% v l1 4 typ. +5% v lcd bias voltage generation time t bias ? ? ? 600 ms 1 *1: when using 1/4 bias, the v l1 voltage is set to typ. 1.32 v (same voltage as in cn4?0 = 13h).
fedl610q428-03 ml610q428/ML610Q429 22/33 dc characteristics (3/5) (v dd = 1.1 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (3/5) rating parameter symbol condition min. typ. max. unit measuring circuit ld2?0 = 0h 1.35 ld2?0 = 1h 1.4 ld2?0 = 2h 1.45 ld2?0 = 3h 1.5 ld2?0 = 4h 1.6 ld2?0 = 5h 1.7 ld2?0 = 6h 1.8 ld2?0 = 7h 1.9 ld2?0 = 8h 2.0 ld2?0 = 9h 2.1 ld2?0 = 0ah 2.2 ld2?0 = 0bh 2.3 ld2?0 = 0ch 2.4 ld2?0 = 0dh 2.5 ld2?0 = 0eh 2.7 bld threshold voltage v bld v dd = 1.35 to 3.6v ld2?0 = 0fh typ. ? 2% 2.9 typ. +2% v bld threshold voltage temperature deviation ? v bld v dd = 1.35 to 3.6v ? 0 ? %/ c ta = 25 c ? 0.15 0.50 supply current 1 idd1 cpu: in stop state. low-speed/high-speed oscillation: stopped. ta = -20 to +70 c ? ? 2.50 a ta = 25 c ? 0.5 1.3 supply current 2 idd2 cpu: in halt state (ltbc, rtc: operating* 3 * 5 ). high-speed oscillation: stopped. lcd/bias circuits: stopped. ta = -20 to +70 c ? ? 3.5 a ta = 25 c ? 5 7 supply current 3 idd3 cpu: in 32.768khz operating state.* 1 * 3 high-speed oscillation: stopped. lcd/bias circuits: operating.* 2 ta = -20 to +70 c ? ? 12 a ta = 25 c ? 70 85 supply current 4 idd4 cpu: in 500khz cr operating state. lcd/bias circuits: operating.* 2 * 3 ta = -20 to +70 c ? ? 100 a 1 ta = 25 c ? 0.4 0.5 supply current 5 idd5 cpu: in 2mhz cr operating state. lcd/bias circuits: operating.* 2 * 3 ta = -20 to +70 c ? ? 0.6 ma ta = 25 c ? 0.8 1.0 supply current 6 idd6 cpu: in 4.096mhz operating state. pll: in oscillating state. lcd/bias circuits: operating. * 2 * 3 v dd = 1.8 to 3.6v ta = -20 to +70 c ? ? 1.2 ma * 1 : cpu operating rate is 100% (no halt state). * 2 : all segs: off waveform, no lcd panel load, 1/3 bias, 1/3 duty, frame frequency: approx. 64 hz, bias voltage multiplying clock: 1/128 lsclk (256hz) * 3 : use 32.768khz crystal resonator dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) is used (c gl =c dl =12pf). * 4 : use 4.096mhz crystal osc illator chc49sfw b (kyocera). * 5 : significant bits of blkcon0~blkcon4 registers are all ?1?.
fedl610q428-03 ml610q428/ML610Q429 23/33 dc characteristics (4/5) (v dd = 1.1 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (4/5) rating parameter symbol condition min. typ. max. unit measuring circuit ioh1 = ? 0.5ma, v dd = 1.8 to 3.6v v dd ? 0.5 ? ? ioh1 = -0.1ma, v dd = 1.3 to 3.6v v dd ? 0.3 ? ? voh1 ioh1 = -0.03ma, v dd = 1.1 to 3.6v v dd ? 0.3 ? ? iol1 = +0.5ma, v dd = 1.8 to 3.6v ? ? 0.5 iol1 = +0.1ma, v dd = 1.3 to 3.6v ? ? 0.5 output voltage 1 (p20?p22/2 nd function is selected) (p30?p36) (p40?p47) (pa0?pa5) *1 vol1 iol1 = +0.03ma, v dd = 1.1 to 3.6v ? ? 0.3 ioh1 = ? 0.5ma, v dd = 1.8 to 3.6v v dd ? 0.5 ? ? ioh1 = -0.1ma, v dd = 1.3 to 3.6v v dd ? 0.3 ? ? voh2 ioh1 = -0.03ma, v dd = 1.1 to 3.6v v dd ? 0.3 ? ? output voltage 2 (p20?p22/2 nd function is not selected) vol2 iol2 = +5ma, v dd = 1.8 to 3.6v ? ? 0.5 output voltage 3 (p40?p41) vol3 iol3 = +3ma, v dd = 2.0 to 3.6v (when i 2 c mode is selected) ? ? 0.4 voh4 ioh4 = ? 0.2ma, vl1=1.2v v l4 ? 0.2 ? ? vomh4 iomh4 = +0.2ma, vl1=1.2v ? ? v l3 +0.2 vomh4s iomh4s = ? 0.2ma, vl1=1.2v v l3 ? 0.2 ? ? vom4 iom4 = +0.2ma, vl1=1.2v ? ? v l2 +0.2 vom4s iom4s = ? 0.2ma, vl1=1.2v v l2 ? 0.2 ? ? voml4 ioml4 = +0.2ma, vl1=1.2v ? ? v l1 +0.2 voml4s ioml4s = ? 0.2ma, vl1=1.2v v l1 ? 0.2 ? ? output voltage 4 (com0?23) (seg0?63) vol4 iol4 = +0.2ma, vl1=1.2v ? ? 0.2 v 2 iooh voh = v dd (in high-impedance state) ? ? 1 output leakage (p20?p22) (p30?p35) (p40?p47) (pa0?pa5) *1 iool vol = v ss (in high-impedance state) ? 1 ? ? a 3 iih1 vih1 = v dd 0 ? 1 v dd = 1.8 to 3.6v ? 600 ? 300 ? 20 v dd = 1.3 to 3.6v ? 600 ? 300 -10 input current 1 (reset_n) iil1 vil1 = v ss v dd = 1.1 to 3.6v ? 600 ? 300 300 600 v dd = 1.3 to 3.6v 10 300 600 iih1 vih1 = v dd v dd = 1.1 to 3.6v 2 300 600 input current 1 (test) iil1 vil1 = v ss -1 ? ? v dd = 1.8 to 3.6v 2 30 200 v dd = 1.3 to 3.6v 0.2 30 200 iih2 vih2 = v dd (when pulled-down) v dd = 1.1 to 3.6v 0.01 30 200 v dd = 1.8 to 3.6v ? 200 ? 30 ? 2 input current 2 (nmi) (p00?p03) (p04?p07) *1 (p10?p11) iil2 vil2 = v ss (when pulled-up) v dd = 1.3 to 3.6v ? 200 ? 30 -0.2 a 4
fedl610q428-03 ml610q428/ML610Q429 24/33 v dd = 1.1 to 3.6v ? 200 ? 30 -0.01 iih2z vih2 = v dd (in high-impedance state) ? ? 1 (p30?p35) (p40?p47) (pa0?pa5) *1 iil2z vil2 = v ss (in high-impedance state) ? 1 ? ? *1: ML610Q429 only dc characteristics (5/5) (v dd = 1.1 to 3.6v, v ss = 0v, ta = -20 to +70 c, unless otherwise specified) (5/5) rating parameter symbol condition min. typ. max. unit measuring circuit v dd = 1.3 to 3.6v 0.7 v dd ? v dd vih1 v dd = 1.1 to 3.6v 0.7 v dd ? v dd v dd = 1.3 to 3.6v 0 ? 0.3 v dd input voltage 1 (reset_n) (test) (nmi) (p00?p03) (p04?p07) *1 (p10?p11) (p31?p35) (p40?p43) (p45?p47) (pa0?pa5) *1 vil1 v dd = 1.1 to 3.6v 0 ? 0.2 v dd vih2 ? 0.7 v dd ? v dd input voltage 2 (p30, p44) vil2 ? 0 ? 0.3 v dd v 5 input pin capacitance (nmi) (p00?p03) (p04?p07) *1 (p10?p11) (p30?p35) (p40?p47) (pa0?pa5) *1 cin f = 10khz v rms = 50mv ta = 25 c ? ? 5 pf ? *1: ML610Q429 only
fedl610q428-03 ml610q428/ML610Q429 25/33 measuring circuits measuring circuit 1 measuring circuit 2 c v : 1 f c l1 : 0.1 f c x : 0.1 f c a ,c b ,c c ,c d : 1 f c 12 ,c 34 : 1 f c gh : 24pf c dh : 24pf 32.768khz crystal resonator dt-26 (load capacitance 6pf) (made by kds:daishinku corp.) 4.096mhz crystal: hc49sfwb (kyocera) xt0 xt1 p10/osc0 p11/osc1 32.768khz crystal 4.096mhz crystal c gh c dh a v dd v ddl v ddx c l1 c l0 c x v l1 c a v l2 c b v l3 c c v l4 c d v ss c4 c3 c2 c1 c 12 c 34 c v input pins v v dd v ddl v ddx v l1 v l2 v l3 v l4 v ss vih vil output pins (*1) input logic circuit to determine the specified measuring conditions. (*2) measured at the specified output pins. (*2) (*1)
fedl610q428-03 ml610q428/ML610Q429 26/33 measuring circuit 3 measuring circuit 4 measuring circuit 5 input pins a v dd v ddl v ddx v l1 v l2 v l3 v l4 v ss vih vil output pins *1: input logic circuit to determine the specified measuring conditions. *2: measured at the specified output pins. (*2) rs1 input pins a v dd v ddl v ddx v l1 v l2 v l3 v l4 v ss output pins *3: measured at the specified output pins. (*3) input pins v dd v ddl v ddx v l1 v l2 v l3 v l4 v ss vih vil output pins *1: input logic circuit to determine the specified measuring conditions. (*1) waveform monitoring
fedl610q428-03 ml610q428/ML610Q429 27/33 ac characteristics (external interrupt) (v dd = 1.1 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit external interrupt disable period t nul interrupt: enabled (mie = 1), cpu: nop operation system clock: 32.768khz 76.8 ? 106.8 s ac characteristics (uart) (v dd = 1.3 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit transmit baud rate t tbrt ? ? brt* 1 ? s receive baud rate t rbrt ? brt* 1 ? 3% brt* 1 brt* 1 +3% s *1: baud rate period (including the error of the clock frequency selected) set with the uart baud rate register (ua0brtl,h) and the uart mode register 0 (ua0mod0). t nul p00?p07 (rising-edge interrupt) p00?p07 (falling-edge interrupt) nmi, p00?p07 (both-edge interrupt) t nul t nul t rbrt txd0* rxd0* *: indicates the secondary function of the port. t tbrt
fedl610q428-03 ml610q428/ML610Q429 28/33 ac characteristics (synchronous serial port) (v dd = 1.3 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit when high-speed oscillation is not active 10 ? ? s sclk input cycle (slave mode) t scyc when high-speed oscillation is active (v dd = 1.8 to 3.6v) 1 ? ? s sclk output cycle (master mode) t scyc ? ? sclk* 1 ? s when high-speed oscillation is not active 4 ? ? s sclk input pulse width (slave mode) t sw when high-speed oscillation is active (v dd = 1.8 to 3.6v) 0.4 ? ? s sclk output pulse width (master mode) t sw ? sclk* 1 0.4 sclk* 1 0.5 sclk* 1 0.6 s sout output delay time (slave mode) t sd ? ? ? 180 ns sout output delay time (master mode) t sd ? ? ? 80 ns sin input setup time (slave mode) t ss ? 80 ? ? ns sin input setup time (master mode) t ss ? 180 ? ? ns sin input hold time t sh ? 80 ? ? ns *1: clock period selected with s0ck3?0 of the serial port 0 mode register (sio0mod1) t sd sclk0* sin0* sout0* *: indicates the secondar y function of the p ort. t sd t ss t sh t sw t sw t scyc
fedl610q428-03 ml610q428/ML610Q429 29/33 ac characteristics (i 2 c bus interface: standard mode 100khz) (v dd = 1.8 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit scl clock frequency f scl ? 0 ? 100 khz scl hold time (start/restart condition) t hd:sta ? 4.0 ? ? s scl ?l? level time t low ? 4.7 ? ? s scl ?h? level time t high ? 4.0 ? ? s scl setup time (restart condition) t su:sta ? 4.7 ? ? s sda hold time t hd:dat ? 0 ? 3.45 s sda setup time t su:dat ? 0.25 ? ? s sda setup time (stop condition) t su:sto ? 4.0 ? ? s bus-free time t buf ? 4.7 ? ? s ac characteristics (i 2 c bus interface: fast mode 400khz) (v dd = 1.8 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit scl clock frequency f scl ? 0 ? 400 khz scl hold time (start/restart condition) t hd:sta ? 0.6 ? ? s scl ?l? level time t low ? 1.3 ? ? s scl ?h? level time t high ? 0.6 ? ? s scl setup time (restart condition) t su:sta ? 0.6 ? ? s sda hold time t hd:dat ? 0 ? 0.9 s sda setup time t su:dat ? 0.1 ? ? s sda setup time (stop condition) t su:sto ? 0.6 ? ? s bus-free time t buf ? 1.3 ? ? s p41/scl p40/sda start condition restart condition stop condition t buf t hd:sta t low t high t su:sta t hd:sta t su:dat t hd:dat t su:sto
fedl610q428-03 ml610q428/ML610Q429 30/33 ac characteristics (rc oscillation a/d converter) (v dd = 1.3 to 3.6v, v ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit resistors for oscillation rs0, rs1, rt0, rt0-1,rt1 cs0, ct0, cs1 740pf 1 ? ? k ? f osc1 resistor for oscillation = 1k ? 209.4 330.6 435.1 khz f osc2 resistor for oscillation = 10k ? 41.29 55.27 64.16 khz oscillation frequency vdd = 1.5v f osc3 resistor for oscillation = 100k ? 4.71 5.97 7.06 khz kf1 rt0, rt0-1, rt1 = 1khz 5.567 5.982 6.225 ? kf2 rt0, rt0-1, rt1 = 10 khz 0.99 1 1.01 ? rs to rt oscillation frequency ratio *1 vdd = 1.5v kf3 rt0, rt0-1, rt1 = 100 khz 0.104 0.108 0.118 ? f osc1 resistor for oscillation = 1k ? 407.3 486.7 594.6 khz f osc2 resistor for oscillation = 10k ? 49.76 59.28 72.76 khz oscillation frequency vdd = 3.0v f osc3 resistor for oscillation = 100k ? 5.04 5.993 7.04 khz kf1 rt0, rt0-1, rt1 = 1khz 8.006 8.210 8.416 ? kf2 rt0, rt0-1, rt1 = 10 khz 0.99 1 1.01 ? rs to rt oscillation frequency ratio *1 vdd = 3.0v kf3 rt0, rt0-1, rt1 = 100 khz 0.100 0.108 0.115 ? *1: kfx is the ratio of the oscillation frequency by the sensor resistor to the oscillation frequency by the reference resistor on the same conditions. f oscx (rt0 ? cs0 oscillation) f oscx (rt0-1 ? cs0 oscillation) f oscx (rt1 ? cs1 oscillation) kfx = f oscx (rs0 ? cs0 oscillation) , f oscx (rs0 ? cs0 oscillation) , f oscx (rs1 ? cs1 oscillation) (x = 1, 2, 3) note: - please have the shortest layout for the common node (wiring patterns which are connected to the external capacitors, resistor s and in0/in1 pin), including cvr0/cvr1. especially, do not have long wire between in0/in1 and rs0/rs1. the coupling capacitance on the wires may occur incorrect a/d conversion. also, please do not have signals which may be a source of noise around the node. - when rt0/rt1 (thermistor and etc.) requires long wiring due to the restricted placement, please have vss(gnd) trace next to the signal. - please make wiring to components (capacitor, resisteor and etc.) necessory for objective measurement. wiring to reserved components may affect to the a/d conversion operation by noise the components itself may have. v dd v ddl v ddx c l1 c l0 c x v ss c v rt0, rt0-1, rt1: 1k ? /10k ? ? ? cs0, ct0, cs1: 560pf cvr0, cvr1: 820pf rcm frequency measurement (f oscx ) input pins vih vil *1: input logic circuit to determine the specified measuring conditions. (*1) cs0 rt0 in1 cs1 rs1 rt1 cs0 rs0 rs0 rct0 ri0-1 ct0 rt0 cs1 rs1 rt1 in0 cvr0 cvr1
fedl610q428-03 ml610q428/ML610Q429 31/33 package dimensions (unit: mm) notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact our responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
fedl610q428-03 ml610q428/ML610Q429 32/33 revision history page document no. date previous edition current edition description fedl610q428-01 feb.7.2011 ? ? formally edition 1.0 fedl610q428-02 jun 7.2011 3 3 add the p version all all change header and footer 3,18,19, 20,21,22, 23,26,27, 28,29 3,18,20, 21,22,23, 24,27,28, 29,30 delete the p version 3,7 4 delete package products 2,7 2 delete the metal option of only ml610q439?s lcd driver 3 4 change from "shipment" to " product name ? supported function " - 19 add clock generation circuit operating conditions 19 20 change "reset" to "reset pulse width (p rst )" and " power-on reset activation power rise time (t por )". 21 22 correct the c gl ?s value and the c dl ?s value of dc characteristics (3/5)?s note no.3 fedl610q428-03 july.25.2014 30 31 update package dimensions
fedl610q428-03 ml610q428/ML610Q429 33/33 notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. examples of application circuits, circuit constants and any othe r information contained herein illustrate the standard usage an d operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circui ts for the products. lapis semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accord ance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of h uman injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controlle r or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2011 ? 2014 lapis semiconductor co., ltd. 2-4-8 shinyokohama, kouhoku-ku, yokohama 222-8575, japan http://www.lapis-semi.com/en/

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