? semiconductor components industries, llc, 2012 june, 2012 ? rev. 4 1 publication order number: ntd6416anl/d ntd6416anl, nvd6416anl n-channel power mosfet 100 v, 19 a, 74 m features ? low r ds(on) ? high current capability ? 100% avalanche tested ? aec ? q101 qualified and ppap capable ? nvd6416anl ? these devices are pb ? free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain ? to ? source voltage v dss 100 v gate ? to ? source voltage ? continuous v gs 20 v continuous drain current steady state t c = 25 c i d 19 a t c = 100 c 13 power dissipation steady state t c = 25 c p d 71 w pulsed drain current t p = 10 s i dm 70 a operating and storage temperature range t j , t stg ? 55 to +175 c source current (body diode) i s 19 a single pulse drain ? to ? source avalanche energy (v dd = 50 vdc, v gs = 10 vdc, i l(pk) = 18.2 a, l = 0.3 mh, r g = 25 ) e as 50 mj lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c thermal resistance ratings parameter symbol max unit junction ? to ? case (drain) ? steady state r jc 2.1 c/w junction ? to ? ambient ? steady state (note 1) r ja 47 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface mounted on fr4 board using 1 sq in pad size, (cu area 1.127 sq in [2 oz] including traces). http://onsemi.com d s g marking diagram & pin assignments 6416anl = device code y = year ww = work week g = pb ? free package dpak case 369aa style 2 yww 64 16anlg 4 drain 3 source 1 gate 2 drain ipak case 369d style 2 4 drain 1 gate 2 drain 3 source yww 64 16anlg 4 1 2 3 v (br)dss r ds(on) max i d max 100 v 74 m @ 10 v 19 a see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 1 2 3 4
ntd6416anl, nvd6416anl http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 100 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 120 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 100 v t j = 25 c 1.0 a t j = 125 c 10 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 2.2 v negative threshold temperature coefficient v gs(th) /t j 5.4 mv/ c drain ? to ? source on ? resistance r ds(on) v gs = 4.5 v, i d = 10 a 70 80 m v gs = 10 v, i d = 10 a 62 74 v gs = 10 v, i d = 19 a 68 74 forward transconductance g fs v ds = 5 v, i d = 10 a 18 s charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 700 1000 pf output capacitance c oss 110 reverse transfer capacitance c rss 50 total gate charge q g(tot) v gs = 10 v, v ds = 80 v, i d = 19 a 25 40 nc threshold gate charge q g(th) 0.7 gate ? to ? source charge q gs 2.4 gate ? to ? drain charge q gd 9.6 plateau voltage v gp 3.2 v gate resistance r g 2.4 switching characteristics (note 3) turn ? on delay time t d(on) v gs = 10 v, v dd = 80 v, i d = 19 a, r g = 6.1 7.0 ns rise time t r 16 turn ? off delay time t d(off) 35 fall time t f 40 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 19 a t j = 25 c 0.9 1.2 v t j = 125 c 0.72 reverse recovery time t rr v gs = 0 v, di s /dt = 100 a/ s, i s = 19 a 50 ns charge time t a 38 discharge time t b 14 reverse recovery charge q rr 112 nc 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
ntd6416anl, nvd6416anl http://onsemi.com 3 0 10 20 30 40 012345 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics v gs = 2.4 v 2.8 v 3.0 v 3.2 v 3.6 v 4.5 v 10 v t j = 25 c 0 10 20 30 40 012345 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics t j = 125 c t j = ? 55 c v ds 10 v t j = 25 c 0.06 0.07 0.08 0.09 0.1 0.11 246810 v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance ( ) figure 3. on ? region versus gate ? to ? source voltage i d = 19 a t j = 25 c 0.050 0.055 0.060 0.065 0.070 0.075 0.080 2 6 10 14 1 8 t j = 25 c i d , drain current (a) figure 4. on ? region versus drain current and gate ? to ? source voltage r ds(on) , drain ? to ? source resistance ( ) v gs = 4.5 v v gs = 10 v 0.5 1 1.5 2 2.5 3 ? 50 ? 25 0 25 50 75 100 125 150 175 t j , junction temperture ( c) r ds(on) , drain ? to ? source resistance (normalized) figure 5. on ? resistance variation with temperature v gs = 10 v i d = 19 a 10 100 1000 10000 10 20 30 40 50 60 70 80 90 10 i dss , leakage (na) t j = 125 c t j = 150 c v gs = 0 v v ds , drain ? to ? source voltage (v) figure 6. drian ? to ? source leakage current versus voltage
ntd6416anl, nvd6416anl http://onsemi.com 4 0 200 400 600 800 1000 1200 1400 0 102030405060708090100 c, capacitance (pf) t j = 25 c v gs = 0 v v ds , drain ? to ? source voltage (v) figure 7. capacitance variation c iss c oss c rss 0 5 10 15 20 25 q t q gd q gs 0 2 4 6 8 10 q g , total gate charge (nc) figure 8. gate ? to ? source voltage and drain ? to ? source voltage versus total charge v ds = 80 v i d = 19 a t j = 25 c v gs , gate ? to ? source voltage (v) 1 10 100 1000 1 10 100 t, time (ns) r g , gate resistance ( ) figure 9. resistive switching time variation versus gate resistance t d(off) t f t r t d(on) v ds = 80 v i d = 19 a v gs = 10 v 0 5 10 15 20 0.5 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.0 i s , source current (a) v sd , source ? to ? drain voltage (v) figure 10. diode forward voltage versus current t j = 25 c v gs = 0 v 0.001 0.1 1 10 100 0.1 10 100 1000 r ds(on) limit thermal limit package limit v gs = 10 v single pulse t c = 25 c 10 s 100 s 1 ms 10 ms dc i d , drain current (a) v ds , drain ? to ? source voltage (v) figure 11. maximum rated forward biased safe operating area 0 10 20 30 40 50 25 50 75 100 125 150 175 eas, single pulse drain ? to ? source avalanche energy (mj) v ds , drain ? to ? source voltage (v) figure 12. resistive switching time variation versus gate resistance i d = 18.2 a 100 80 60 40 20 0 v ds , drain ? to ? source voltage (v) v ds v gs 0.01 1
ntd6416anl, nvd6416anl http://onsemi.com 5 figure 13. thermal response (ntd6416anl dpak pcb cu area 720 mm 2 pcb cu thk 2 oz) t, pulse time (sec) 100 50% duty cycle single pulse r ja (t) = r(t) r ja d curves apply for power pulse train shown read time at t 1 t j(pk) ? t c = p (pk) r ja (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 10 1 0.1 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 r ja ( c/w) 20% 10% 5% 2% 1% ordering information device package shipping ? NTD6416ANLT4G dpak (pb ? free) 2500 / tape & reel ntd6416anl ? 1g ipak (pb ? free) 75 units / rail nvd6416anlt4g dpak (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
ntd6416anl, nvd6416anl http://onsemi.com 6 package dimensions dpak (single guage) case 369aa issue b b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw style 2: pin 1. gate 2. drain 3. source 4. drain
ntd6416anl, nvd6416anl http://onsemi.com 7 package dimensions 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntd6416anl/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
|
