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  ? semiconductor components industries, llc, 2013 october, 2013 ? rev. 0 1 publication order number: nttfs4965nf/d nttfs4965nf power mosfet 30 v, 64 a, single n ? channel, wdfn8 features ? integrated schottky diode ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? optimized gate charge to minimize switching losses ? these devices are pb ? free and are rohs compliant applications ? cpu power delivery ? synchronous rectification for dc ? dc converters ? low side switching ? telecom secondary side rectification maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss 30 v gate ? to ? source voltage v gs 20 v continuous drain current r  ja (note 1) steady state t a = 25 c i d 22 a t a = 85 c 15.9 power dissipation r  ja (note 1) t a = 25 c p d 2.69 w continuous drain current r  ja 10 s (note 1) t a = 25 c i d 32.4 a t a = 85 c 23.4 power dissipation r  ja 10 s (note 1) t a = 25 c p d 5.85 w continuous drain current r  ja (note 2) t a = 25 c i d 16.3 a t a = 85 c 11.7 power dissipation r  ja (note 2) t a = 25 c p d 1.47 w continuous drain current r  jc (note 1) t c = 25 c i d 64 a t c = 85 c 46 power dissipation r  jc (note 1) t c = 25 c p d 22.73 w pulsed drain current t a = 25 c, t p = 10  s i dm 192 a operating junction and storage temperature t j , t stg ? 55 to +150 c source current (body diode) i s 32 a drain to source dv/dt dv/dt 6.0 v/ns single pulse drain ? to ? source avalanche energy (t j = 25 c, v dd = 50 v, v gs = 10 v, i l = 32 a pk , l = 0.1 mh, r g = 25  ) e as 52 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface ? mounted on fr4 board using 1 sq ? in pad, 2 oz cu. 2. surface ? mounted on fr4 board using the minimum recommended pad size of 90 mm 2 . ordering information http://onsemi.com device package shipping ? v (br)dss r ds(on) max i d max 30 v 3.5 m  @ 10 v 64 a n ? channel mosfet d s g ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. wdfn8 (  8fl) case 511ab marking diagram 5.2 m  @ 4.5 v NTTFS4965NFTAG wdfn8 (pb ? free) 1500 / tape & reel (note: microdot may be in either location) 1 4965 = specific device code a = assembly location y = year ww = work week  = pb ? free package 1 nttfs4965nftwg wdfn8 (pb ? free) 5000 / tape & reel 4965 ayww   d d d d s s s g
nttfs4965nf http://onsemi.com 2 thermal resistance maximum ratings parameter symbol value unit junction ? to ? case (drain) r  jc 5.5 c/w junction ? to ? ambient ? steady state (note 3) r  ja 46.4 junction ? to ? ambient ? steady state (note 4) r  ja 84.8 junction ? to ? ambient ? (t 10 s) (note 3) r  ja 21.4 3. surface ? mounted on fr4 board using 1 sq ? in pad, 2 oz cu. 4. surface ? mounted on fr4 board using the minimum recommended pad size of 90 mm 2 . electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 15 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 500  a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.2 1.6 2.3 v negative threshold temperature coefficient v gs(th) /t j 5.2 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v i d = 20 a 2.8 3.5 m  i d = 10 a 2.8 v gs = 4.5 v i d = 20 a 4.16 5.2 i d = 10 a 4.13 forward transconductance g fs v ds = 1.5 v, i d = 10 a 34 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 15 v 2075 pf output capacitance c oss 876 reverse transfer capacitance c rss 46 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v, i d = 20 a 13.6 nc threshold gate charge q g(th) 2.0 gate ? to ? source charge q gs 5.8 gate ? to ? drain charge q gd 4.1 total gate charge q g(tot) v gs = 10 v, v ds = 15 v, i d = 20 a 29.4 nc switching characteristics (note 6) turn ? on delay time t d(on) v gs = 4.5 v, v ds = 15 v, i d = 15 a, r g = 3.0  11 ns rise time t r 24 turn ? off delay time t d(off) 20 fall time t f 5.4 turn ? on delay time t d(on) v gs = 10 v, v ds = 15 v, i d = 15 a, r g = 3.0  8.5 ns rise time t r 24 turn ? off delay time t d(off) 25 fall time t f 4.0 5. pulse test: pulse width = 300  s, duty cycle  2%. 6. switching characteristics are independent of operating junction temperatures.
nttfs4965nf http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 2 a t j = 25 c 0.4 0.7 v t j = 125 c 0.33 reverse recovery time t rr v gs = 0 v, d is /d t = 100 a/  s, i s = 2 a 35.7 ns charge time t a 18.2 discharge time t b 17.5 reverse recovery charge q rr 32 nc package parasitic values source inductance l s t a = 25 c 0.65 nh drain inductance l d 0.20 gate inductance l g 1.5 gate resistance r g 1.0  5. pulse test: pulse width = 300  s, duty cycle  2%. 6. switching characteristics are independent of operating junction temperatures.
nttfs4965nf http://onsemi.com 4 typical performance curves 0 15 30 45 60 75 90 105 120 135 150 012345 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics v gs = 3.8 v 3.6 v 3.4 v 3.2 v 3.0 v 2.8 v 2.6 v 2.4 v 4.0 v 4.2 v 4.4 v to 4.5 v 7.5 v to 10 v 0 10 20 30 40 50 60 70 80 90 100 110 1 1.5 2 2.5 3 3.5 4 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds = 5 v t j = 25 c t j = ? 55 c t j = 125 c 0 0.005 0.010 0.015 0.020 0.025 0.030 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 figure 3. on ? resistance vs. gate ? to ? source voltage v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance (  ) i d = 30 a t j = 25 c 2.25e ? 03 2.50e ? 03 2.75e ? 03 3.00e ? 03 3.25e ? 03 3.50e ? 03 3.75e ? 03 4.00e ? 03 4.25e ? 03 4.50e ? 03 4.75e ? 03 5.00e ? 03 5.25e ? 03 5.50e ? 03 5 20 35 50 65 80 95 110 125 140 155 figure 4. on ? resistance vs. drain current and gate voltage i d , drain current (a) r ds(on) , drain ? to ? source resistance (  ) v gs = 4.5 v v gs = 10 v t j = 25 c 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 ? 50 ? 25 0 25 50 75 100 125 150 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) r ds(on) , drain ? to ? source resistance (normalized) i d = 20 a v gs = 10 v figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (v) i dss , leakage (a) v gs = 0 v t j = 150 c t j = 125 c t j = 25 c 1.00e ? 01 1.00e ? 02 1.00e ? 03 1.00e ? 04 1.00e ? 05 05 25 20 10 15
nttfs4965nf http://onsemi.com 5 typical performance curves 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 0 5 10 15 20 25 30 v ds , drain ? to ? source voltage (v) c , capacitance ( p f) figure 7. capacitance variation c oss c rss c iss v gs = 0 v t j = 25 c 0 2 4 6 8 10 0 2 4 6 8 101214161820222426283 0 i d = 30 a t j = 25 c v dd = 15 v v gs = 10 v q t q gs q gd figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge q g , total gate charge (nc) v gs , gate ? to ? source voltage (v) 1 10 100 1000 1 10 100 r g , gate resistance (  ) t, time ( ns ) v dd = 15 v i d = 10 a v gs = 10 v t d(off) t d(on) t f t r figure 9. resistive switching time variation vs. gate resistance 0 1 2 3 4 5 6 7 8 9 10 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0. 7 v sd , source ? to ? drain voltage (v) v gs = 0 v t j = 25 c figure 10. diode forward voltage vs. current i s , source current (a) 0.01 0.1 1 10 100 1000 0.1 1 10 100 v gs = 20 v single pulse t c = 25 c figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (v) rds(on) limit thermal limit package limit 10  s 100  s 1 ms 10 ms dc i d , drain current (a) 0 5 10 15 20 25 30 35 40 45 50 55 25 50 75 100 125 15 0 t j , starting junction temperature ( c) i d = 32 a figure 12. maximum avalanche energy vs. starting junction temperature e as , single pulse drain ? to ? source avalanche energy (mj)
nttfs4965nf http://onsemi.com 6 typical performance curves 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 100 0 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse r(t) ( c/w) pulse time (s) figure 13. thermal response
nttfs4965nf http://onsemi.com 7 package dimensions m 1.40 1.50  0 ???  1.60 12  wdfn8 3.3x3.3, 0.65p case 511ab issue c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension d1 and e1 do not include mold flash protrusions or gate burrs. 1234 5 6 top view side view bottom view d1 e1  d e b a 0.20 c 0.20 c 2x 2x dim min nom millimeters a 0.70 0.75 a1 0.00 ??? b 0.23 0.30 c 0.15 0.20 d d1 2.95 3.05 d2 1.98 2.11 e e1 2.95 3.05 e2 1.47 1.60 e 0.65 bsc g 0.30 0.41 k 0.64 ??? l 0.30 0.43 l1 0.06 0.13 a 0.10 c 0.10 c detail a 14 8 l1 e/2 8x d2 g e2 k b a 0.10 b c 0.05 c l detail a a1 e 6x c 4x c seating plane 5 max 0.80 0.05 0.40 0.25 3.15 2.24 3.15 1.73 0.51 ??? 0.56 0.20 m *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.65 0.42 0.75 2.30 3.46 package 8x 0.055 0.059 0 ???  0.063 12  0.028 0.030 0.000 ??? 0.009 0.012 0.006 0.008 0.116 0.120 0.078 0.083 0.116 0.120 0.058 0.063 0.026 bsc 0.012 0.016 0.025 ??? 0.012 0.017 0.002 0.005 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.020 ??? 0.022 0.008 min nom inches max 7 8 pitch 3.60 0.57 0.47 outline dimension: millimeters 3.30 bsc 3.30 bsc 0.130 bsc 0.130 bsc 2.37 0.66 4x e3 0.23 0.30 0.40 0.009 0.012 0.016 e3 4x on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 nttfs4965nf/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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