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(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 1/30 version: 0 date: 2005/12/06 product functional specification 14.1 inch wxga color tft lcd module model name: b141ew02 v.3 ( u ) preliminary specification ( ) final specification note: this specification is subject to change without notice. www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 2/30 contents 1.0 handling precautions..........................................................................................................4 2.0 general description..............................................................................................................5 2.1 display characteristics..............................................................................................................................5 2.2 functional block diagram.........................................................................................................................6 3.0 absolute maximum ratings.................................................................................................7 4.0 optical characteristics.........................................................................................................8 5.0 signal interface...................................................................................................................10 5.1 connectors.............................................................................................................................................10 5.2 signal pin...............................................................................................................................................10 5.3 signal description...................................................................................................................................11 5.4 signal electrical characteristics..............................................................................................................12 5.5 signal for lamp connector......................................................................................................................12 6.0 pixel format image.............................................................................................................13 7.0 parameter guide line for ccfl inverter.............................................................................13 8.0 interface timings.................................................................................................................14 8.1 timing characteristics.............................................................................................................................14 8.2 timing definition.....................................................................................................................................15 9.0 power consumption...........................................................................................................16 10. power on/off sequence...................................................................................................17 11.0 reliability /safety requirement........................................................................................18 11.1 reliability test conditions.....................................................................................................................18 11.2 safety...................................................................................................................................................18 12.0 shipping and packing dimension....................................................................................19 12.1 shipping label format..........................................................................................................................19 12.2 carton packing......................................................................................................................................20 12.3 shipping packing of palletizing sequence..............................................................................................21 13.0 mechanical characteristics..............................................................................................23 13.1 lcm outline dimension (front view).....................................................................................................23 13.2 lcm outline dimension (rear view).....................................................................................................24 13.3 screw hole depth and center position..................................................................................................25 14.0 edid data...........................................................................................................................27 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 3/30 ii record of revision version and date page old description new description remark v.0 2005/12/6 all first release na www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 4/30 1.0 handling precautions 1) do not press or scratch the surface harder than a hb pencil lead because the polarizers are very fragile and could be easily damaged. 2) be sure to turn off power supply when inserting or disconnecting from input connector. 3) wipe off water droplets or oil immediately. long contact with the droplets may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) protect the module from static electricity and insure proper grounding when handling. static electricity may cause damage to the cmos gate array ic. 7) do not disassemble the module. 8) do not press the reflector sheet at the back of the module. 9) avoid damaging the tft module. do not press the center of the ccfl reflector when it was taken out from the packing container. instead, press at the edge of the ccfl reflector softly. 10) do not rotate or tilt the signal interface connector of the tft module when you insert or remove other connector into the signal interface connector. 11) do not twist or bend the tft module when installation of the tft module into an enclosure (notebook pc bezel, for example). it should be taken into consideration that no bending/twisting forces are applied to the tft module from outside when designing the enclosure. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contains a small amount of mercury. please follow local regulations for disposal. 13) the lcd module contains a small amount of material that has no flammability grade, so it should be supplied by power complied with requirements of limited power source (2.11, iec60950 or ul1950). 14) the ccfl in the lcd module is supplied with limited current circuit (2.4, iec60950 or ul1950). do not connect the ccfl in hazardous voltage circuit. www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 5/30 2.0 general description this specification applies to the 14.1 inch color tft/lcd module b141ew01 this module is designed for a display unit of notebook style personal computer. the screen format is intended to support the wxga (1280(h) x 800(v)) screen and 262k colors (rgb 6-bits data driver). all input signals are lvds interface compatible. this module does not contain an inverter card for backlight. 2 2 . . 1 1 d d i i s s p p l l a a y y c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s the following items are characteristics summary on the table under 25 condition: items unit specifications screen diagonal [mm] 357.7 (14.1") active area [mm] 303.36(h) x 189.6(v) pixels h x v 1280(x3) x 800 pixel pitch [mm] 0.237 pixel arrangement r.g.b. vertical stripe display mode normally white typical white luminance (ccfl=6.0ma) [cd/m 2 ] 200 typ., 170 min. (5 points average) contrast ratio 300:1 min., 400:1 typ. response time [msec] 25 typ., 35 max. nominal input voltage vdd [volt] +3.3 typ. typical power consumption (vdd line + vcfl line) [watt] 5.0 typ. weight [grams] 400 g typ., 420 g max. physical size [mm] 320 max(w) x 206 max.(h) x 5.5(d) max. electrical interface r/g/b data, 3 sync, signals, clock (4 pairs lvds) support color native 262k colors (rgb 6-bit data driver) surface treatment haze 25%, hard coating 3h, glare type temperature range operating storage (shipping) [ o c] [ o c] 0 to +50 -20 to +60 rohs compliance rohs compliance www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 6/30 2 2 . . 2 2 f f u u n n c c t t i i o o n n a a l l b b l l o o c c k k d d i i a a g g r r a a m m the following diagram shows the functional block of the 14.1 inches color tft/lcd module: tft array/cell vdd lcd controller lcd drive card backlight unit 1280(r/g/b) x 3 gnd dc-dc converter ref circuit y-driver x-driver rxin0 rxin1 rxin2 rxclkin (4 pairs lvds) jae fi-xb30sl-hf10 mating contactfi-xc3-1-15000 mating housing jae fi-x30sl jst bhsr-02vs-1 mating type sm02b-bhss-1- tb lamp connector(2pin) www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 7/30 3.0 absolute maximum ratings absolute maximum ratings of the module is as following: item symbol min max unit conditions logic/lcd drive voltage vdd -0.3 +4.0 [volt] input voltage of signal vin -0.3 vdd+0.3 [volt] ccfl current icfl 2.5 7 [ma] rms ccfl ignition voltage vs ? 1200 vrms note 1 operating temperature top 0 +50 [ o c] note 2 operating humidity hop 5 95 [%rh] note 2 storage temperature tst -20 +60 [ o c] note 2 storage humidity hst 5 95 [%rh] note 2 vibration 1.5,10-500/random [g hz] 30 min,x/y/z axis shock 240, 2 ,x/y/z axis [g ms] half sine wave note 1: duration = 50msec note 2: maximum wet-bulb should be 39 and no condensation. wet bulb temperature chart twb=39 c operating range storage range www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 8/30 4.0 optical characteristics the optical characteristics are measured under stable conditions as follows under 25 condition : item unit conditions min. typ. max. note horizontal (right) 40 45 - (left) 40 45 - vertical (upper) 15 20 - viewing angle (cr = 10) cr: contrast ratio [degree s] (lower) 30 35 - 5 points - 1.2 (1) uniformity 13 points - 1.5 (2) contrast ratio (center) 300 400 - rising - 15 20 response time [msec] falling - 10 15 red x 0.550 0.580 0.610 red y 0.310 0.340 0.370 green x 0.280 0.310 0.340 green y 0.520 0.550 0.580 blue x 0.125 0.155 0.185 blue y 0.115 0.145 0.175 white x 0.283 0.313 0.343 color chromaticity coordinates (cie) (normal view angle) white y 0.299 0.329 0.359 white luminance (ccfl 6.0ma) [cd/m 2 ] 5 points average 170 200 - (1) cross talk % -- --- 1.4 (3) note (1): 5 points position (display area: 303.36 mm x 189.6 mm) www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 9/30 12 3 45 h/4 h/4 h/4 h/4 h w w/4 w/4 w/4 w/4 note (2): 13 points position w/4 w w/4 h h/4 h/4 h/4 h/4 7 9 10 w/4 1 8 w/4 10 10 10 10 2 3 13 12 45 6 11 note (3): definition of cross talk (d ct ) d ct = | y b C y a | / y a 100 (%) y a ,y b = (511,127) or (170,383) or (853,383) or (511,639) where : y a = luminance of measured location without darkest gray pattern (cd/m 2 ) y b = luminance of measured location with darkest gray pattern (cd/m 2 ) yb ya view area (1023, 767) (0, 0) gray level 63 view area (1023, 767) (0, 0) gray level 63 gray level 0 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 10/30 5.0 signal interface 5 5 . . 1 1 c c o o n n n n e e c c t t o o r r s s physical interface is described as for the connector on module. these connectors are capable of accommodating the following signals and will be following components. connector name / designation for signal connector manufacturer jae type / part number fi-xb30sl-hf10 mating housing/part number fi-x30h mating contact/part number fi-xc3-1-15000 connector name / designation for lamp connector manufacturer jst type / part number bhsr-02vs-1 mating type / part number sm02b-bhss-1-tb 5 5 . . 2 2 s s i i g g n n a a l l p p i i n n pin# signal name pin# signal name 1 gnd 2 vdd 3 vdd 4 v edid 5 aging 6 clk edid 7 data edid 8 rxin0- 9 rxin0+ 10 gnd 11 rxin1- 12 rxin1+ 13 gnd 14 rxin2- 15 rxin2+ 16 gnd 17 rxclkin- 18 rxclkin+ 19 gnd 20 nc 21 nc 22 gnd 23 nc 24 nc 25 gnd 26 nc 27 nc 28 gnd 29 nc 30 nc www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 11/30 5 5 . . 3 3 s s i i g g n n a a l l d d e e s s c c r r i i p p t t i i o o n n the module uses a lvds receiver embedded in auo s asic. lvds is a differential signal technology for lcd interface and high-speed data transfer device. signal name description v edid +3.3v edid power clk edid edid clock input data edid edid data input rxin0-, rxin0+ lvds differential data input(red0-red5, green0) rxin1-, rxin1+ lvds differential data input(green1-green5, blue0-blue1) rxin2-, rxin2+ lvds differential data input(blue2-blue5, hsync, vsync, dsptmg) rxclkin-, rxclkin0+ lvds differential clock input vdd +3.3v power supply (internal 2.5v logic operation) gnd ground note : input signals shall be in low status when vdd is off. internal circuit of lvds inputs are as following. signal name description +red5 +red4 +red3 +red2 +red1 +red0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) (red-pixel data) red-pixel data each red pixel's brightness data consists of these 6 bits pixel data. +green 5 +green 4 +green 3 +green 2 +green 1 +green 0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) (green-pixel data) green-pixel data each green pixel's brightness data consists of these 6 bits pixel data. +blue 5 +blue 4 +blue 3 +blue 2 +blue 1 +blue 0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) (blue-pixel data) blue-pixel data each blue pixel's brightness data consists of these 6 bits pixel data. -dtclk data clock the typical frequency is 71.1 mhz. the signal is used to strobe the pixel data and dsptmg signals. all pixel data shall be valid at the falling edge when the dsptmg signal is high. dsptmg display timing this signal is stored at the falling edge of -dtclk. when the signal is high, the pixel data shall be valid to be displayed. www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 12/30 vsync vertical sync the signal is synchronized to -dtclk . hsync horizontal sync the signal is synchronized to -dtclk . note: output signals from any system shall be low or hi-z state when vdd is off. 5 5 . . 4 4 s s i i g g n n a a l l e e l l e e c c t t r r i i c c a a l l c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s input signals shall be in low status when vdd is off. it is recommended to refer the specifications of sn75lvds86dgg (texas instruments) in detail. signal electrical characteristics are as follows; parameter condition min max unit vth differential input high voltage(vcm=+1.2v) ? 100 [mv] vtl differential input low voltage(vcm=+1.2v) -100 ? [mv] vcm lvds input common mode voltage 1.125 1.375 [v] 5 5 . . 5 5 s s i i g g n n a a l l f f o o r r l l a a m m p p c c o o n n n n e e c c t t o o r r pin # signal name 1 lamp high voltage 2 lamp low voltage www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 13/30 6.0 pixel format image following figure shows the relationship of the input signals and lcd pixel format. r g b r g b r g b r g b r g b r g b r g b r g b 0 1 1278 1279 1st line 800th line 7.0 parameter guide line for ccfl inverter parameter min dp-1 max units condition white luminance 5 points average 170 200 ? [cd/m 2 ] (ta=25) ccfl current (icfl) 2.5 6.0 7.0 [ma] rms (ta=25) (note 2) ccfl frequency (fcfl) 50 60 65 [khz] (ta=25) (note 3) ccfl ignition voltage (vs) ? 1000 1200 [volt] rms (ta= 25) (note 4) ccfl voltage (reference) (vcfl) ? 660 ? [volt] rms (ta=25) (note 5) ccfl power consumption (pcfl) ? 4.2 ? [watt] (ta=25) (note 5) note 1 : dp-1 are auo recommended design points. *1 all of characteristics listed are measured under the condition using the auo test inverter. www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 14/30 *2 in case of using an inverter other than listed, it is recommended to check the inverter carefully. sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen. *3 in designing an inverter, it is suggested to check safety circuit ver carefully. impedance of ccfl, for instance, becomes more than 1 [m ohm] when ccfl is damaged. *4 generally, ccfl has some amount of delay time after applying start-up voltage. it is recommended to keep on applying start-up voltage for 1 [sec] until discharge. *5 the ccfl inverter operating frequency must be carefully chosen so that no interfering noise stripes on the screen were induced. *6 reducing ccfl current increases ccfl discharge voltage and generally increases ccfl discharge frequency. so all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high-voltage output of the inverter. note 2 : it should be employed the inverter, which has duty dimming , if iccfl is less than 4ma. note 3 : the ccfl inverter operating frequency should be carefully determined to avoid interference between inverter and tft lcd. note 4: the inverter open voltage should be designed larger than the lamp starting voltage at t=0 o c, otherwise backlight may be blinking for a moment after turning on or not be able to turn on. the open voltage should be measured after ballast capacitor. if an inverter has shutdown function it should keep its open voltage. for longer than 1 second even if lamp connector is open. note 5 : calculator value for reference (icfl vcfl=pcfl) 8.0 interface timings basically, interface timings should match 1280x800 /60hz manufacturing guideline timing. 8 8 . . 1 1 t t i i m m i i n n g g c c h h a a r r a a c c t t e e r r i i s s t t i i c c s s symbol description min typ max unit dotclk dotclk frequency - 71.1 - [mhz] t clock dotclk cycle time - 14 - [nsec] t h x total time 1303 1440 2047 [tck] t hd x active time 1280 1280 1280 [tck] t hb x blank time 23 160 767 [tck] t v y total time 803 823 1023 [tx] t vd y active time 800 800 800 [tx] vsync frame rate ? 60 ? [hz] note: de mode www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 15/30 8 8 . . 2 2 t t i i m m i i n n g g d d e e f f i i n n i i t t i i o o n n dotclk de t h t hb t hd de t v t vb t vd input timing definition ( de mode) t clock input data pixel 1 pixel 2 pixel 3 pixel n-1 pixel n invaild data invaild data pixel 1 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 16/30 9.0 power consumption input power specifications are as follows; symbol parameter min typ max units condition module vdd logic/lcd drive voltage 3.0 3.3 3.6 [volt] load capacitance 20uf pdd vdd power ? 0.8 ? [watt] max: all black pattern idd idd current ? (tbd) ? [ma] max: all black pattern vddrp allowable logic/lcd drive ripple voltage ? ? 100 [mv] p-p vddns allowable logic/lcd drive ripple noise ? ? 100 [mv] p-p lamp icfl ccfl current 2.5 6.0 7.0 [ma] rms (ta=25) vcfl ccfl voltage (reference) ? 660 ? [volt] rms (ta=25) pcfl ccfl power consumption ? 4.2 ? [watt] (ta=25) total power consumption ? 5.0 ? [watt] (without inverter) note: vdd=3.3v www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 17/30 10. power on/off sequence vdd power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vdd is off. sequence of power-on/off and signal-on/off power supply vdd lvds interface backlight on value parameter min. typ. max. units t1 0.5 - 10 [ms] t2 0 - 50 [ms] t3 0 - 50 [ms] t4 400 - - [ms] t5 200 - - [ms] t6 200 - - [ms] t7 0 - 10 [ms] t4 t3 t2 t5 valid data t1 0.1vdd 0.9vdd 0.1vdd 0.9vdd t6 t 7 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 18/30 11.0 reliability /safety requirement 1 1 1 1 . . 1 1 r r e e l l i i a a b b i i l l i i t t y y t t e e s s t t c c o o n n d d i i t t i i o o n n s s items required condition temperature humidity bias 40/90%,300hr high temperature operation 50/20%,300hr low temperature operation 0,300hr continuous life 25 ,300 hours on/off test 25,on/10 sec. off/10sec., 30,000 cycles hot storage 60/20% rh ,300 hours cold storage -20/50% rh ,300 hours thermal shock test -20/30 min ,60/30 min, 100cycles hot start test 50/1 hr min. power on/off per 5 minutes, 5 times cold start test 0/1 hr min. power on/off per 5 minutes, 5 times shock test (non-operating) 240g, 2ms, half sine wave vibration test (non-operating) sinusoidal vibration, 1.5g zero-to- peak, 10 to 500 hz, 0.5 octave/minute in each of three mutually perpendicular axes. esd contact : 8kv, operation, class b air : 15kv, operation, class b altitude test 0~14000 ft / operation / ramp 2000ft/min. 0~40000 ft /non-operation/ramp 2000ft/min. maximum side mount torque 2.5 kgf.cm . note1: ccfl life: 15,000 hours minimum note2: mtbf(excluding the ccfl) : 30,000 hours with a confidence level 90% note3: according to en61000-4-2, esd class b: some performance degradation allowed. no data lost. self-recoverable. no hardware failures. 1 1 1 1 . . 2 2 s s a a f f e e t t y y ul1950 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 19/30 12.0 shipping and packing dimension 1 1 2 2 . . 1 1 s s h h i i p p p p i i n n g g l l a a b b e e l l f f o o r r m m a a t t note 1: ic combination control code h/w source ic: nec gate ic: mec 0axxg 0a source ic: nt gate ic: nt 1axxg 1a control code note1 06 /01 0axxxg 83mm 23mm hardware: note1 firmware model name week code manufacturing area 0a 1 b141ew02 v3 *xxxxxxxxxxxx-xxxxx www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 20/30 1 1 2 2 . . 2 2 c c a a r r t t o o n n p p a a c c k k i i n n g g the outside dimension of carton is 454(l)mm* 388(w)mm* 352(h)mm, carton and cushion weight are 2920g. www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 21/30 1 1 2 2 . . 3 3 s s h h i i p p p p i i n n g g p p a a c c k k i i n n g g o o f f p p a a l l l l e e t t i i z z i i n n g g s s e e q q u u e e n n c c e e by air : 6 *4 layers, one pallet put 24 boxes, total 480 pcs module. by sea : 6 *5 layers, one pallet put 30 boxes, total 600 pcs module. stretch film label corner angle pet band moisture-proof film corner angle pallet www..net
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(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 23/30 13.0 mechanical characteristics 1 1 3 3 . . 1 1 l l c c m m o o u u t t l l i i n n e e d d i i m m e e n n s s i i o o n n ( ( f f r r o o n n t t v v i i e e w w ) ) www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 24/30 1 1 3 3 . . 2 2 l l c c m m o o u u t t l l i i n n e e d d i i m m e e n n s s i i o o n n ( ( r r e e a a r r v v i i e e w w ) ) www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 25/30 1 1 3 3 . . 3 3 s s c c r r e e w w h h o o l l e e d d e e p p t t h h a a n n d d c c e e n n t t e e r r p p o o s s i i t t i i o o n n screw hole minimum depth, from side surface =2.5 mm (see drawing) screw hole center location, from front surface = 3.1 0.1mm (see drawing) suggestions: customers screw maximum length = 2.3 mm (see drawing) screw torque: maximum2.5 kgf-cm 2.5 min www..net
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(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 27/30 14.0 edid data function value value value hex hex bin dec 00 header 00 00000000 0 01 ff 11111111 255 02 ff 11111111 255 03 ff 11111111 255 04 ff 11111111 255 05 ff 11111111 255 06 ff 11111111 255 07 00 00000000 0 08 eisa manuf. code lsb 06 00000110 6 09 compressed ascii af 10101111 175 0a product code 44 01000100 68 0b hex, lsb first 21 00100001 33 0c 32-bit ser # 00 00000000 0 0d 00 00000000 0 0e 00 00000000 0 0f 00 00000000 0 10 week of manufacture 01 00000001 1 11 year of manufacture 0f 00001111 15 12 edid structure ver. 01 00000001 1 13 edid revision # 03 00000011 3 14 video input definition 80 10000000 128 15 max h image size 1e 00011110 30 16 max v image size 13 00010011 19 17 display gamma 78 01111000 120 18 feature support 0a 00001010 10 19 red/green low bits 87 10000111 135 1a blue/white low bits c5 11000101 197 1b red x/ high bits 94 10010100 148 1c red y 57 01010111 87 1d green x 4f 01001111 79 1e green y 8c 10001100 140 1f blue x 27 00100111 39 20 blue y 25 00100101 37 21 white x 50 01010000 80 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 28/30 22 white y 54 01010100 84 23 established timing 1 00 00000000 0 24 established timing 2 00 00000000 0 25 manufacturer's timing 00 00000000 0 26 standard timing #1 01 00000001 1 27 01 00000001 1 28 standard timing #2 01 00000001 1 29 01 00000001 1 2a standard timing #3 01 00000001 1 2b 01 00000001 1 2c standard timing #4 01 00000001 1 2d 01 00000001 1 2e standard timing #5 01 00000001 1 2f 01 00000001 1 30 standard timing #6 01 00000001 1 31 01 00000001 1 32 standard timing #7 01 00000001 1 33 01 00000001 1 34 standard timing #8 01 00000001 1 35 01 00000001 1 36 pixel clock/10,000 (lsb) c7 11000111 199 37 pixel clock/10,000 (msb) 1b 00011011 27 38 horiz. active pixels(lower 8 bits) 00 00000000 0 39 horiz.blanking (lower 8 bits) a0 10100000 160 3a horiz. active pixels:horiz. blanking (upper4:4 bits) 50 01010000 80 3b 20 00100000 32 3c 17 00010111 23 3d vert. active pixels:vert. blanking (upper4:4 bits) 30 00110000 48 3e 30 00110000 48 3f 20 00100000 32 40 vert. sync. offset=xx lines, sync width=xx lines 36 00110110 54 41 horz. ver. sync/width (upper 2 bits) 00 00000000 0 42 hori. image size (lower 8 bits) 30 00110000 48 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 29/30 43 vert. image size (lower 8 bits) be 10111110 190 44 hori. image size : vert. image size (upper 4 bits) 10 00010000 16 45 00 00000000 0 46 00 00000000 0 47 18 00011000 24 48 detailed timing/monitor 00 00000000 0 49 descriptor #2 00 00000000 0 4a 00 00000000 0 4b 0f 00001111 15 4c 00 00000000 0 4d 00 00000000 0 4e 00 00000000 0 4f 00 00000000 0 50 00 00000000 0 51 00 00000000 0 52 00 00000000 0 53 00 00000000 0 54 00 00000000 0 55 00 00000000 0 56 00 00000000 0 57 00 00000000 0 58 00 00000000 0 59 20 00100000 32 5a flag 00 00000000 0 5b flag 00 00000000 0 5c flag 00 00000000 0 5d fe 11111110 254 5e 00 00000000 0 5f manufacture 41 01000001 65 60 manufacture 55 01010101 85 61 manufacture 4f 01001111 79 62 0a 00001010 10 63 20 00100000 32 64 20 00100000 32 65 20 00100000 32 66 20 00100000 32 67 20 00100000 32 www..net
(c) copyright au optronics dec., 2003 all rights reserved. b141ew02 v3 no reproduction and redistribution allowed. 30/30 68 20 00100000 32 69 20 00100000 32 6a 20 00100000 32 6b 20 00100000 32 6c flag 00 00000000 0 6d flag 00 00000000 0 6e flag 00 00000000 0 6f data type tag:ascii string fe 11111110 254 70 flag 00 00000000 0 71 manufacture p/n 42 01000010 66 72 manufacture p/n 31 00110001 49 73 manufacture p/n 34 00110100 52 74 manufacture p/n 31 00110001 49 75 manufacture p/n 45 01000101 69 76 manufacture p/n 57 01010111 87 77 manufacture p/n 30 00110000 48 78 manufacture p/n 32 00110010 50 79 manufacture p/n 20 00100000 32 7a manufacture p/n 56 01010110 86 7b manufacture p/n 31 00110001 49 7c 20 00100000 32 7d 0a 00001010 10 7e extension flag 00 00000000 0 7f checksum dd 11011101 221 www..net

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