FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 1 march 2013 FDP8N50NZ / fdpf8n50nz n-channel unifet tm ii mosfet ? 500 v, 8 a, 850 m ? features ?r ds(on) = 770 m ? (typ.) @ v gs = 10 v, i d = 4 a ? low gate charge (typ. 14 nc) ? low c rss (typ. 5 pf) ? 100% avalanche tested ? improve dv/dt capability ? esd improved capability ? rohs compliant applications ? lcd/led tv ? lighting ? uninterruptible power supply ? ac-dc power supply description unifet tm ii mosfet is fairchild semiconductor ? ?s high voltage mosfet family based on advanced planar stripe and dmos technology. this advanc ed mosfet family has the smallest on-state resistance among the planar mosfet, and also provides superior swit ching performance and higher avalanche energy strength. in addition, internal gate-source esd diode allows unifet ii mosfet to withstand over 2kv hbm surge stress. this device family is suitable for switching power converter applications such as powe r factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp ballasts. g s d g s d to-220f s d g to-220 s d g mosfet maximum ratings t c = 25 o c unless otherwise noted thermal characteristics symbol parameter FDP8N50NZ fdpf8n50nz unit v dss drain to source voltage 500 v v gss gate to source voltage 25 v i d drain current - continuous (t c = 25 o c) 8 8* a - continuous (t c = 100 o c) 4.8 4.8* i dm drain current - pulsed (note 1) 32 32* a e as single pulsed avalanche energy (note 2) 122 mj i ar avalanche current (note 1) 8 a e ar repetitive avalanche energy (note 1) 13 mj dv/dt peak diode recovery dv/dt (note 3) 10 v/ns p d power dissipation (t c = 25 o c) 130 40.3 w - derate above 25 o c10.3w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter FDP8N50NZ fdpf8n50nz unit r ? jc thermal resistance, junction to case, max. 0.96 3.1 o c/w r ? cs thermal resistance, case to sink, typ. 0.5 - r ? ja thermal resistance, junction to ambient, max. 62.5 62.5 *drain current limited by maximum junction temperature
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity FDP8N50NZ FDP8N50NZ to-220 - - 50 fdpf8n50nz fdpf8n50nz to-220f - - 50 symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 250 ? a, v gs = 0v, t c = 25 o c 500 - - v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 o c-0.5-v/ o c i dss zero gate voltage drain current v ds = 500v, v gs = 0v - - 1 ? a v ds = 400v, t c = 125 o c--10 i gss gate to body leakage current v gs = 25v, v ds = 0v - - 10 ? a v gs(th) gate threshold voltage v gs = v ds , i d = 250 ? a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 4a - 0.77 0.85 ? g fs forward transconductance v ds = 20v, i d = 4a - 6.3 - s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 565 735 pf c oss output capacitance - 80 105 pf c rss reverse transfer capacitance - 5 8 pf q g(tot) total gate charge at 10v v ds = 400v,i d = 8a v gs = 10v (note 4) -1418nc q gs gate to source gate charge - 4 - nc q gd gate to drain ?miller? charge - 6 - nc t d(on) turn-on delay time v dd = 250v, i d = 8a r g = 25 ? , v gs = 10v (note 4) -1745ns t r turn-on rise time - 34 80 ns t d(off) turn-off delay time - 43 95 ns t f turn-off fall time - 27 60 ns i s maximum continuous drain to source diode forward current - - 8 a i sm maximum pulsed drain to source diode forward current - - 30 a v sd drain to source diode forward voltage v gs = 0v, i sd = 8a - - 1.4 v t rr reverse recovery time v gs = 0v, i sd = 8a di f /dt = 100a/ ? s - 228 - ns q rr reverse recovery charge - 1.43 - ? c notes: 1. repetitive rating: pulse width limited by maximum junction temperature 2. l = 3.8mh, i as = 8a, v dd = 50v, r g = 25 ? , starting t j = 25 ? c 3. i sd ?? 8a, di/dt ? 200a/ ? s, v dd ? bv dss , starting t j = 25 ? c 4. essentially independent of operating temperature typical characteristics
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.03 0.1 1 10 20 0.03 0.1 1 10 30 *notes: 1. 250 ? s pulse test 2. t c = 25 o c v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v i d , drain current[a] v ds , drain-source voltage[v] 246810 0.1 1 10 30 -55 o c 150 o c *notes: 1. v ds = 20v 2. 250 ? s pulse test 25 o c i d , drain current[a] v gs , gate-source voltage[v] 0369121518 0.4 0.8 1.2 1.6 2.0 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ ? ] , drain-source on-resistance i d , drain current [a] 0.4 0.8 1.2 1.6 2.0 2.4 1 10 100 *notes: 1. v gs = 0v 2. 250 ? s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0.1 1 10 30 0 300 600 900 1200 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 03691215 0 2 4 6 8 10 *note: i d = 8a v ds = 100v v ds = 250v v ds = 400v v gs , gate-source voltage [v] q g , total gate charge [nc]
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum safe operating area - FDP8N50NZ - fdpf8n50nz figure 11. maximum drain current figure 12. unclamped inductive vs. case temperature switching capability -100 -50 0 50 100 150 0.8 0.9 1.0 1.1 1.2 *notes: 1. v gs = 0v 2. i d = 250 ? a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] ? s 100 ? s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 1 10 100 1000 0.01 0.1 1 10 50 10 ? s 100 ? s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 2 4 6 8 10 i d , drain current [a] t c , case temperature [ o c ] t j = 25 o c t j = 125 o c t av , time in avalanche(ms) i as , avalanche current(a)
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 5 typical performance characteristics (continued) figure 13. transient thermal response curve - FDP8N50NZ figure 14. transient thermal response curve - fdpf8n50nz 10 -5 10 -4 10 -3 10 -2 10 -1 1 0.01 0.1 1 2 0.01 0.1 0.2 0.05 0.02 *notes: 1. z ? jc (t) = 0.96 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [ z ? jc ] rectangular pulse duration [sec] t 1 p dm t 2 10 -5 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 *notes: 1. z ? jc (t) = 3.1 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [ z ? jc ] rectangular pulse duration [sec] 5 t 1 p dm t 2
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 6 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 7 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 8 mechanical dimensions to-220b03
FDP8N50NZ/ fdpf8n50 nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 9 package dimensions dimensions in millimeters to-220m03
FDP8N50NZ/ fdpf8n50nz n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation FDP8N50NZ/ fdpf8n50nz rev.c1 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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