technical data 1 pulse dialer the in9151-3 pulse dialer is a monolithic cmos integrated circuit which converts pushbutton inputs to a series of pulses suitable for telephone dialing. it is intended to replace mechanical telephone dialers and can operate directly from telephone lines. cmos technology is used to produced this device, resulting in very low power requirements and high noise immunity. the in9151-3 can be easily interfaced with a variety of telephones, requiring only a minimal number of external components. ? direct telephone line operation ? 4 x 3 matrix keyboard interface ? supply voltage range of 2.0 to 5.5 volts ? inexpensive rc oscillator ? low power standby mode for redialing ? 22-digit redial memory ? redial with either * or # key ? dialer reset for line power breaks > 200 ms ? selectable make/break ratio ? high speed test capacity in9151-3 ordering information IN9151N-3 plastic t a = -20 to 70 c for package pin assignment keyboard assignment r1123 r2456 r3789 r4 * 0 # c1 c2 c3 (*,# : redial) logic diagram pin 5 = v cc pin 12 = gnd
in9151-3 2 pin description pin no. name description 1 2 3 4 14 15 16 r1~r4 c1~c3 key inputs. these inputs can be interfaced to either an xy matrix keyboard or a 2 of 7 type keyboard. the keypad inputs are normally held at high. when a key is depressed, scanning signals are presented at c1, c2, and c3 inputs; the dialer identifies the key by examining the r1~r4 inputs. debouncing is provided to avoid false entry. 5 12 v cc gnd positive power supply input. negative power supply input. 6 7 8 ck1,ck, ck oscillator circuit input/output. the oscillator consists of two inverters, with oscillator frequency controlled by external rc components: r ck1 =270k ? , r ck =150k ? , c ck =150 pf 9__ dp dialing pulse output. this output consists of an n-channel open drain device. normally this output will be in off state during make and on during break. dialing pulse rate = 10pps and inter-digital pause = 800 ms when f osc =18khz in normal mode. 10 m/b make/break ratio select input. in normal mode, this input is used to select the make/break ratio: when input = v cc , m/b ratio = 1/2. when input = gnd, m/b ratio = 2/3. when connected to the clock output (pin 7), this input can trigger the in9151-3 into test mode, generating high speed dialing. 11 __ hk hook switch input. this input is used to detect whether the telephone is in the on-hook or off-hook state: v cc =on-hook gnd=off-hook. (resetting time = 200 ms minimum) 13 mute mute output. this output is an inverter normally at low state when there is no key entry. during outdialing it changes to high state and is used to mute the speech network.
IN9151N-3 3 maximum ratings * symbol parameter value unit v cc dc supply voltage (referenced to gnd) -0.3 to +5.5 v v in dc input voltage (referenced to gnd) -0.3 to v cc +0.3 v p d power dissipation in still air , plastic dip ** 600 mw tstg storage temperature -55 to +150 c t l lead temperature, 1mm from case for 10 seconds 260 c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. ** durating: -10 mw / c from 65 c to 70 c. recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 2.0 5.5 v v in dc input voltage (referenced to gnd) 0 v cc v t a operating temperature -10 +70 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. dc electrical characteristics (voltages referenced to gnd, v cc = 2.0 v to5.5 v, t a = -20 to +70 c) guaranteed limits symbol parameter test conditions min max unit i mr maximum memory retention current v cc =1.0 v, hk=v cc ,all outputs unloaded 1 a i cc maximum supply operating current oscillator running, all outputs unloaded 200 a i sb maximum standby current all outputs unload hk=v cc 4 a i ol minimum output sink current (mute, dp) v cc =2.0v, v out =0.5v, f=18khz 2ma i oh minimum output drive current (mute) v cc =2.0v, v out =v cc -1v, f=18khz 1ma v il min high-level input voltage 0.8v cc v cc v cc v il max low-level input voltage gnd 0.2v cc i in max. input leakage current v cc =5.5v 1.0 a
in9151-3 4 ac electrical characteristics (f osc = 18 khz, v cc =2.0 to 5.5 v, t a =-20 to +70 c ) symbol parameter test conditions guaranteed limit unit min. typ. max m/b make/break m/b=v cc 1/2 ratio m/b=gnd 2/3 dr dial pulse f osc =18khz 10 pps rate f osc =36khz 20 maximum 10pps 1/2 33 t m make time 10pps 2/3 40 ms (figure 3) 20pps 1/2 16.6 20pps 2/3 20 maximum 10pps 1/2 66 t b break time 10pps 2/3 60 (figure 3) 20pps 1/2 33 20pps 2/3 30 maximum 10pps 1/2 800 t idp inter-digital 10pps 2/3 800 pause time 20pps 1/2 400 (figure 3) 20pps 2/3 400 maximum 10pps 1/2 800 t pdp pre-digital 10pps 2/3 800 pause 20pps 1/2 400 (figure 3) 20pps 2/3 400 maximum 10pps 1/2 33 t mdp mute delay 10pps 2/3 40 time 20pps 1/2 16.6 (figure 3) 20pps 2/3 20 t kd minimum key debounce time v in =gnd or v cc 30
IN9151N-3 5 operation procedures symbol definitions: d p : pulse digit (0 through 9) zizizi: conversation 0-0 : off-hook. 0-0 : on-hook. * or # : redial recommended operations: normal dialing: 0-0 ; d p ... d p ; zizizi; 0-0 dial pulse begins as soon as first key is entered. debounced and detected on chip. redialing: 0-0 ; * or # key (* or # key can be accepted as first key entry after off-hook.) functional description 1) n-channel open drain output - dp (figure 1). 2) clock oscillator the clock oscillator consists of two inverters, with the frequency of oscillation controlled by external components connected to pins 6,7, and 8. the circuit is sufficiently versatile to allow the use of a variety of external component configurations. the oscillator circuit is shown in figure 2. figure 1 figure 2
in9151-3 2 switching waveforms expanded logic diagram
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