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  this is information on a product in full production. august 2012 doc id 018866 rev 3 1/21 21 STGIPS40W60L1 sllimm? (small low-loss intelligent molded module) ipm, single phase - 40 a, 600 v ultra fast igbt datasheet ? production data features ipm 40 a, 600 v single phase igbt including control ics for gate driving and free-wheeling diodes very high switching speed igbts v ce(sat) negative temperature coefficient 3.3 v, 5 v, 15 v cmos/ttl inputs comparators with hysteresis and pull down / pull up resistors undervoltage lockout internal bootstrap diode dead time and interlocking function smart shutdown function comparator for fault protection against over temperature and overcurrent op amp for advanced current sensing dbc substrate leading to low thermal resistance isolation rating of 2500 v rms /min 4.7 k ntc ul recognized for temperature control ul recognized : ul1557 file e81734 applications power factor correction for compressors description this intelligent power module provides a compact, high performance ac motor drive for a simple and rugged design. it targets high frequency converters. it combines st proprietary control ics with the most advanced igbt and diode technologies tailored to high switching frequency operation. sllimm? is a trademark of stmicroelectronics. sdip-22l table 1. device summary order code marking package packaging STGIPS40W60L1 gips40w60l1 sdip-22l tube www.st.com
contents STGIPS40W60L1 2/21 doc id 018866 rev 3 contents 1 internal schematic diagram and pin configuration . . . . . . . . . . . . . . . . 3 2 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 ntc thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1.2 dead time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STGIPS40W60L1 internal schematic diagram and pin configuration doc id 018866 rev 3 3/21 1 internal schematic diagram and pin configuration figure 1. internal schematic diagram pin16: gnd pin17: n pin 3 : nc pin19: pha s e pin22: p pin1 8 : n pin21: p pin20: pha s e pin1: out pin2: vboot lin s d/od vcc gnd dt out hvg v b oot hin opout lvg cp+ op+ op- pin6: /lin pin 8 : hin pin1 3 : vcc pin10: op- pin12: op+ pin11: opout pin7: / s d pin14: cin pin4: t1 pin5: t2 pin15: gnd pin9: dt am09 38 6v2
internal schematic diagram and pin configuration STGIPS40W60L1 4/21 doc id 018866 rev 3 figure 2. pin layout (bottom view) table 2. pin description pin symbol description 1out phase phase reference output 2v boot bootstrap voltage 3 nc not connected 4t 1 ntc thermistor terminal 1 5t 2 ntc thermistor terminal 2 6lin low side logic input 7sd /od shutdown logic input (active low) / open drain (comparator output) 8 hin high side logic input 9 dt dead time setting 10 op- op amp inverting input 11 op out op amp output 12 op+ op amp non inverting input 13 v cc low voltage power supply 14 cin comparator input 15 gnd ground 16 gnd ground 17 n negative dc input 18 n negative dc input 19 phase phase output 20 phase phase output 21 p positive dc input 22 p positive dc input am06017v1 m a rking a re a
STGIPS40W60L1 electrical ratings doc id 018866 rev 3 5/21 2 electrical ratings 2.1 absolute maximum ratings table 3. inverter part symbol parameter value unit v ces each igbt collector emitter voltage (v in = 0) 600 v i c (1) 1. calculated according to the iterative formula: each igbt continuous collector current at t c = 25c 40 a i cp (2) 2. pulse width limited by max junction temperature each igbt pulsed collector current 80 a p tot each igbt total dissipation at t c = 25c 100 w table 4. control part symbol parameter min. max. unit v out output voltage applied between out u , out v , out w - gnd v boot - 21 v boot + 0.3 v v cc low voltage power supply - 0.3 21 v v cin comparator input voltage - 0.3 v cc + 0.3 v v op+ opamp non-inverting input - 0.3 v cc + 0.3 v v op- opamp inverting input - 0.3 v cc + 0.3 v v boot bootstrap voltage - 0.3 620 v v in logic input voltage applied between hin, lin and gnd - 0.3 15 v v sd /od open drain voltage - 0.3 15 v dv out /dt allowed output slew rate 50 v/ns table 5. total system symbol parameter value unit v iso isolation withstand voltage applied between each pin and heatsink plate (ac voltage, t = 60 sec.) 2500 v t j power chips operating junction temperature -40 to 150 c t c module case operation temperature -40 to 125 c i c t c () t jmax () t c ? r thj c ? v ce sat () max () t jmax () i c t c () , () ------------------------------------------------------------------------------------------------------- =
electrical ratings STGIPS40W60L1 6/21 doc id 018866 rev 3 2.2 thermal data table 6. thermal data symbol parameter value unit r thjc thermal resistance junction-case single igbt 1.25 c/w thermal resistance junction-case single diode 2.5 c/w figure 3. transient thermal impedance igbt/diode - inverter am09 38 5v1 0.01 0.1 1 10 1.e-04 1.e-0 3 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 z thj-c [k/w] time [ s ] diode igbt
STGIPS40W60L1 electrical characteristics doc id 018866 rev 3 7/21 3 electrical characteristics t j = 25 c unless otherwise specified. table 7. inverter part symbol parameter test conditions value unit min. typ. max. v ce(sat) collector-emitter saturation voltage v cc = v boot = 15 v, v in = 1 "logic state", i c = 30 a -2.02.5 v v cc = v boot = 15 v, v in = 1 "logic state", i c = 30 a, t j = 125 c -1.7 i ces collector-cut off current (v in = 0 "logic state") v ce = 550 v, v cc = v boot = 15 v, - 500 a v f diode forward voltage v in = 0 "logic state", i f = 30a - 2.5 v switching on/off (inductive load) (1) t on tu r n - o n t i m e v dd = 410 v, v cc = v boot = 15 v, v in = 1 "logic state" (see ta bl e 1 3 ) i c = 30 a (see figure 4 and 5 ) - 410 - ns t c(on) crossover time (on) - 80 - t off turn-off time - 320 - t c(off) crossover time (off) - 125 - t rr reverse recovery time - 115 - e on turn-on switching losses - 585 - j e off turn-off switching losses - 600 - di/dt (on) rate of rise of on-state current v dd = 410 v, v cc = v boot = 15 v, v in = 1 "logic state" (see ta bl e 1 3 ), i c = 80 a (see figure 4 and 5 ) - 2500 - a/s t on tu r n - o n t i m e v dd = 410 v, v cc = v boot = 15 v, v in = 1 "logic state" (see ta bl e 1 3 ) i c = 30 a, t j = 125 c (see figure 4 and 5 ) - 550 - ns t c(on) crossover time (on) - 110 - t off turn-off time - 420 - t c(off) crossover time (off) - 140 - t rr reverse recovery time - 150 - e on turn-on switching losses - 930 - j e off turn-off switching losses - 780 - di/dt (on) rate of rise of on-state current v dd = 410 v, v cc = v boot = 15 v, v in = 1 "logic state" (see ta bl e 1 3 ) i c = 80 a, t j = 125 c (see figure 4 and 5 ) - 2100 - a/s 1. t on and t off include the propagation delay time of the internal drive. t c(on) and t c(off) are the switching time of igbt itself under the internally given gate driving condition. paramete r values take into account a 20 nh stray inductance.
electrical characteristics STGIPS40W60L1 8/21 doc id 018866 rev 3 figure 4. switching time test circuit figure 5. switching time definition (1) 1. ?switching time definition" refers to hin inputs (active high). for lin inputs (active low), v in polarity must be inverted for turn-on and turn-off. v ce i c i c v in t on t c(on) v in(on) 10% i c 90% i c 10% v ce ( a ) t u rn-on ( b ) t u rn-off t rr 100% i c 100% i c v in v ce t off t c(off) v in(off) 10% v ce 10% i c am0922 3 v1
STGIPS40W60L1 electrical characteristics doc id 018866 rev 3 9/21 3.1 control part table 8. low voltage power supply (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit v cc_hys v cc uv hysteresis 1.2 1.5 1.8 v v cc_thon v cc uv turn on threshold 11.5 12 12.5 v v cc_thoff v cc uv turn off threshold 10 10.5 11 v i qccu undervoltage quiescent supply current v cc = 10 v sd /od = 5 v; lin = 5 v; hin = 0, cin = 0 200 a i qcc quiescent current v cc = 15 v sd /od = 5 v; lin = 5 v hin = 0, cin = 0 1ma v ref internal reference voltage 0.5 0.54 0.58 v table 9. bootstrapped voltage (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit v bs_hys v bs uv hysteresis 1.2 1.5 1.8 v v bs_thon v bs uv turn on threshold 10.6 11.5 12.4 v v bs_thoff v bs uv turn off threshold 9.1 10 10.9 v i qbsu undervoltage v bs quiescent current v bs < 9 v sd /od = 5 v; lin and hin = 5 v; cin = 0 70 110 a i qbs v bs quiescent current v bs = 15 v sd /od = 5 v; lin and hin = 5 v; cin = 0 150 210 a r ds(on) bootstrap driver on resistance lvg on 120 table 10. logic inputs (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit v il low logic level voltage 0.8 v v ih high logic level voltage 2.25 v i hinh hin logic ?1? input bias current hin = 15 v 110 175 260 a i hinl hin logic ?0? input bias current hin = 0 v 1 a i linl lin logic ?1? input bias current lin = 0 v 3 6 20 a i linh lin logic ?0? input bias current lin = 15 v 1 a i sdh sd logic ?0? input bias current sd = 15 v 10 40 100 a i sdl sd logic ?1? input bias current sd = 0 v 1 a
electrical characteristics STGIPS40W60L1 10/21 doc id 018866 rev 3 table 11. op amp characteristics (v cc = 15 v unless otherwise specified) symbol parameter test condition min typ max unit v io input offset voltage v ic = 0 v, v o = 7.5 v 6 mv i io input offset current v ic = 0 v, v o = 7.5 v 440na i ib input bias current (1) 100 200 na v icm input common mode voltage range 0v v ol low level output voltage r l = 10 k to v cc 75 150 mv v oh high level output voltage r l = 10 k to gnd 14 14.7 v i o output short circuit current source, v id = + 1; v o = 0 v 16 30 ma sink, v id = - 1; v o = v cc 50 80 ma sr slew rate v i = 1 - 4 v; c l = 100 pf; unity gain 2.5 3.8 v/ s gbwp gain bandwidth product v o = 7.5 v 8 12 mhz a vd large signal voltage gain r l = 2 k 70 85 db svr supply voltage rejection ratio vs. v cc 60 75 db cmrr common mode rejection ratio 55 70 db 1. the direction of input current is out of the ic. table 12. sense comparator characteristics (v cc = 15 v unless otherwise specified) symbol parameter test conditions min. typ. max. unit i ib input bias current v cp+ = 1 v - 1 a v ol open-drain low-level output voltage i od = 3 ma - 0.5 v t d_comp comparator delay sd /od pulled to 5 v through 100 k resistor - 90 130 ns sr slew rate c l = 180 pf; r pu = 5 k -60 v/sec t sd shutdown to high / low side driver propagation delay v out = 0, v boot = v cc , v in = 0 to 3.3 v 50 125 200 ns t isd comparator triggering to high / low side driver turn-off propagation delay measured applying a voltage step from 0 v to 3.3 v to pin cini 50 200 250
STGIPS40W60L1 electrical characteristics doc id 018866 rev 3 11/21 note: x: don?t care table 13. truth table condition logic input (v i ) output sd /od lin hin lvg hvg shutdown enable half-bridge tri-state lxxll interlocking half-bridge tri-state hlhll 0 ??logic state? half-bridge tri-state hhl l l 1 ?logic state? low side direct driving hllhl 1 ?logic state? high side direct driving hhhlh
electrical characteristics STGIPS40W60L1 12/21 doc id 018866 rev 3 3.1.1 ntc thermistor equation 1: resistance variation vs. temperature where t are temperatures in kelvins table 14. ntc thermistor symbol parameter test conditions min. typ. max. unit. r 25 resistance t c = 25c 4.7 k r 125 resistance t c = 125c 160 b b-constant t c = 25c 3950 k t operating temperature -40 150 c figure 6. ntc resistance vs. temperature rt () r 25 e b 1 t --- 1 298 --------- - ? ?? ?? ? = 0.01 0.1 1 10 100 -50 0 50 100 t (c) r (k ) am07843v1 0.01 0.1 1 10 100 -50 0 50 100 t (c) r (k ) am07843v1
STGIPS40W60L1 electrical characteristics doc id 018866 rev 3 13/21 3.1.2 dead time figure 8. typical dead time vs. dt resistor value figure 7. dead time and interlocking waveforms definitions lin hin lvg hvg lin hin lvg hvg lin hin lvg hvg lin hin lvg hvg dt lh dt hl dt lh dt hl dt lh dt hl dt lh dt hl gate driver outputs off (half-bridge tri-state) interlocking interlocking control signal edges overlapped: interlocking + dead time control signals edges synchronous (*): dead time control signals edges not overlapped, but inside the dead time: dead time control signals edges not overlapped, outside the dead time: direct driving (*) hin and lin can be connected together and driven by just one control signal interlocking interlocking g gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) gate driver outputs off (half-bridge tri-state) 0 0.5 1 1.5 2 2.5 3 3.5 0 50 100 150 200 250 300 rdt (kohm) dt (s) am06020v1
electrical characteristics STGIPS40W60L1 14/21 doc id 018866 rev 3 3.2 recommendations input signal hin is active high logic. a 85 k (typ.) pull down resistor is built-in for each high side input. if an external rc filter is used, for noise immunity, pay attention to the variation of the input signal level. input signal lin is active low logic. a 720 k (typ.) pull-up resistor, connected to an internal 5 v regulator through a diode, is built-in for each low side input. to prevent the input signals oscillation, the wiring of each input should be as short as possible. by integrating an application specific type hvic inside the module, direct coupling to mcu terminals without any opto-coupler is possible. each capacitor should be located as nearby the pins of ipm as possible. low inductance shunt resistors should be used for phase leg current sensing. electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. additional high frequency ceramic capacitor mounted close to the module pins will further improve performance. the sd /od signal should be pulled up to 5 v / 3.3 v with an external resistor (see section 4: smart shutdown function for detailed info). when setting the maximum voltage to be applied between p-n, the internal stray inductance and the maximum di/dt should be considered. due to both internal and layout stray inductances, the di/dt results in a voltage surges between the dc-link capacitor and the switches during commutations. suggested control supply voltage (v cc ): from 13.5 v to 18 v suggested high side bias voltage (v bs between v boot and phase): from 13 v to 18 v for further details refer to an3338. table 15. recommended operating conditions symbol parameter conditions value unit min. typ. max. v pn supply voltage applied between p-nu, nv, nw 300 400 v v cc control supply voltage applied between v cc -gnd 13.5 15 18 v v bs high side bias voltage applied between v booti -out i for i = u, v, w 13 18 v t dead blanking time to prevent arm-short for each input signal 1 s f pwm pwm input signal -40c < t c < 100c -40c < t j < 125c 20 khz t c case operation temperature 100 c
STGIPS40W60L1 smart shutdown function doc id 018866 rev 3 15/21 4 smart shutdown function the STGIPS40W60L1 integrates a comparator for fault sensing purposes. the comparator non-inverting input (c in ) can be connected to an external shunt resistor in order to implement a simple overcurrent protection function. when the comparator triggers, the device is set in shutdown state and both its outputs are set to low-level leading the half- bridge in tri-state. in the common overcurrent protection architectures the comparator output is usually connected to the shutdown input through a rc network, in order to provide a mono-stable circuit, which implements a protection time that follows the fault condition. our smart shutdown architecture allows to immediately turn-off the output gate driver in case of overcurrent, the fault signal has a preferential path which directly switches off the outputs. the time delay between the fault and the outputs turn-off is no more dependent on the rc values of the external network connected to the shutdown pin. at the same time the internal logic turns on the open-drain output and holds it on until the shutdown voltage goes below the logic input lower threshold. finally the smart shutdown function provides the possibility to increase the real disable time without increasing the constant time of the external rc network. figure 9. smart shutdown timing waveforms pls refer to table 12 for internal propagation delay time details. hin/lin hvg/lvg sd/od open drain gate (internal) upper threshold lower threshold comp vref cp+ protection fast shut down: the driver outputs are set in sd state immediately after the comparator triggering even if the sd signal has not yet reach the lower input threshold real disable time 2 1 1 2 = (r on_od // r sd ) c sd = r sd c sd sd/od from/to controller v bias smart sd logic c sd r sd r on_od shut down circuit time constants
package mechanical data STGIPS40W60L1 16/21 doc id 018866 rev 3 5 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. please refer to dedicated technical note tn0107 for mounting instructions. table 16. sdip-22l package mechanical data dim. mm. min. typ. max. a 43.90 44.40 44.90 a1 1.15 1.35 1.55 a2 1.40 1.60 1.80 a3 38.90 39.40 39.90 b 21.50 22.00 22.50 b1 11.25 11.85 12.45 b2 24.83 25.23 25.63 c 5.00 5.40 6.00 c1 6.50 7.00 7.50 c2 11.20 11.70 12.20 e 2.15 2.35 2.55 e1 3.40 3.60 3.80 e2 4.50 4.70 4.90 e3 15.70 15.90 16.10 e4 6.30 6.50 6.70 e5 9.20 9.40 9.60 d 33.20 d1 5.60 e 10.20 e1 0.40 f 0.85 1.00 1.15 f1 0.35 0.50 0.65 r 1.55 1.75 1.95 t 0.45 0.55 0.65 v0 6
STGIPS40W60L1 package mechanical data doc id 018866 rev 3 17/21 figure 10. sdip-22l package drawing (dimensions are in mm.) 8229874_d
package mechanical data STGIPS40W60L1 18/21 doc id 018866 rev 3 figure 11. sdip-22l shipping tube (dimensions are in mm.) am10488v1 base quantity: 11 pcs bulk quantity: 132 pcs 8123127_e
STGIPS40W60L1 package mechanical data doc id 018866 rev 3 19/21 figure 12. sdip-22l shipping tube type b (dimensions are in mm.) antis tatic s 03 pvc am10487v1 8123127_e base quantity: 11 pcs bulk quantity: 132 pcs
revision history STGIPS40W60L1 20/21 doc id 018866 rev 3 6 revision history table 17. document revision history date revision changes 14-jun-2011 1 initial release. 24-jan-2012 2 added: figure 11 on page 18 . updated: figure 10 on page 17 . 28-aug-2012 3 document status promoted from preliminary data to production data. added: feature comparator for fault protection against over temperature and overcurrent on page 1 . modified: min. and max. value table 4 on page 5 .
STGIPS40W60L1 doc id 018866 rev 3 21/21 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in military, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2012 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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