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this is information on a product in full production. may 2014 docid026048 rev 2 1/21 sr1 4 pin smart reset? datasheet - production data features ? operating voltage range 2 v to 5.5 v ? low supply current 1 a ? integrated test mode ? single smart reset? push-button input with fixed extended reset setup delay (t src ) from 0.5 s to 10 s in 0.5 s steps (typ.), option with internal input pull-up resistor ? push-button controlled reset pulse duration ? option 1: fully push-button controlled, no fixed or minimum pulse width guaranteed ? option 2: defined output reset pulse duration (t rec ), factory-programmed ? single reset output ? active low or active high ? push-pull or open drain with optional pull- up resistor ? fixed smart reset input logic voltage levels ? operating temperature: -40 c to +85 c ? udfn6 package 1.00 mm x 1.45 mm ? ecopack ? 2 (rohs compliant, halogen- free) applications ? wearable ? activity tracker ? smartwatch ? smartglasses udfn6 (1.00 x 1.45 mm) www.st.com
contents sr1 2/21 docid026048 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.3 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.4 smart reset input (sr ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.5 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.6 rst output undervoltage behavior (for open-drain option) . . . . . . . . . . . . 6 4 typical application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10 tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 12 package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
docid026048 rev 2 3/21 sr1 description 21 1 description the smart reset tm devices provide a useful feature which ensures that inadvertent short reset push-button closures do not cause system resets. this is done by implementing an extended smart reset input delay time (t src ), which ensures a safe reset and eliminates the need for a specific dedicated reset button. this reset configuration prov ides versatility and allows th e application to distinguish between a software generated interrupt and a hard system reset. when the input push- button is connected to the microcontroller interrupt input, and is closed for a short time, the processor can only be interrup ted. if the system still does not respond properly, continuing to keep the push-button closed for the extended setup time t src causes a hard reset of the processor through the reset output. the sr1 has one smart reset input (sr ) with preset delayed smart reset setup time (t src ). the reset output (rst ) is asserted after the smart rese t input is held active for the selected t src delay time. the rst output remains asserted either until the sr input goes to inactive logic level (i.e. neither fixed nor mini mum reset pulse width is set) or the output reset pulse duration is fixed for t rec (i.e. factory-programmed). the device fully operates over a broad v cc range from 2.0 v to 5.5 v. 1.1 test mode after pulling sr up to v test (v cc + 1.4 v) or above, the counter starts to count the initial shortened t src-ini (42 ms, typ.). after t src-ini expires, the rst output either goes down for t rec (if t rec option is used) or stays low as long as overvoltage on sr is detected (if t rec option is not used). this is feedback, and the user only knows that the device is locked in test mode. each time the sr input is connected to ground in test mode, a shortened t src-short (t src /128) is used instead of regular t src (0.5 s - 10 s). in this way the device can be quickly tested without repeating test mode triggering. return to normal mode is possible by performing a new startup of the device (i.e. v cc goes to 0 v and back to its original state). the advantages of this solution are its high glitch immunity, user feedback regarding entry into test mode, and te stability within the full v cc range.
description sr1 4/21 docid026048 rev 2 1.2 logic diagram figure 1. sr1 logic diagram 1.3 pin connections figure 2. udfn6 pin connections (top view) 1. not connected (not bonded); should be connected to v ss . 567 *1' 9 && 65 65 $0y 3 1 2 v ss nc (1) sr 4 6 5 v cc rst udfn6 nc (1) sr1 am07463v2
docid026048 rev 2 5/21 sr1 device overview 21 2 device overview figure 3. sr1 block diagram table 1. signal names pin n name type description 1rst output reset output, active low, open drain. 2v ss supply ground ground 3sr input smart reset input, active low. 4v cc supply voltage positive supply voltage for the device. a 0.1 f decoupling ceramic capacitor is recommended to be connected between v cc and v ss pins. 5 nc - not connected (not bonded); should be connected to v ss . 6 nc - not connected (not bonded); should be connected to v ss . 65 w 65& jhqhudwru w 5(& jhqhudwru 567 2yhuyrowdjhghwhfw whvwprghwuljjhu $09 rswlrqdo
pin descriptions sr1 6/21 docid026048 rev 2 3 pin descriptions 3.1 power supply (v cc ) this pin is used to provide power to the smart reset device. a 0.1 f ceramic decoupling capacitor is recommended to be connected between the v cc and v ss pins, as close to the sr1 device as possible. 3.2 power-up sequence in normal mode, if different input side (sr ) and v cc voltage domains are used, power-on sequence must avoid meeting the test mode en try condition to avoid inadvertent test mode entry: there should not be logic high present on the sr input before the v cc power-up. however v cc and v(sr ) rising at the same time is ok (e .g. if both are in the same voltage domain), the device will then safely star t into normal operati ng mode, with rst output inactive (in high-z mode for open-drain option). 3.3 ground (v ss ) this is the ground pin for the device. 3.4 smart reset input (sr ) push-button smart reset input, active low with optional pull-up resistor. sr input needs to be asserted for at least t src to assert the reset output (rst ). by connecting a voltage higher than v cc + 1.4 v to the sr input the device enters test mode (see section 1: description on page 3 for more information). 3.5 reset output (rst ) rst is active low or active high, open drain or push-pull reset output with optional internal pull-up resistor. output reset pulse width is optional as follows: ? neither fixed nor minimum output reset pulse duration (releasing the push-button while reset output is active, causes the output to de-assert) ? fixed, factory-programmed output reset pulse duration for t rec independent on smart reset input state. 3.6 rst output undervoltage behavi or (for open-drain option) high-z on rst output below the specified operating voltage range is guaranteed at v cc power-on or in ca se that valid v cc dropped while the device was idle, i.e. while both output and input were inactive.
docid026048 rev 2 7/21 sr1 typical application diagrams 21 4 typical application diagrams figure 4. typical application diagram - inpu t, output and sr1 device in one voltage domain figure 5. typical application diagram - sr1 device in a different voltage domain than input and output 1. open-drain rst output type and fixed sr input logic threshold allows to use the device in different voltage domains. to prevent entering test mode by creating a condition v(sr ) > v cc + 1.1 v typ., v cc should be powered up before or together with voltage on the sr input. sr1 am07466v1 rst v ss sr sr1 v cc v cc v ss v dd reset int / nmi push - button switch mcu v dd am07466v2
typical application diagrams sr1 8/21 docid026048 rev 2 figure 6. typical application diagra m in different voltage domains - sr input in v bat domain like v cc totally disables the test mode sr1 am07466v3
docid026048 rev 2 9/21 sr1 timing diagrams 21 5 timing diagrams figure 7. rst output without t rec option 1. v cc should be powered up before or together with voltage on the sr input to prevent entering test mode by creating a condition v(sr ) > v cc +1.1 v typ. figure 8. rst output with t rec option 1. v cc should be powered up before or together with voltage on the sr input to prevent entering test mode by creating a condition v(sr ) > v cc +1.1 v typ.
typical operating characteristics sr1 10/21 docid026048 rev 2 6 typical operating characteristics figure 9. supply current (i cc ) vs. temperature (t a ) figure 10. smart reset delay (t src ) vs. temperature (t a ), t src = 4.0 s (typ.) $0 7hpshudwxuh7 $ ?& 9 && 9 9 && 9 9 && 9 7hpshudwxuh7 $ ?& 6pduw5hvhwghod\w 65& v 9 && 9 9 && 9 9 && 9 $0
docid026048 rev 2 11/21 sr1 typical operating characteristics 21 figure 11. test mode entry voltage (v test ) vs. temperature (t a ) figure 12. initial test mode time (t src-ini ) vs. temperature (t a ) 7hpshudwxuh7 $ ?& 7hvwprghhqwu\yrowdjh9 7(67 9 9 && 9 9 && 9 9 && 9 $0 7hpshudwxuh7 $ ?& ,qlwldowhvwprghwlphw 65&b,1, pv 9 && 9 9 && 9 9 && 9 $0
maximum ratings sr1 12/21 docid026048 rev 2 7 maximum ratings stressing the device ab ove the rating listed in table 2: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in table 3: operating and measurement conditions of this specification is not imp lied. exposure to absolute maximum rating conditions for extended periods may af fect device reliability. refer also to the stmicroelectronics? sure program and other relevant quality documents. table 2. absolute maximum ratings symbol parameter value unit t stg storage temperature (v cc off) -55 to +150 c t sld (1) 1. reflow at peak temperature of 260 c. the time above 255 c must not exceed 30 seconds. lead solder temperature for 10 seconds 260 c v io input or output voltage -0.3 to 5.5 v v cc supply voltage -0.3 to 7 v esd v hbm electrostatic discharge protec tion, human body model (jesd22- a114-b level 2) 2kv v rcdm electrostatic discharge protection, charged device model, all pins 1 kv v mm electrostatic discharge protection, machine model, all pins (jesd22-a115-a level a) 200 v latch-up (v cc pin, sr reset input pin) eia/jesd78
docid026048 rev 2 13/21 sr1 dc and ac parameters 21 8 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the de vice. the parameters in table 4: dc and ac characteristics are derived from tests performed under the measurement conditions summarized in table 3: operating and measurement conditions . designers should check that the operating conditions in their circuit match the operati ng conditions when relying on the quoted parameters. table 3. operating and measurement conditions symbol parameter value unit v cc supply voltage 2.0 to 5.5 v t a ambient operating temperature -40 to +85 c t r , t f input rise and fall times ? 5ns input pulse voltages 0.2 to 0.8 v cc v input and output timing reference voltages 0.3 to 0.7 v cc v
dc and ac parameters sr1 14/21 docid026048 rev 2 table 4. dc and ac characteristics symbol parameter t est conditions (1) min. typ. (2) max. unit v cc supply voltage 2.0 5.5 v i cc supply current sr = v cc , t rec and t src counter is not running 0.4 1.0 a v ol reset output voltage low v cc ? 4.5 v, sinking 3.2 ma 0.3 v v cc ? 3.3 v, sinking 2.5 ma 0.3 v v cc ? 2.0 v, sinking 1 ma 0.3 v t rec reset timeout delay, factory-programmed (device option) 140 210 280 ms 240 360 480 ms r puo internal output pull-up resistor on rst (device option) 65 k ? i lo output leakage current v rst = 5.5 v, open drain device option without output pull-up resistor -0.1 0.1 a smart reset t src smart reset delay t a = -40 to +85 c 0.8 x t src t src (3) 1.2 x t src s t a = 25 c 0.9 x t src 1.1 x t src v il sr input voltage low v ss -0.3 0.3 v v ih sr input voltage high 0.85 5.5 v r pui internal input pull-up resistor on sr (device option) 65 k ? i leak sr input leakage current device option without input pull-up resistor -0.1 0.1 a input glitch immunity t src s test mode v test test mode entry voltage v cc +0.9 v cc +1.1 v cc +1.4 v t src-ini initial test mode time 28 42 56 ms t src-short shortened smart reset delay t src / 128 ms 1. valid for ambient operating temperature t a = -40 to +85 c, v cc = 2.0 to 5.5 v. 2. typical values are at 25 c and v cc = 3.3 v unless otherwise noted. 3. factory-programmable in the range of 0.5 s to 10 s typ. in 0.5 s steps.
docid026048 rev 2 15/21 sr1 package information 21 9 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. figure 13. udfn6, (1.00 x 1.45 x 0. 50 mm), 0.50 mm pitch package outline 8')1/ 1 ' ( $ $ / n he
package information sr1 16/21 docid026048 rev 2 figure 14. footprint recommendation for udfn6 (1.00 x 1.45 x 0.50 mm), 0.50 mm pitch table 5. udfn6, (1.00 x 1. 45 x 0.50 mm), 0.50 mm pitch package mechanical data symbol dimensions note (1) 1. package outline exclusive of any mold flashes dimensions and metal burrs. (mm) (inches) min. typ. max. min. typ. max. a 0.50 0.55 0.60 0.0197 0.0217 0.0236 a1 0.00 0.02 0.05 0.000 0.0008 0.0020 b 0.18 0.25 0.30 0.0071 0.0098 0.0118 d 1.40 1.45 1.50 0.0551 0.0571 0.0591 e 0.95 1.00 1.05 0.0374 0.0394 0.0413 e 0.45 0.50 0.55 0.0177 0.0197 0.0217 k 0.20 0.0079 l 0.30 0.35 0.40 0.0118 0.0138 0.0157 $0
docid026048 rev 2 17/21 sr1 tape and reel information 21 10 tape and reel information figure 15. carrier tape 1. 10-sprocket hole pitch cu mulative tolerance 0.20. figure 16. pin 1 orientation $0 $09 8vhugluhfwlrqriihhg
part numbering sr1 18/21 docid026048 rev 2 11 part numbering table 6. ordering information scheme example: sr1 h a r u device type sr1 smart reset se tup delay (t src ) (1) 1. smart reset delay (t src ) is available from 0.5 s to 10 s in 0.5 s steps (typ.). minimum order quantities may apply. contact local sales office for availability. c = factory programmable t src = 1.5 s (typ.) h = factory programmable t src = 4.0 s (typ.) l = factory programmable t src = 6.0 s (typ.) p = factory programmable t src = 7.5 s (typ.) u = factory programmable t src = 10.0 s (typ.) inputs, outputs type (2) 2. push-pull reset output type also avail able (active low or active high). sr input and open drain reset output available with optional pull-up resi stor. minimum order quantities may apply. contact local sales office for availability. a = active low sr input with no pull-up, active low open drain rst output with no pull-up b = active low sr input with pull-up, active low open drain rst output with no pull-up reset timeout period (t rec ) a = factory programmable t rec = 210 ms (typ.) b = factory programmable t rec = 360 ms (typ.) r = push-button controlled (no defined t rec ) package u = udfn-6l
docid026048 rev 2 19/21 sr1 package marking information 21 12 package marking information figure 17. package marking (top view) table 7. package marking part number t src (s) smart reset inputs (1) 1. al = active low. output type (2) 2. od = open drain, al = active low. t rec option (3) 3. no t rec = push-button controlled reset pulse width, any other value represents typical value of t rec . package topmark sr1caru 1.5 al od, al no t rec udfn6 ca sr1haru 4.0 al od, al no t rec udfn6 ha sr1laru 6.0 al od, al no t rec udfn6 la sr1paau 7.5 al od, al 210 ms udfn6 pb sr1paru 7.5 al od, al no t rec udfn6 pa SR1PBBU 7.5 al + pull-up od, al 360 ms udfn6 pc sr1uaru 10.0 al od, al no t rec udfn6 ua $ % $ grwslquhihuhqfh % pdunlqjduhdwrspdun *$3060'
revision history sr1 20/21 docid026048 rev 2 13 revision history table 8. document revision history date revision changes 10-mar-2014 1 initial release 13-may-2014 2 modified t rec values table 4 on page 14
docid026048 rev 2 21/21 sr1 21 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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