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this is information on a product in full production. may 2014 docid026047 rev 2 1/22 sr2 6 pin smart reset? datasheet - production data features ? operating voltage 1.65 v to 5.5 v ? low supply current 1.5 a ? integrated test mode ? dual smart reset? push- button inputs with fixed extended reset setup delay (t src ) from 0.5 s to 10 s in 0.5 s steps (typ.), option with internal pull-up resistor ? push-button controlled reset pulse duration ? option 1: fully push-button controlled, no fixed or minimum pulse width guaranteed ? option 2: defined output reset pulse duration (t rec ), factory-programmed ? no power-on reset ? single reset output ? active low or active high ? push-pull or open drain with optional pull- up resistor ? fixed smart reset? inpu t logic voltage levels ? operating temperature: - 40 c to +85 c ? udfn6 package: 1.6 mm x 1.3 mm ? ecopack ? 2 (rohs compliant, halogen- free) applications ? wearable ? activity tracker ? smartwatch ? smartglasses udfn6 (1.6 x 1.3 mm) www.st.com
contents sr2 2/22 docid026047 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 smart reset? input (sr0 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.4 smart reset? input (sr1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.5 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 11 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 docid026047 rev 2 3/22 sr2 description 22 1 description the smart reset? devices provide a useful fe ature that ensures inadvertent short reset push-button closures do not cause system resets. this is done by implementing extended smart reset? input delay time (t src ) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button. this reset configuration prov ides versatility and allows th e application to distinguish between a software generated interrupt and a hard system reset. when the input push- button are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrup ted. if the system still does not respond properly, continuing to keep the push-button closed for the extended setup time t src causes a hard reset of the processor through the reset output. the sr2 has two combined delayed smart reset? inputs (sr0 , sr1 ) with preset delayed smart reset? setup time (t src ). the reset output is asserted after both of the smart reset? inputs were held ac tive for the selected t src delay time. depending on selected option the rst output remains asserted either until at least one sr input goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for t rec (i.e. factory-programmed). the reset output, rst , is active low or active high, push-pull or open drain with option al pull-up resistor. the device fully operates over a broad v cc range 1.65 v to 5.5 v. below 1.575 v typ. the inputs are ignored and outputs are deasserted; the deasserted reset ou tput levels are then valid down to 1.0 v. 1.1 test mode after pull of sr0 up to v test or more (v cc + 1.4 v, max.) we start counting initial shorten t src-ini (42 ms, typ.). after t src-ini expires, the rst output either goes down for t rec (if t rec option is used) or stays low as long as overvoltage on sr0 in detected (if t rec option is not used). this is a feedback and a user knows that the device is locked in the test mode. each time both sr inputs are connected to ground in test mode a shorten t src-short (21 ms, typ.) is used instead of long t src (0.5 s -10 s). retu rn from to normal mode is possible by a new startup of the device (i.e. v cc goes to 0 v and back to its original state). in this way the device can be quickly tested without repeating test mode triggering. advantage of this solution is pretty high glitch immunity, feedback to user about entry to the test mode and testability within full v cc range. description sr2 4/22 docid026047 rev 2 figure 1. logic diagram figure 2. pin connections (top view) sr2 rst gnd v cc sr 0 sr1 gams2602141440sg 1 2 34 5 6 sr2 v ss nc v cc sr 0 rst sr 1 gams2602141445sg docid026047 rev 2 5/22 sr2 description 22 figure 3. block diagram table 1. signal names pin name type description 1 v ss supply ground ground 2 sr1 input secondary push-button smart reset? input. active low. optional pull-up resistor 3 rst output reset output (open drain with optional pull-up resistor, active low) (push-pull ? active low or active high) 4 nc - not connected (not bon ded; should be connected to v ss ) 5 sr0 input primary push-button smart reset? i nput. active low. optional pull-up resistor 6 v cc supply voltage positive supply voltage for the device. a 0.1 f decoupling ceramic capacitor is recommended to be connected between v cc and v ss pins, as close to the sr2 device as possible w 6 5 & j h q h u d w r u w 5 ( & j h q h u d w r u r s w l r q d o 5 6 7 $ 1 ' 2 y h u y r o w d j h g h w h f w w h v w p r g h w u l j j h u 6 5 6 5 $ 0 9 pin descriptions sr2 6/22 docid026047 rev 2 2 pin descriptions 2.1 power supply (v cc ) this pin is used to provide power to the smart reset? device. a 0.1 f ceramic decoupling capacitor is recommended to be connected between the v cc and v ss pins, as close to the sr2 device as possible. 2.2 ground (v ss ) ground pin for the device. 2.3 smart reset? input (sr0 ) push-button smart reset? input is active low with optional pull-up resistor. both sr inputs need to be asserted simultaneously for at least t src to assert the reset output (rst ). by connecting a voltage higher than v cc to the sr0 the device enters a test mode (see section 1: description on page 3 for more information). 2.4 smart reset? input (sr1 ) push-button smart reset? input is active low with optional pull-up resistor. both sr inputs need to be asserted simultaneously for at least t src to assert the reset output (rst ). 2.5 reset output (rst ) rst is active low or active high, push-pull or open drain reset output with optional internal pull-up resistor. output reset puls e width is optional as follows: ? neither fixed nor minimum output reset pulse duration (releasing the push-button while reset output is active, causes the output to deassert); ? fixed, factory-programmed output reset pulse duration for t rec independent on smart reset? input state. if v cc drops below 1.575 v, the rst output is deasserted and its state is guaranteed down to 1 v (see figure 8 ). docid026047 rev 2 7/22 sr2 typical application diagram 22 3 typical application diagram figure 4. single-button smart reset? typical hookup 1. external pull-up resistor requested if the reset output (rst ) is open drain type without internal pull-up. 2. external pull-up resistor requested if the smart reset? inputs (sr0 and sr1 ) have no internal pull-up. 3. when only one smart reset? input push-button is used, tie both the sr inputs together. v cc v cc v cc push -button switch mcu rst v ss v ss sr1 sr0 sr2 reset int / nmi gams2602141450sg (1) (2) (3) typical application diagram sr2 8/22 docid026047 rev 2 figure 5. dual-button smart reset? typical hookup 1. external pull-up resistor requested if the reset output (rst ) is open drain type without internal pull-up. 2. external pull-up resistor requested if the smart reset? inputs (sr0 and sr1 ) have no internal pull-up. v cc v cc v cc push - button switch push -button switch mcu rst v ss v ss sr1 sr0 sr2 reset int / nmi gams2602141500sg (1) (2) (2) docid026047 rev 2 9/22 sr2 timing waveforms 22 4 timing waveforms figure 6. option without t rec figure 7. option with t rec 9 & |