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  cha3801 - qdg rohs compliant ref. : dscha3801 - qdg3119 - 29 apr 13 1 / 12 specifications subject to cha nge without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 l - band low noise amplifier gaas monolithic microwave ic in smd leadless package description the cha3801 - qdg is an l - band lna monolithic circuit including an active bias network. furthermore a protection network is included in order to allow high input power survivability. it is designed for a wide range of applications, from military to commercial communication systems. the circuit is man ufactured with a phemt process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is supplied in rohs compliant smd package. main features D - 40c - - - - +25c D - +85c typical noise figure versus temperature main electrical characteristics tamb. = +25c symbol parameter min typ max unit freq frequency range 1 2 ghz gain linear gain 28 db nf noise figure 1.5 db pout output power @1db comp. 15 dbm ums a3801 yyww ? ? ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 2 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 operating modes mode description pin #7 pin #10 pin #8 pin #11 pin #9 pin #12 pin # 13 pin #14 1a nominal bias current - 5v n.c.* n.c. * +5v 1b high bias current n.c.* - 5v n.c. * +5v 1c low bias current - 5v - 5v n.c. * +5v * not connected input protection state pin #6 enabled gnd disabled - 5v electri cal characteristics tamb.= +25c, vd = +5v under working mode 1a and input protection disabled symbol parameter min typ max unit freq frequency range 1 2 ghz gain** gain 28 db - gain flatness 0.5 db p - p rlin input return loss - 15 db rlout ou tput return loss - 15 db nf ** noise figure 1.5 db |s12| reverse isolation 40 db oip3 ** output third order intercept point 27 dbm op1db ** output 1 db compression point 15 dbm id_1a total drain current (mode 1a) 72 ma id_1b total drain current (mode 1b) 92 ma id_1c total drain current (mode 1c) 45 ma vd drain voltage 5 v vg gate voltage - 5 v ** under working mode 1a and input protection disabled these values are representative of measurements on board
l - band low noise amplifier cha3801 - qdg ref. : dscha3801 - qdg3119 - 29 apr 13 3 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - f rance tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 absolute maximum ratings (1) tamb.= +25c symbol parameter values unit vd drain bias voltage (vg= - 5v) 6.5 v vctrl control voltage - 6 to 0 v vg gate bias voltage (vd=+5v) - 6 to 0 v pin protection switch enabled +17 dbm pin protection switch disabled +6 dbm tj juncti on temperature 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +150 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s. typical bias conditions tamb.= +25c symbol pin n o parameter values unit vd 13, 14 drain voltage +5 v vg 7, 10 gate voltage C
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 4 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperature is monitored at the package back - side interface (tcase) as shown below. the system maximum temperature must be adjusted in order to gu arantee that tcase remains below than the maximum value specified in the next table. so, the system pcb must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase temperature can not be maintained bel ow than the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf).
l - band low noise amplifier cha3801 - qdg ref. : dscha3801 - qdg3119 - 29 apr 13 5 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - f rance tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements temperature - 40c, +25c, +85c vd = +5v, working mode 1a with input protection disabled linear gain versus frequency input return loss versus frequency output return loss versus frequency D - 40c - - - - +25c D - +85c
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 6 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements temperature - 40c, +25c, +85c vd = +5v, working mode 1a with input protection disabled noise figure versus frequency output power @ 1db comp. versus frequency D - 40 c - - - - +25c D - +85c
l - band low noise amplifier cha3801 - qdg ref. : dscha3801 - qdg3119 - 29 apr 13 7 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - f rance tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd = +5v, working with input protection disabled linear gain noise figure versus frequency output power @ 1db comp. versus frequency output ip3 versus frequency D mode 1c - - - - mode 1a D - mode 1b
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 8 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 package outline (1) matt tin, lead free (green) 1 - nc 9 - vg1_disable 17 - nc units : mm 2 - nc 10 - vg2 18 - nc from the standard : jedec mo - 220 3 - rf_in 11 - vg2_bis 19 - nc (vggd) 4 - gnd (2) 12 - vg2_disable 20 - nc 25 - gnd 5 - gnd (2) 13 - vdd1 21 - nc 6 - v_ctrl 14 - vdd2 22 - nc 7 - vg1 15 - gnd (2) 23 - nc 8 - vg1_bis 16 - rf_out 24 - nc (1) the package outline drawing included to this data - sheet is given for indication. refer to the applicati on note an0017 ( http://www.ums - gaas.com ) for exact package dimensions. (2) it is strongly recommended to ground all pins marked gnd through the pcb board. units : mm from the standard : jedec mo-220 [vggd] matt tin, lead free (green) 1- 2- 3- 4- 5- 6- 7- 8- 9- 11- 12- 13- 14- 15- 16- 17- 18- 20- 21- 22- 23- 24- 25- 10- 19- nc nc rf in gnd g c g1 g1b e1 g2 g2b e2 d1 d2 gnd rf out nc nc nc nc nc nc nc nc gnd exposed pad
l - band low noise amplifier cha3801 - qdg ref. : dscha3801 - qdg3119 - 29 apr 13 9 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - f rance tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 evaluation mother board based on typically ro4003 / 8 mils or equivalent. decoupling capacitors of 100pf are recommended for all dc access. v_ctrl vg1 vg1_bis vg1_disable vg2 vg2_bis vg2_disable vdd1 vdd2 100pf 100pf 100pf
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 10 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 block diagram block diagram of the lna v_ctrl vg1 vg1_disable vg2_disable vg1_bis vg2 vg2_bis vdd1 vdd2 rf_in rf_out stage 1 stage 2 protection circuit active biasing circuit
l - band low noise amplifier cha3801 - qdg ref. : dscha3801 - qdg3119 - 29 apr 13 11 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - f rance tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 note
cha3801 - qdg l - band low noise amplifier ref. : dscha3801 - qdg3119 - 29 apr 13 12 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended package footprint refer to the application note an0017 available at http://www.ums - gaas.com for package foot print recommendations. smd mounting procedure for the mounting process standard techni ques involving solder paste and a suitable reflow process can be used. for further details, see application note an0017. recommended environmental management refer to the application note an0019 available at http: //www.ums - gaas.com for environmental data on ums package products. recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommenda tions for the ums package products. ordering information qfn 4x4 rohs compliant package: cha3801 - qdg /xy stick: xy = 20 tape & reel: xy = 21 information furnished is believe d to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all inf ormation previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.


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