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for further information contact your local stmicroelectronics sales office. march 2012 doc id 022980 rev 1 1/11 11 EVAL6472H fully integrated stepper motor driver based on the l6472 data brief features voltage range from 8 v to 45 v phase current up to 3 a r.m.s. spi with daisy chain feature sw input flag and busy led indicators adjustable supply voltage compensation suitable for use in combination with steval- pcc009v2 description the EVAL6472H demonstration board is a fully integrated microstepping motor driver. in combination with the steval-pcc009v2 communication board and the dspin evaluation software, the board allows the user to investigate all the features of the l6472 device. in particular, the board can be used to regulate the l6472 parameters in order to fit application requirements. the EVAL6472H supports the daisy chain configuration making it suitable for the evaluation of the l6472 in the multi-motor applications. EVAL6472H www.st.com
board description EVAL6472H 2/11 doc id 022980 rev 1 1 board description figure 1. jumpers and connectors location table 1. EVAL6472H specifications parameter value supply voltage (vs) 8 to 45 v maximum output current (each phase) 3 a r.m.s. logic supply voltage (vreg) externally supplied: 3.3 v internally supplied: 3 v typical logic interface voltage (vdd) externally supplied: 3.3 v or 5 v internally supplied: vreg low level logic input voltage 0 v high level logic input voltage vdd (1) 1. all logic inputs are 5 v tolerant. operating temperature -25 to +125 c l6472h thermal resistance junction-to-ambient 21 c/w typical ph as e a connector power su pply connector ( 8 v - 45 v) m as ter s pi connector bu s y led (am b er) flag led (red) motor su pply volt a ge compen sa tion p a rtitioning reg u l a tion (adcin inp u t) extern a l s witch connector ( s w inp u t) jp1: vdd su pply from m as ter s pi connector jp2: vdd to vreg connection o s cin/o s cout connector jp 3 : d a i s y ch a in termin a tion ph as e b connector s l a ve s pi connector applic a tion reference a re a am102 8 9v1
EVAL6472H board description doc id 022980 rev 1 3/11 table 2. jumpers and connectors description name type function m1 power supply motor supply voltage m2 power output bridge a outputs m3 power output bridge b outputs cn1 spi connector master spi cn2 spi connector slave spi cn3 nm connector oscin and oscout pins cn4 nm connector external switch input tp1 (vs) test point motor supply voltage test point tp2 (vdd) test point logic interface supply voltage test point tp3 (vreg) test point logic supply voltage/l6470 internal regulator test point tp5 (gnd) test point ground test point tp6 (gnd) test point ground test point tp8 (stck) test point step clock input test point tp9 (stby/res) test point standby/reset input test point tp10 (flag) test point flag output test point tp11 (busy/sync) test point busy/sync output test point table 3. master spi connector pinout (j10) pin number type description 1 open drain output l6472 busy output 2 open drain output l6472 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi master in slave out signal (connected to l6472 sdo output through daisy chain termination jumper jp2) 6 digital input spi serial clock signal (connected to l6472 ck input) 7 digital input spi master out slave in signal (connected to l6472 sdi input) 8 digital input spi slave select signal (connected to l6472 cs input) 9 digital input l6472 step-clock input 10 digital input l6472 standby/reset input
board description EVAL6472H 4/11 doc id 022980 rev 1 table 4. slave spi connector pinout (j11) pin number type description 1 open drain output l6472 busy output 2 open drain output l6472 flag output 3 ground ground 4 supply ext_vdd (can be used as external logic power supply) 5 digital output spi master in slave out signal (connected to pin 5 of j10) 6 digital input spi serial clock signal (connected to l6472 ck input) 7 digital input spi master out slave in signal (connected to l6472 sdo output) 8 digital input spi slave select signal (connected to l6472 cs input) 9 digital input l6472 step-clock input 10 digital input l6472 standby/reset input
EVAL6472H board description doc id 022980 rev 1 5/11 figure 2. EVAL6472H schematic 1a 2a sw 1b 2b oscin oscout applic a tion reference v s gnd option s e r / y b t s k c t s t u o _ i p s n i _ i p s y s u b g a l f gnd vdd vreg v s sw miso sdi ck ncs flag busy stck stby_reset miso sdo ck ncs flag busy sdo miso busy sdi ck ncs sw adcin sdo busy flag flag stby_reset stck stck stby_reset vs vs ext_vdd ext_vdd ext_vdd vdd vreg vreg vdd vreg vdd vs vdd vdd vdd vs vs j6 morsv-508-2p 1 2 j4 nm 1 2 c10 100pf/6v3 j2 1 2 3 4 5 6 7 8 9 10 j1 morsv-508-2p 1 2 tp1 1 dl2 yellow 2 1 c6 10nf/50v d1 bav99 1 2 3 jp3 dl1 red 2 1 c1 220nf/16v c15 100nf/50v r9 470 c12 100pf/6v3 tp7 1 tp8 1 c14 10nf/6v3 u1 l6472 vdd 17 vreg 6 oscin 7 oscout 8 cp 10 vboot 11 adcin 5 vsa 2 vsa 26 vsb 12 vsb 16 pgnd 13 pgnd 27 out1a 1 out2a 28 out1b 14 out2b 15 agnd 9 sw 4 dgnd 21 busy_sync 22 flag 24 sdo 18 sdi 20 ck 19 cs 23 stby_res 3 stck 25 epad 29 tp4 1 c4 100nf/6v3 + c5 47uf/6v3 c8 100nf/50v r8 100 r2 200k 1 3 2 + c3 10uf/6v3 r1 31k6 r5 39k r7 470 + c9a 100uf/63v j5 morsv-508-2p 1 2 tp3 1 c13 3.3nf/6v3 d2 bzx585-b3v6 tp5 1 c7 100nf/50v r6 39k tp6 1 j3 1 2 3 4 5 6 7 8 9 10 c16 100nf/50v c11 100pf/6v3 jp2 tp2 1 c2 100nf/6v3 r4 39k j7 nm 1 2 r3 8k2 + c9 100uf/63v jp1 am10295v1
board description EVAL6472H 6/11 doc id 022980 rev 1 table 5. bill of material index quantity reference value package 1 1 c1 220 nf/16 v capc-0603 2 2 c2,c4 100 nf/6v3 capc-0603 3 1 c3 10 f/6v3 capc-3216 4 1 c5 47 f/6v3 capc-3216 5 1 c6 10 nf/50 v capc-0603 6 4 c7, c8, c15, c16 100 nf/50 v capc-0603 7 1 c9a 100 f/6v3 (option) cape-r10hxx-p5 8 1 c9 100 f/6v3 capes-r10hxx 9 3 c10, c11, c12 100 pf/6v3 capc-0603 10 1 c13 3.3 nf/6v3 capc-0603 11 1 c14 10 nf/6v3 capc-0603 12 1 dl1 led diode (red) ledc-0805 13 1 dl2 led diode (amber) ledc-0805 14 1 d1 bav99 sot23 15 1 d2 bzx585-b3v6 sod323 16 1 jp1 jumper - open jp2so 17 2 jp2, jp3 jumper - closed jp2so 18 3 j1, j5, j6 screw connector 2 poles morsv-508-2p 19 2 j2,j3 pol. idc male header vertical 10 poles con-flat-5x2-180m 20 2 j4, j7 nm strip254p-m-2 21 1 r1 31.6 k resc-0603 22 1 r2 200 k trimm-100x50x110-64w 23 1 r3 8.2 k resc-0603 24 3 r4, r5, r6 39 k resc-0603 25 2 r7, r9 470 resc-0603 26 1 r8 100 resc-0603 27 7 tp1, tp2, tp3, tp4, tp5, tp7, tp8 tpth-ring-1 mm red th 28 1 tp6 tpth-ring-1 mm black th 29 1 u1 l6472 htssop28
EVAL6472H board description doc id 022980 rev 1 7/11 figure 3. EVAL6472H - silkscreen figure 4. EVAL6472H - layout (top layer) am10290v2 am10290v1
board description EVAL6472H 8/11 doc id 022980 rev 1 figure 5. EVAL6472H - layout (inner layer2) figure 6. EVAL6472H - layout (inner layer3) am10291v1 am10292v1
EVAL6472H board description doc id 022980 rev 1 9/11 figure 7. EVAL6472H - layout (bottom layer3) 1.1 thermal data figure 8. thermal impedance graph am1029 3 v1 1 10 100 1000 time ( s ec) 0 5 10 15 20 25 zth (c/w) am10294v1
revision history EVAL6472H 10/11 doc id 022980 rev 1 2 revision history table 6. document revision history date revision changes 21-mar-2012 1 initial release.
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