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  pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 1 features ? lowest-power, smallest programmable pll ? very low jitter and phase noise ? output frequency up to: o 110mhz @ 1.8v operation o 166mhz @ 2.5v operation o 200mhz @ 3.3v operation ? input frequency: o fundamental crystal: 10mhz to 50mhz o reference clock: 1mhz to 200mhz ? accepts >0.1v reference signal input voltage ? one i/o pin can be configured as output enable (oe) , frequency switching (fsel), power down (pdb) input, or clk1 output. ? <10a current consumption with pdb active. ? single 1.8v to 3.3v, 10% power supply ? operating temperature range from -40 ? c to 85 ? c ? available in 6-pin dfn and sot23 green/rohs compliant packages. description the pl611s-02 is a low-power, small form factor, high performance otp-base programmable frequency synthesizer and a member of micrels picopll factory programmable quick turn clocks. designed to fit in a small dfn or sot23 package for a broad range of applications, the pl611s-02 offers the best phase noise and jitter performance, and power consumption of its rivals. . in addition, o ne programmable i/o pin can be configured as output enable (oe), frequency switching (fsel), power down (pdb) input, or clk1 (f out , f ref , f ref /2) output. the power down feature of pl611s-02, when activated, allows the ic to consume less than 10a of power, while its programming flexibility allows generating any output, up to 200mhz using a low-cost crystal or reference input. package pin configuration block diagram phase detector charge pump loop filter vco xin/fin xout r-counter (8-bit) f vco = f ref * (2 * m/r) f out = f vco / (2 * p) clk0 f ref oe, pdb, fsel, clk1 xtal osc m-counter (11-bit) programmable cload programmable function p-counter (5-bit) 2 1, 2 programming logic 1 2 3 4 5 6 oe, pdb, fsel, clk1 gnd xin, fin vdd xout clk0 d f n - 6 l ( 2 . 0 x 1 . 3 x 0 . 6 m m ) s o t 2 3 - 6 l ( 3 . 0 x 3 . 0 x 1 . 3 5 m m ) xin, fin gnd xout vdd clk0 oe, pdb, fsel, clk1 p l 6 1 1 s - 0 2 12 3 65 4 p l 6 1 1 s - 0 2 downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 2 key programming parameters clk[0:1] output frequency output drive strength programmable input/output f out = f ref * m / (r * p) where m = 11 bit r = 8 bit p = 5 bit clk0 = f out , f ref or f ref / (2*p) clk1 = f ref , f ref /2, clk0 or clk0/2 three optional drive strengths to choose from: ? low: 4ma ? std: 8ma (default) ? high: 16ma one output pin can be configured as: ? oe - input ? pdb - input ? fsel - input ? clk1 C output package pin assignment name pin assignment type description sot23 pin # dfn pin# oe, pdb, fsel, clk1 1 2 i/o this programmable i/o pin can be configured as an o utput enable (oe) input, power down input (pdb), on-the-fly freq uency switching selector (fsel), or clk1 clock output thi s pin has an internal 60k? pull up resistor for oe, pdb & fsel. state oe pdb fsel 0 tri-state clk power down mode bank 1 1 (default) normal mode normal mode bank 2 gnd 2 3 p gnd connection xin, fin 3 1 i crystal or reference clock input pin xout 4 6 o crystal output pin do not connect (dnc ) when fin is present vdd 5 5 p vdd connection clk0 6 4 o programmable clock output downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 3 functional description pl611s-02 is a highly featured, very flexible, adva nced programmable pll design for high performance, low -power, small form-factor applications. the pl611s-02 acce pts a fundamental input crystal of 10mhz to 50mhz o r reference clock input of 1mhz to 200mhz and is capa ble of producing two outputs up to 200mhz. this fl exible design allows the pl611s-02 to deliver any pll gene rated frequency, f ref (crystal or ref clk) frequency or f ref /(2*p) to clk0 and/or clk1. some of the design fe atures of the pl611s-02 are mentioned below: pll programming the pll in the pl611s-02 is fully programmable. the pll is equipped with an 8-bit input frequency divider (r-counter), and an 11-bit vco frequency feedback loop divider (m-counter). the output of the pll is transferred to a 5-bit post vco divider (p- counter). the output frequency is determined by th e following formula [f out = f ref * m / (r * p) ]. clock output (clk0) clk0 is the main clock output. the output of clk0 can be configured as the pll output (f vco /(2*p)), f ref (crystal or ref clk) output, or f ref /(2*p) output. the output drive level can be programmed to low drive (4ma), standard drive (8ma) or high drive (16ma). the maximum output frequency is determined by the power supply voltage; 200mhz at 3.3v, 166mhz at 2.5v and 110mhz at 1.8v. clock output (clk1) the clk1 feature allows the pl611s-02 to have an additional clock output programmed to one of the following: f ref - reference (crystal or ref clk) frequency f ref / 2 clk0 clk0 / 2 maximum vco frequency: for the best performance, we recommend to use the highest vco frequency allowed at the power supply voltage where the pl611s-02 will be used. it is actually the maximum vco frequency that determines the maximum output frequency. when a pl611s-02 is programmed for use at a certain power supply voltage, it is safe to use that part at higher volt ages also because at higher voltages the maximum vco frequency is also higher. the other way around, using the part at a lower voltage than what it was originally configured for, is not safe. output enable (oe) the output enable feature allows the user to enable and disable the clock output(s) by toggling the oe pin. the oe pin incorporates a 60k? pull up resistor giving a default condition of logic 1. power-down control (pdb) the power down (pdb) feature allows the user to put the pl611s-02 into sleep mode. when activated (logic 0), pdb disables the pll, the oscillator circuitry, counters, and all other activ e circuitry. in power down mode the ic consumes <10a of power. the pdb pin incorporates a 60k? pull up resistor giving a default condition of logi c 1 . frequency select (fsel) the frequency select (fsel) feature allows the pl611s-02 to switch between two pre-programmed outputs allowing the device on the fly frequency switching. the fsel pin incorporates a 60k? pull up resistor giving a default condition of logic 1 . downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 4 electrical specifications absolute maximum ratings parameters symbol min max units supply voltage range v dd -0.5 7 v input voltage range v i -0.5 v dd +0.5 v output voltage range v o -0.5 v dd +0.5 v soldering temperature (green package) 260 ? c data retention @ 85 ? c 10 year storage temperature t s -65 150 ? c ambient operating temperature* -40 85 ? c exposure of the device under conditions beyond the limits specified by maximum ratings for extended pe riods may cause permanent damage to the device and affect product reliability. these conditions r epresent a stress rating only, and functional opera tions of the device at these or any other condition s above the operational limits noted in this specification is not implied. *operating temperature is guarante ed by design. parts are tested to commercial grade only. dc specifications parameters symbol conditions min typ max units supply current, dynamic i dd v dd =3.3v,30mhz, load=15pf 6.0 ma supply current, dynamic i dd v dd =2.5v,30mhz, load=15pf 3.9 ma supply current, dynamic i dd v dd =1.8v,30mhz, load=15pf 2.1 ma pll off: supply current, dynamic i dd v dd =3.3v,30mhz, load=15pf 2.0 ma pll off: supply current, dynamic i dd v dd =2.5v,30mhz, load=15pf 1.6 ma pll off: supply current, dynamic i dd v dd =1.8v,30mhz, load=5pf 0.8 ma supply current, dynamic i dd when pdb=0 <10 a operating voltage v dd 1.62 3.63 v power supply ramp t pu time for v dd to reach 90% v dd . power ramp must be monotonic. .001 100 ms output low voltage v ol i ol = +4ma standard drive 0.4 v output high voltage v oh i oh = -4ma standard drive v dd C 0.4 v output current, low drive i o sd v ol = 0.4v, v oh = 2.4v 4 ma output current, standard drive i o sd v ol = 0.4v, v oh = 2.4v 8 ma output current, high drive i o hd v ol = 0.4v, v oh = 2.4v 16 ma downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 5 ac specifications parameters conditions min typ max units crystal input frequency (xin) fundamental crystal 10 50 mhz input (fin) frequency @ v dd =3.3v 1 200 mhz @ v dd =2.5v 166 @ v dd =1.8v 110 input (fin) signal amplitude internally ac coupled (high frequency) 0.9 v dd vpp input (fin) signal amplitude internally ac coupled (low frequency) 3.3v <50mhz, 2.5v <40mhz, 1.8v <15mhz 0.1 v dd vpp output frequency @ v dd =3.3v 200 mhz @ v dd =2.5v 166 mhz @ v dd =1.8v 110 mhz settling time at power-up (after v dd increases over 1.62v) 2 ms output enable time oe function; ta=25 o c, 15pf load . add one clock period to this measurement for a usable clock output. 10 ns pdb function; ta=25o c, 15pf load 2 ms vdd sensitivity frequency vs. v dd +/-10% -2 2 ppm output rise time 15pf load, 10/90% v dd , high drive, 3.3v 1.2 1.7 ns output fall time 15pf load, 90/10% v dd , high drive, 3.3v 1.2 1.7 ns duty cycle (see mtc-1) @2.5v and 3.3v over entire frequency range, v dd /2 45 50 55 % @1.8v, < 75mhz f out , v dd /2 45 50 55 @1.8v, 75mhz < f out <110mhz 40 60 period jitter, pk - to - pk * (10,000 samples measured) with capacitive decoupling between v dd and gnd 70 ps * note: jitter performance depends on the programmi ng parameters. downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 6 crystal specifications parameters symbol min typ max units fundamental crystal resonator frequency f xin 10 50 mhz crystal loading rating (the ic can be programmed for any value in this ran ge) c l (xtal) 8 12 pf maximum sustainable drive level 100 ? w operating drive level 30 ? w metal can crystal shunt capacitance c0 5.5 pf esr max esr 50 ? small smd crystal shunt capacitance c0 2.5 pf esr max esr 80 ? layout recommendations the following guidelines are to assist you with a p erformance optimized pcb design: signal integrity and termination considerations - keep traces short! - trace = inductor. with a capacitive load this equals ringing! - long trace = transmission line. without proper termination this will cause reflections (looks like ringing). - design long traces ( > 1 inch ) as striplines o r microstrips with defined impedance. - match trace at one side to avoid reflections bouncing back and forth. decoupling and power supply considerations - place decoupling capacitors as close as possible to the vdd pin(s) to limit noise from the power supply - multiple vdd pins should be decoupled separately for best performance. - addition of a ferrite bead in series with vdd can help prevent noise from other board sources - value of decoupling capacitor is frequency dependant. typical values to use are 0.1 ? f for designs using frequencies < 50mhz and 0.01 ? f for designs using frequencies > 50mhz. crystal tuning circuit series and parallel capacitors used to fine tune t he crystal load to the circuit load. cst C series capacitor, used to lower circuit load to m atch crystal load. raises frequency offset. this can be eliminated by using a crystal with a cl oad of equal or greater value than the oscillator. cpt C parallel capacitors, used to raise the circuit lo ad to match the crystal load. lowers frequency offset. crystal xin 1 8 xout cpt cpt cst downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 7 d e bottom view d1 b e e1 l a3 a a1 pin 6 id chamfer pin1 dot top view package drawings (green package compliant) sot23-6 l dfn-6l symbol dimension in mm min. max. a 1.05 1.35 a1 0.05 0.15 a2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 d 2.80 3.00 e 1.50 1 . 70 h 2.60 3.0 l 0.35 0.55 e 0.95 bsc symbol dimension in mm min. max. a 0.50 0.60 a1 0.00 0.05 a3 0.152 0.152 b 0.15 0.25 e 0.40bsc d 1.25 1.35 e 1.95 2.05 d1 0.75 0.85 e1 0.95 1.05 l 0.20 0.30 c l a2 e h d a1 e b a pin1 dot downloaded from: http:///
pl611s-02 1.8v-3.3v picopll tm , worlds smallest programmable clock micrel inc. ? 218 0 for tu ne drive ? sa n jose, ca 951 31 ? usa ? tel +1(408)944- 080 0 ? fax +1(408)474 -100 0 ? www.micrel.com ? rev 07/09 /12 ? page 8 ordering information (green package compliant) for part ordering, please contact our sales departm ent: 2180 fortune drive, san jose, ca 95131 usa tel +1 (408) 944-1668 fax +1 (408) 474-1000 part number the order number for this device is a combination o f the following: part number, package type and operating temperature range * phaselink will assign a unique 3-digit id code fo r each approved programmed part number. part/order number marking ? package option pl611s-02-xxxgc-r xxx lll 6-pin dfn (tape and reel) pl611s-02-xxxtc-r 02 xxx lll 6-pin sot23 (tape and reel) * no te: ll l and lllll designa tes lo t numbe r ? note: xxx designates marking identifier that, a t times, could be independent of the part number. please consult your micrel sales representative for marking information. micrel inc., reser ves the right to ma ke chang es in its products or spe cifica tions, or both a t any time witho ut notice . the in forma tion furnishe d by micre l is believed to be accurate an d r eliable. however , micrel ma ke s no guarantee or warra nty concer ning th e accuracy o f said information and shall not be resp on sible for any loss or dam age of whate ver natu re re sulting from the use o f, or reliance upon th is pr odu ct. life support policy : micre ls products are no t autho rized for use a s c r itica l components in life suppo rt devices or syste ms with ou t th e express written ap proval o f the president of micrel in c. solder reflow profile available at www.phaselink.com/qa/solderinggreen.pdf downloaded from: http:///


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