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features ? ? ? ? ? 12-bit resolution ? ? ? ? ? 8 or 20 microsecond conversion times ? ? ? ? ? 5 input voltage ranges ? ? ? ? ? internal high z input buffer ? ? ? ? ? short-cycle operation ? ? ? ? ? mil-std-883 models available general description the adc-hx and adc-hz series are self-contained, high- performance, 12-bit a/d converters manufactured with thick and thin-film hybrid technology. they use the successive approximation conversion technique to achieve a 12-bit conversion in 20 and 8 microseconds, respectively. five input voltage ranges are programmable by external pin connection. an internal buffer amplifier is also provided for applications in which 50 megohm input impedance is required. these converters utilize a fast 12-bit monolithic dac which includes a precision zener reference source. the circuit also contains a fast monolithic comparator, a monolithic 12-bit successive approximation register, a clock and a monolithic buffer amplifier. nonlinearity is specified at 1/2lsb maximum. both models have identical operation except for conversion speed. they can be short-cycled to give faster conversions in lower-resolution applications. use of the internal buffer amplifier increases conversion time by 3 microseconds, the settling time of the amplifier. output coding is complementary binary, complementary offset binary, or complementary two?s complement. serial data is also brought out. the package is a 32-pin ceramic tdip. models are available for use in either commercial (0 to +70c) or military (?55 to +125c) operating figure 1. functional block diagram temperature ranges. mil-std-883 and desc standard military drawing models are also available. pin function pin function 1 bit 12 (lsb) 32 serial data output 2 bit 11 31 ?15v power 3 bit 10 30 buffer input 4 bit 9 29 buffer output 5 bit 8 28 +15v power 6 bit 7 27 gain adjust 7 bit 6 26 analog common 8 bit 5 25 20v input range 9 bit 4 24 10v input range 10 bit 3 23 bipolar offset 11 bit 2 22 comparator input 12 bit 1 (msb) 21 start convert 13 bit 1 (msb) 20 e.o.c. (status) 14 short cycle 19 clock out 15 digital common 18 reference out 16 +5v power 17 clock rate precision ref (+6.3v) clock successive approximation register 12-bit dac comparator 6.3k 5k ref. out 18 +5v power 16 27 gain adjust 15 14 20 30 buffer input 29 23 bipolar offset 22 comparator input 24 25 26 32 serial data out 13 1 msb 12 1 msb 11 2 10 3 9 4 8 5 7 6 6 7 5 8 4 9 3 10 2 11 1 12 lsb. 21 19 17 clock rate parallel data out bit no. + 5k buffer output 10v input 20v input analog common buffer amplifier clock out start conv. digital common short cycle e.o.c. status C15v power 31 +15v power 28 adc-hx, adc-hz series adc-hx, adc-hz series adc-hx, adc-hz series adc-hx, adc-hz series adc-hx, adc-hz series 12-bit, 8 and 20sec analog-to-digital converters innovation and ex c ell e n c e ? ? 2-1 datel, inc. , 11 cabot boulevard, mansfield, ma 02048-1194 (u.s.a.) tel: 508-339-3000 fax: 508-339-6356 ? for immediate assistance 800 -233-2765 input/output connections
datel, inc. , 11 cabot boulevard, mansfield, ma 02048-1194 (u.s.a.) tel: 508-339-3000 fax: 508-339-6356 ? for immediate assistance 800 -233-2765 adc-hx, adc-hz ? ? technical notes 1. it is recommended that the 15v power input pins both be bypassed to ground with a 0.01f ceramic capacitor in parallel with a 1f electrolytic capacitor and the +5v power input pin be bypassed to ground with a 10f electrolytic capacitor as shown in the connection diagrams. in addition, gain adjust (pin 27) should be bypassed to ground with a 0.01f ceramic capacitor. these precautions will assure noise free operation of the converter. 2. digital common (pin 15) and analog common (pin 26) are not connected together internally, and therefore must be connected as directly as possible externally. it is recommended that a ground plane be run underneath the case between the two commons. analog ground and 15v power ground should be run to pin 26 whereas digital ground and +5v ground should be run to pin 15. 3. external adjustment of zero or offset and gain are made by using trimming potentiometers connected as shown in the connection diagrams. the potentiometer values can be between 10k and 100k ohms and should be 100ppm/c cermet types. the trimming pots should be located as close as possible to the converter to avoid noise pickup. in some cases, for example 8-bit short-cycled operation, external adjustment may not be necessary. 4. short-cycled operation results in shorter conversion times when the conversion is truncated to less than 12 bits. this is done by connecting short cycle (pin 14) to the output bit following the last bit desired. for example, for an 8-bit conversion, pin 14 is connected to the bit 9 output. maximum conversion times are given for short-cycled conversions of 8 or 10 bits. in these two cases, the clock rate is accelerated by connecting the clock rate adjust (pin 17) to +5v (10 bits) or +15v (8 bits). the clock rate should not be arbitrarily speeded up to exceed the maximum conversion rate at a given resolution, as missing codes will result. absolute maximum ratings parameters limits units +15v supply, pin 28 +18 volts ?15v supply, pin 31 C18 volts +5v supply, pin 16 +7 volts digital inputs, pins 14, 21 5.5 volts analog inputs, pins 24, 25 25 volts buffer input, pin 30 15 volts lead temperature (10 seconds) 300 c functional specifications (typical at +25c and 15v and +5v supplies unless otherwise noted) inputs adc-hx12b adc-hz12b analog input ranges unipolar 0 to +5v, 0 to +10v bipolar 2.5v, 5v, 10v input impedance 2.5k (0 to +5v, 2.5v) 5k (0 to +10v, 5v) 10k (10v) input impedance with buffer 50 megohms input bias current of buffer 125na typical, 250na max. start conversion +2v min. to +5.5v max. positive pulse with dur- ation of 100ns min. rise and fall times <30ns. logic "1" to "0" transition resets converter and initiates next conversion. loading: 2 ttl loads. performance resolution 12 bits nonlinearity 1/2lsb max. differential nonlinearity 3/4lsb max. accuracy error ? gain (before adjustment) 0.2% zero, unipolar (before adj.) 0.1% of fsr ? offset, bipolar (before adj.) 0.2% of fsr ? temperature coefficient gain 20ppm/c max. zero, unipolar 5ppm/c of fsr max. ? offset, bipolar 10ppm/c of fsr max. ? diff. nonlinearity tempco 2ppm/c of fsr max. ? no missing codes over opererating temperature range conversion time ? 12 bits 20s max. 8s max. 10 bits ? 15s max. 6s max. 8 bits ? 10s max. 4s max. buffer settling time (10v step) 3s to 0.01% power supply rejection 0.004%/% supply max. outputs ? parallel output data 12 parallel lines of data held until next conversion command. v out ("0") +0.4v v out ("1") +2.4v unipolar coding complementary binary bipolar coding complementary offset binary complementary twos complement serial output data nrz successive decision pulses out, msb first. compl. binary or compl. offset binary coding. end of conversion (status) conversion status signal. output is logic "1" during reset and conversion and logic "0" when conversion complete. clock output train of positive going +5v 100ns pulses. 600khz for adc-hx and 1.5mhz for adc-hz (pin 17 grounded). internal reference +6.3v reference tempco 20ppm/c max. external reference current 2.5ma max. power requirements power supply voltages +15v 0.5v at +20ma C15v 0.5v at C25ma +5v 0.25v at +85ma physical/environmental operating temp. range, case 0 to +70c or C55 to +125c storage temperature range C65 to +150c package type 32-pin ceramic tdip weight 0.5 ounces (14 grams) thermal impedance jc 6c/w ja 30c/w footnotes: ? adjustable to zero. ? fsr is full scale range and is 10v for 0 to +10v or 5v inputs and 20v for 10v input, etc. ? without buffer amplifier used. adc-hz may require external adjustment of clock rate. ? short cycled operation. ? all digital outputs can drive 2 ttl loads.
? ? adc-hx, adc-hz analog-to-digital converters 5. note that output coding is complementary coding. for unipolar operation it is complementary binary, and for bipolar operation it is complementary offset binary or complementary two?s complement. in cases in which bipolar coding of offset binary or two?s complement is required, this can be achieved by inverting the analog input to the converter (using an op amp connected for gain of ?1). the converter is then calibrated so that ?fs analog input gives an output code of 0000 0000 0000, and +fs ? 1lsb gives 1111 1111 1111. 6. these converters can be operated with an external clock. to accomplish this, a negative pulse train is applied to start convert (pin 21). the rate of the external clock must be lower than the rate of the internal clock as adjusted (see short cycle operation tables) for the converter resolution selected. the pulse width of the external clock should be between 100 and 300 nanoseconds. each n-bit conversion cycle requires a pulse train of n + 1 clock pulses for completion, e.g., an 8-bit conversion requires 9 clock pulses for completion. a continuous pulse train may be used for consecutive conversions, resulting in an n-bit conversion every n + 1 pulses, or the e.o.c. output may be used to gate a continuous pulse train for single conversions. 7. when the input buffer amplifier is used, a delay equal to its settling time must be allowed between the input level change, such as a multiplexer channel change, and the negative- going edge of the start convert pulse. if the buffer is not required, buffer input (pin 30) should be tied to analog common (pin 26). this prevents the unused amplifier from introducing noise into the converter. for applications not using the buffer, the converter must be driven from a source with an extremely low output impedance. coding table unipolar operation coding table bipolar operation comp. input range binary coding 0 to +10v 0 to +5v msb lsb +9.9976v +4.9988v 0000 0000 0000 +8.7500 +4.3750 0001 1111 1111 +7.5000 +3.7500 0011 1111 1111 +5.0000 +2.5000 0111 1111 1111 +2.5000 +1.2500 1011 1111 1111 +1.2500 +0.6250 1101 1111 1111 +0.0024 +0.0012 1111 1111 1110 0.0000 0.0000 1111 1111 1111 short cycle operation refer to technical note 4 for methods of reducing the adc-hx or adc-hz conversion times. comp. comp. two?s input voltage range offset binary complement 10v 5v 2.5v msb lsb msb lsb +9.9951v +4.9976v +2.4988v 0000 0000 0000 1000 0000 0000 +7.5000 +3.7500 +1.8750 0001 1111 1111 1001 1111 1111 +5.0000 +2.5000 +1.2500 0011 1111 1111 1011 1111 1111 0.0000 0.0000 0.0000 0111 1111 1111 1111 1111 1111 ?5.0000 ?2.5000 ?1.2500 1011 1111 1111 0011 1111 1111 ?7.5000 ?3.7500 ?1.8750 1101 1111 1111 0101 1111 1111 ?9.9951 ?4.9976 ?2.4988 1111 1111 1110 0111 1111 1110 ?10.0000 ?5.0000 ?2.5000 1111 1111 1111 0111 1111 1111 8, 10 & 12-bit conversion times resolution 12 bits 10 bits 8 bits adc-hx conversion time 20s 15s 10s adc-hz conversion time 8s 6s 4s connect these 17 & 15 17 & 16 17 & 28 pins together 14 & 16 14 & 2 14 & 4 pin 17 clock rate voltage adc-hx adc-hz 0v 600khz 1.5mhz +5v 720khz 1.8mhz +15v 880khz 2.2mhz clock rate vs. voltage pin 14 connection res. (bits) pin 14 to 1 pin 11 2 pin 10 3 pin 9 4 pin 8 5 pin 7 6 pin 6 res. (bits) pin 14 to 7 pin 5 8 pin 4 9 pin 3 10 pin 2 11 pin 1 12 pin 16 connections
datel, inc. , 11 cabot boulevard, mansfield, ma 02048-1194 (u.s.a.) tel: 508-339-3000 fax: 508-339-6356 ? for immediate assistance 800 -233-2765 adc-hx, adc-hz ? ? figure 2. bipolar operation, ?5 to +5v input connections without buffer with buffer input voltage input connect these input connect these range pin pins together pin pins together 0 to +5v 24 22 & 25 23 & 26 30 22 & 25 23 & 26 29 & 24 0 to +10v 24 ? 23 & 26 30 ? 23 & 26 29 & 24 2.5v 24 22& 25 23 & 22 30 22 & 25 23 & 22 29 & 24 5v 24 ? 23 & 22 30 ? 23 & 22 29 & 24 10v 25 ? 23 & 22 30 ? 23 & 22 29 & 25 figure 3. unipolar operation, 0 to +10v connections and calibration 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 start convert in 2.2m +5v C15v +5v common 0.01f caps are ceramic types data outputs 1f cap 0.01 f 10f 0.01f 2.8m 0.01 f 15v 10k to 100k analog input (0 to +10v) 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 10k to 100k +15v + + + offset adjust gain adjust
common 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 start convert in
2.2m +5v C15v +5v common 0.01f caps are ceramic types data outputs 1f cap 0.01 f 10f 0.01f 2.8m 0.01 f 15v common 10k to 100k analog input (C5 to +5v) 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 10k to 100k +15v + + + zero adjust gain adjust
? ? adc-hx, adc-hz analog-to-digital converters calibration procedure 1. connect the converter for bipolar or unipolar operation. use the input connection table for the desired input voltage range and input impedance. apply start convert pulses of 100 nanoseconds minimum duration to pin 21. the spacing of the pulses should be no less than the maximum conversion time. 2. zero and offset adjustments apply a precision voltage reference source between the selected analog input and ground. adjust the output of the reference source to the value shown in the calibration table for the unipolar zero adjustment (zero + 1/2lsb) or the bipolar offset adjustment (?fs + 1/2lsb). adjust the trimming potentiometer so that the output code flickers equally between 1111 1111 1111 and 1111 1111 1110. 3. full scale adjustment change the output of the precision voltage reference source to the value shown in the calibration table for the unipolar calibration table range adjust. input voltage unipolar 0 to +5v zero +0.6mv gain +4.9982v 0 to +10v zero +1.2mv gain +9.9963v bipolar 2.5v offset ?2.4994v gain +2.4982v 5v offset ?4.9988v gain +4.9963v 10v offset ?9.9976v gain +9.9927v or bipolar gain adjustment (+fs ? 1.5lsb). adjust the gain trimming potentiometer so that the output code flickers equally between 0000 0000 0001 and 0000 0000 0000. timing diagram for adc-hx, adc-hz output: 101010101010 adc-hx adc-hz t 1 20s 8s t 2 1.56s 0.56s timing diagram operating periods 1 2 3 4 5 6 7 8 9 10 11 12 13 start convert e.o.c. (status) clock out serial data out bit 1 (msb) bit 2 bit 4 bit 12 (lsb) t1 t2 100ns min. 60ns 40ns 100ns 40ns 40ns bit 1 (msb) bit 3 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 11 bit 12 (lsb) 50ns parallel data now valid 1 bit 2 bit 3 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1
datel, inc. , 11 cabot boulevard, mansfield, ma 02048-1194 (u.s.a.) tel: 508-339-3000 fax: 508-339-6356 ? for immediate assistance 800 -233-2765 adc-hx, adc-hz ? ? mechanical dimensions inches (mm) ordering information model temp. range adc-hx12bgc 0 to +70c adc-hx12bmc 0 to +70c adc-hx12bmm ?55 to +125c adc-hx12bmm-ql ?55 to +125c adc-hx/883 ?55 to +125c adc-hz12bgc 0 to +70c adc-hz12bmc 0 to +70c adc-hz12bmm ?55 to +125c adc-hz12bmm-ql ?55 to +125c adc-hz/883 ?55 to +125c mil-std-883b units are available under desc drawing number 5962-88508. contact datel for 883 product specification. 0.040 (1.016) seating plane 0.025 (0.635) 0.200 max. (5.080) 0.235 max. (5.969) 0.190 max. (4.826) 0.900 0.010 (22.860) 1.11 max. (28.19) 0.100 typ. (2.540) 1.72 max. (43.69) 1 16 17 32 1.500 (38.100) 0.100 (2.540) 0.100 (2.540)
0.018 0.002 (0.457) 0.010 0.002 (0.254)

(unless otherwise indicated): 2 place decimal (.xx) 0.010 (0.254) 3 place decimal (.xxx) 0.005 (0.127)

kovar alloy

50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating

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