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lt 4321 1 4321f for more information www.linear.com/lt4321 typical application features description poe ideal diode bridge controller the lt ? 4321 is a dual ideal diode bridge controller that enables a power over ethernet ( poe) powered device (pd) to receive power in either voltage polarity from rj-45 data pairs, spare pairs, or both . the lt4321 and eight n-channel mosfets replace the eight diodes in a passive poe rectifier bridge. the lt4321 eases thermal design and increases delivered power. an internal charge pump allows an all-nmos bridge eliminating larger and more costly pmos switches. the lt4321 works with 2- pair and 4- pair applications. high impedance input sense pins prevent reverse current on unused pairs . if the power source fails or is shorted, a fast turn-off minimizes reverse current transients . unlike discrete ideal bridge solutions, the lt4321 will operate through transients without enabling the mosfets on unpowered pairs. powered device for poe (to 13w), poe + (to 25.5w), or linear ltpoe ++ (to 90w) systems applications l , lt , lt c , lt m , linear technology and the linear logo are registered trademarks and powerpath and ltpoe ++ are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. n reduces heat, eliminates thermal design problems n maximizes power efficiency n less than 800a quiescent operating current n fully compatible with ieee 802.3 detection and classification n ieee 802.3 compliant when paired with a powered device (pd) controller n works with 2-pair and 4-pair poe applications n compatible with poe, poe + , and ltpoe ++ ? n 100 v absolute maximum voltage n h-grade version operates up to 125c n 16- lead 4mm 4mm qfn package n poe/poe + / ltpoe ++ powered devices n dc polarity correction and ideal diode-oring of telecom supplies 4321 ta01 lt4321 tg36 bg12 bg36 in36in45 in78 in12 data pairs 12 3 6 4 5 8 7 spare pairs outn en outp vport pwrgd hsgate lt4275 gnd en tg12 bg78 tg45 tg78 bg45 hssrc 10f isolated power supply gnd run v out v in 0.1f smaj60a ? + + downloaded from: http:///
lt 4321 2 4321f for more information www.linear.com/lt4321 pin configuration absolute maximum ratings outp - outn ............................................. C0.3 v to 100 v in 12, in 36, in 45, in 78 ....................... C2v to outp + 2v bg 12, bg 36, bg 45, bg 78 voltages .......... C0.3 v to 100 v tg 12, tg 36, tg 45, tg 78 voltages ....................................... C0.3 v to outp + 12 v tg 12- in 12 voltage ...................................... C0.3 v to 12 v tg 36- in 36 voltage ..................................... C0.3 v to 12 v tg 45- in 45 voltage ..................................... C0.3 v to 12 v tg 78- in 78 voltage ...................................... C0.3 v to 12 v en , en , ..................................................... C0.3 v to 100 v operating ambient temperature range lt 4321 i ................................................ C40 c to 85 c lt 4321 h ............................................. C40 c to 125 c storage temperature range .................. C65 c to 150 c (notes 1, 2) 16 15 14 13 5 6 7 8 top view 17 outn uf package 16-lead (4mm 4mm) plastic qfn 9 10 11 12 4 3 2 1 tg36 in36in45 tg45 outp enen outn tg12in12 bg12 bg36 tg78 in78 bg78bg45 t jmax = 125c, jc = 4.5c/w exposed pad (pin 17) is outn, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt4321iuf#pbf lt4321iuf#trpbf 4321 16-lead 4mm 4mm plastic qfn C40c to 85c lt4321huf#pbf lt4321huf#trpbf 4321 16-lead 4mm 4mm plastic qfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container . consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
lt 4321 3 4321f for more information www.linear.com/lt4321 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. symbol parameter conditions min typ max units operating supply range |in12-in36|, |in45-in78|, outp l 20 80 v v uvlo undervoltage lockout outp-outn l 15 17 18 v i s (det) total supply current in detect region outp < 10v l 0.8 5 a i s (off) total supply current in shutdown outp > 12v, en < v il and en > v ih l 32 60 a i s (on) total operating supply current en > v ih or en < v il , outp > 20v l 0.5 0.8 ma top gate drive inn = outp + ?v sd(max) + 5mv, 10a out of tgn (note 3) l 7.7 9.5 11 v v bg bottom gate drive 10a out of bgn (note 3) l 10 11.5 13 v top gate pull-up current tgn = inn (note 3) l 50 120 250 a top gate pull-down current inn = outp C 0.25v; tgn C inn = 5v l 1.25 ma bottom gate pull-up current bgn < v bg (note 3) l 15 30 45 a bottom gate pull-down current bgn = 5v l 3 ma en pull-up resistance (active low) outp = 55v l 160 250 310 k en pull-down resistance (active high) outp = 55v l 160 250 310 k v ih digital input high en, en l 2.6 v v il digital input low en, en l 0.5 v v enoc en open circuit voltage outp = 55v l 2 2.5 3 v ?v sd topside forward regulation voltage inn - outp l 2 10 18 mv bottom comparator turn-on threshold inn - outn l C30 C15 0 mv bottom comparator turn-off threshold inn - outn l 2 15 30 mv the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, outp = 20v to 80v unless otherwise noted. note 2: referenced with respect to outn unless otherwise specified. note 3: all conditions for external mosfet turn on must be met. see table 1 and table 2. downloaded from: http:///
lt 4321 4 4321f for more information www.linear.com/lt4321 typical performance characteristics input pin current en open circuit voltage bgn pull-down strength bgn pull-up strength tg pull-down strength tg pull-up strength total supply current in shutdown total supply current in ideal bridge mode, 2-pair total supply current in ideal bridge mode, 4-pair v in (v) 0 current (a) 0 10 15 20 40 25 20 40 50 4321 g01 5 30 35 10 30 60 70 80 C40c25c 100c 125c in12 = in45 = v in in36 = in78 = 0v v in (v) 0 current (a) 0 200 300 400 700 500 20 40 50 4321 g03 100 600 10 30 60 70 80 C40c25c 100c 125c in12 = in45 = v in in36 = in78 = 0en = en = 0 outp (v) 0 v enoc (v) 0 1.51.0 2.00.5 3.0 2.5 20 30 40 10 4321 g05 60 50 70 80 C40c25c 100c 125c v in (v) 0 current (a) 0 200 300 400 700 500 20 40 50 4321 g02 100 600 10 30 60 70 80 C40c25c 100c 125c in12 = v in in36 = 0float in45, in78 en = en = 0 v bgn (v) 0 i bgn (ma) 0 12 6 8 1410 42 1816 4 6 2 4321 g06 8 10 12 ?v tgate (v) 0 i tg12 (ma) 0 2.51.5 2.01.0 0.5 3.53.0 6 2 4 4321 g08 8 10 outp = 20voutp = 80v in45 = in78 = floaten = outp in12 = outp C250mv in36 = outn C50mv v bgn (v) 0 i bgn (ma) 0 2515 2010 5 3530 4 6 2 4321 g07 8 10 12 inn (v) 0 current (a) C1.0 0.0 C0.5 1.00.5 20 4321 g04 40 60 80 C40c25c 100c 125c outp = 80v ?v tgate (v) 0 i tg12 (a) 0 140100 120 8060 40 20 180160 6 2 4 4321 g09 8 10 in12 C in36 = 20vin12 C in36 = 30v in12 C in36 = 80v in45 = in78 = floaten = outp downloaded from: http:///
lt 4321 5 4321f for more information www.linear.com/lt4321 pin functions in12: data pair input 1. in a poe system, in12 connects to the center tap of the transformer connected to pins 1 and 2 on an rj45 connector.in36: data pair input 2. in a poe system, in36 connects to the center tap of the transformer connected to pins 3 and 6 on an rj45 connector. in45: spare pair input 1. in a poe system, in45 connects to the center tap of the transformer connected to pins 4 and 5 on an rj45 connector.in78: spare pair input 2. in a poe system, in78 connects to the center tap of the transformer connected to pins 7 and 8 on an rj45 connector.tg12: top -side gate driver output . tg12 pin pulls high with respect to in12 when in12 is greater than outp and in36 is less than outn.tg36: top -side gate driver output . tg36 pin pulls high with respect to in36 when in36 is greater than outp and in12 is less than outn.tg45: top -side gate driver output . tg45 pin pulls high with respect to in45 when in45 is greater than outp and in78 is less than outn.tg78: top -side gate driver output . tg78 pin pulls high with respect to in78 when in78 is greater than outp and in45 is less than outn.bg12: bottom-side gate driver output . bg12 pin pulls high with respect to outn when in36 is greater than outp and in12 is less than outn. bg36: bottom-side gate driver output . bg36 pin pulls high with respect to outn when in12 is greater than outp and in36 is less than outn.bg45: bottom-side gate driver output . bg45 pin pulls high with respect to outn when in78 is greater than outp and in45 is less than outn.bg78: bottom-side gate driver output . bg78 pin pulls high with respect to outn when in45 is greater than outp and in78 is less than outn.en : enable, active low . pull down to outn to enable ideal diode bridge mode . en is internally pulled up to v enoc . tie to outp if the application circuit uses the en pin to enable ideal bridge mode. en: enable, active high . pull up to enable ideal diode bridge mode . en is internally pulled down to outn. tie to outn if the application circuit uses the en pin to enable ideal bridge mode. outp: positive output voltage . outp is the rectified voltage from which the lt4321 draws power. outn: negative output voltage . outn is the negative rectified voltage.exposed pad : the exposed pad must be electrically connected to the outn pin. downloaded from: http:///
lt 4321 6 4321f for more information www.linear.com/lt4321 overview the lt4321 is a dual ideal diode bridge controller designed to rectify two independent dc channels into a single output. the lt4321 senses the greater of the two input channels , | in12-in36| or | in45-in78|, and connects them to the output with the correct polarity. smooth crossover between channels is guaranteed by the enforced dropout voltage, ?v sd . a very common application is an ieee 802.3 powered device which is required to accept voltage in either polarity at its rj-45 input. polarity correction devices allow the pd to work equally well with standard or cross-over cables and endspan or midspan pses. they also prevent the pd from back feeding current into the ethernet cable. pd polarity correction is commonly done with a traditional diode bridge, but this results in an efficiency loss due to the forward drop generated across two conducting diodes . this voltage drop reduces the available supply voltage and dissipates significant power. the lt4321 uses actively driven mosfets to nearly elimi - nate the forward voltage drop. by maximizing available voltage and reducing power dissipation ( figure 1), the lt4321 simplifies pd design and reduces power supply cost. it can also eliminate thermal design problems, costly heat sinks, and reduce pc board area. some designs use ideal diode bridge circuits implemented with discrete components. these bridges often suffer from a trade-off between quiescent current and tolerance to transients and leakage. with quiescent current properly tuned for poe, stray pcb leakage between bridge compo - nents can be enough to cause accidental turn-on, latchup, and destruction of the circuit. the lt4321 offers significant improvements over discrete solutions. the integrated bridge controller allows for sophisticated sensing and control of the powerpath? mosfets, ensuring that mosfets that are supposed to be off, stay off. an ideal bridge controlled by the lt4321 is tolerant to hot-plugs, input short-circuits, common mode shift, and pcb leakage in the application circuit. applications information operating modes ideal diode bridge mode in ideal bridge mode the lt4321 saves power by activat - ing mosfets in place of power path diodes. the lt4321 enters ideal bridge mode when outp is greater than v uvlo and either en or en is asserted. when the lt4321 is enabled, it senses the inputs with respect to the output to decide which external mosfets to turn on. inputs are grouped into pairs, in12/in36 and in45/in78. within each pair, one input voltage must be greater than outp and one must be less than outn before the external mosfets related to that pair are enabled. for example, if in36 is greater than outp and in12 is less than outn, tg36 and bg12 will turn on. table 1 and table 2 outline the conditions that activate the ideal diode bridge. shutdown mode shutdown mode is intended to keep the lt4321 quiescent current from interfering with detection and classification in a poe system ( figure 2). the lt4321 is always in shutdown mode when outp < v uvlo . it can be held in shutdown mode over the full operating voltage range by deasserting both the en and en pins. figure 1. power dissipation vs load current current (ma) 0 power dissipation (w) 0 0.8 1.0 1.2 1.8 1.4 600 4321 f01 0.60.4 0.2 1.6 200 400 800 1000 in12 = 55vin36 = 0v in45 = float in78 = float lt4321 (50m fets)diodes (s2b) powersaved downloaded from: http:///
lt 4321 7 4321f for more information www.linear.com/lt4321 applications information shutting down the lt4321 does not disconnect the load. the external mosfets are shorted gate to source and bridge current is carried by the mosfets body diodes. the eight body diodes will act like two traditional diode bridges. at light load, the power dissipated in the forward drop of the body diodes will be less than the power dissipated by the lt4321 quiescent current. in applications with a low power sleep mode, the lt4321 can optionally be shut down to save power if the load current is less than 20 ma. external interface and component selection bypass capacitance a 0.1 f ceramic capacitor must be placed across the outp and outn pins. in pd applications, the ieee 802.3 standard limits the port capacitance at the pd interface ( c pd ) to 0.12 f. the lt4321 and the pd interface controller both need local bypass capacitance, but they can share the same 0.1 f capacitor. if the lt4321 and the pd interface controller cannot both be positioned next to a shared bypass capaci - tor, split the c pd capacitance between the two chips by placing a 0.047 f ceramic close to the lt4321 and another 0.047f ceramic close to the pd interface controller. a 10 f or greater capacitance must be connected across outp and outn pins when the lt4321 is enabled. in poe applications it is sufficient for the c port capacitor to be connected by the pd interface controllers hot swap fet. in non poe applications the c port capacitor may be permanently connected between outp and outn. figure 2. leakage current at 125c table 1. conditions for ideal bridge mode on in12/in36 poe mode outp en | en in12 in36 in45 in78 tg12 tg36 bg12 bg36 detect/class < v uvlo x x x x x off class/inrush > v uvlo o power on 1 > outp < outn x x on off off on < outn > outp off on on off |in12 C in36| outn off < outp table 2. conditions for ideal bridge mode on in45/in78 poe mode outp en | en in12 in36 in45 in78 tg45 tg78 bg45 bg78 detect/class < v uvlo x x x x x off class/inrush > v uvlo o power on 1 x x > outp < outn on off off on < outn > outp off on on off |in45 C in78| outn off < outp v in (v) 0 current (a) 0 150 200 300 15 4321 f02 100 50 250 5 10 20 25 lt4321 shutdown modeb2100 schottky bridge downloaded from: http:///
lt 4321 8 4321f for more information www.linear.com/lt4321 applications information transient voltage suppressor the lt4321 specifies an absolute maximum voltage of 100v and is designed to tolerate brief overvoltage events. however, pins that interface to ethernet cables or remote telecom supplies can routinely see excessive peak voltages . to protect the lt4321, install a unidirectional transient voltage suppressor ( tvs ) such as an smaj60a between outp and outn. this tvs must be mounted as close as possible to the lt4321. for extremely high cable discharge and surge protection contact linear technology applications. mosfet selection select external mosfets that have a drain-source break - down voltage higher than the maximum input voltage. for poe systems the drain-source breakdown should be at least 100 v. for all applications the gate threshold must be a minimum of 2v. the amount of power saved by the lt4321 depends on the channel resistance, r ds(on) , of the external mosfets. to maximize performance and power savings select r ds(on) such that the forward voltage drop, v f , is between 20 mv and 70mv. given the average output load current, i avg : r ds(on) = v f /i avg for example, a poe + class 4 pds maximum average cur- rent, i avg , is 600 ma. choosing a mosfet forward voltage drop of 40 mv reduces power consumption to 1/15 th that of a b2100 schottky diode bridge. r ds(on) = 40mv/600ma = 66m enable pins when outp is greater than v uvlo , the enable pins en and en will control whether the lt4321 is in shutdown mode or ideal bridge mode ( table 1 and table 2). en and en may be driven by a 3.3 v or 5 v logic signal, or with an open drain or collector.the en pin is pulled up to the internally generated voltage v enoc by an internal 250 k resistor. the en pin is pulled down to outn by an internal 250 k resistor. when outp is less than 12 v the enable pins are high impedance to prevent these resistors from corrupting poe detection. the enable pins tolerate 100 v ( absolute maximum) and may be tied directly to the outp or outn pins as needed. figure 3 and figure 4 show how to interface the enable pins to a pd interface controller. in these configurations, the lt4321 poe ideal bridge will be enabled after detec - tion and classification are complete and before the pd is consuming a significant amount of current. downloaded from: http:///
lt 4321 9 4321f for more information www.linear.com/lt4321 applications information figure 3. pd interface using the en pin figure 4. pd interface using the en pin 4321 f03 lt4321 outn en outp vport pwrgd hsgate lt4275 gnd en hssrc 10f isolated power supply gnd run v out v in 0.1f 100k ? + + 4321 f04 lt4321 outn v in en outp pwrgd v out pwrgd ltc4265 gnd en isolated power supply rtn run v out v in 0.1f 100k ? + 100k 10f + downloaded from: http:///
lt 4321 10 4321f for more information www.linear.com/lt4321 typical applications high efficiency 25w pd solution with 12vdc and 24 vac auxiliary input 4321 ta02 lt4321 tg36 bg12 psmn075-100mse 4 bsz110n06ns3 4 psmn075-100mse 4 wrth 749022017 bg36 in36in45 in78 in12 data pairs 12 3 6 4 5 8 7 spare pairs outn en outp smaj60a vport 158k 931k pwrgd aux ieeeuvlo rclass hsgate psmn075-100mse v aux 9v to 57vdc or 24vac mmsd4148 3 lt4275b gnd en tg12 bg78 tg45 tg78 bg45 hssrc isolated power supply gnd run v out v in 0.1f 150nf 680f ? + 34.8 3.3k bg1 bg2 in2 in1 tg1 tg2 outp outn lt4320 + 100k 1f 0.1f downloaded from: http:///
lt 4321 11 4321f for more information www.linear.com/lt4321 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 4.00 0.10 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (wggc) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1top mark (note 6) 0.55 0.20 16 15 12 bottom view?exposed pad 2.15 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.30 0.05 0.65 bsc 0.200 ref 0.00 ? 0.05 (uf16) qfn 10-04 recommended solder pad pitch and dimensions 0.72 0.05 0.30 0.05 0.65 bsc 2.15 0.05 (4 sides) 2.90 0.05 4.35 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 16-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1692 rev ?) downloaded from: http:///
lt 4321 12 4321f for more information www.linear.com/lt4321 ? linear technology corporation 2013 lt 0913 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt4321 related parts part number description comments ltc4265 ieee 802.3at pd interface controller internal 100v, 1a switch, 2-event classification recognition ltc4266/ltc4266a/ltc4266c quad poe pse controller ieee 802.3at, ltpoe ++ , ieee 802.3af power levels ltc4269-1/ ltc4269-2 ieee 802.3af pd inter face with switching regulator ltc4269-1 for flyback, ltc4269-2 for forward regulator ltc4270/ltc4271 12-port poe/poe + /ltpoe ++ pse controller transformer isolation, supports ieee 802.3af, ieee 802.3at and ltpoe ++ pds ltc4274/ltc4274a/ltc4274c single poe pse controller ieee 802.3at, ltpoe ++ 90w, ieee 802.3af power levels lt4275a/lt4275b/lt4275c ltpoe ++ /poe + /poe pd controller external switch, ltpoe ++ support ltc4278 ieee 802.3af pd interface with integrated flyback switching regulator 2-event classification, programmable class, synchronous no-opto flyback controller, 50khz to 250khz, 12v aux support ltc4290/ltc4271 8-port poe/poe + /ltpoe ++ pse controller transformer isolation, supports ieee 802.3af, ieee 802.3at and ltpoe ++ pds lt4320 ideal diode bridge controller 9v to 72v, dc to 600hz, n-channel ideal diode bridge ltc4354 negative voltage diode-or controller and monitor controls tw o n-channel mosfets, 1.2s turn-off, C80v operation ltc4355 positive voltage diode-or controller and monitor controls tw o n-channel mosfets, 0.4s turn-off, 9v to 80v operation ltc4359 ideal diode controller with reverse input protection n-channel, 4v to 80v, msop-8 and dfn-6 packages typical application ltpoe ++ 70w powered device 4321 ta03 lt4321 tg36 bg12 psmn075-100mse 4psmn075-100mse 4 wrth 749022016 bg36 in36in45 in78 in12 data pairs 12 3 6 4 5 8 7 spare pairs outn en outp smaj60a vport pwrgd aux ieeeuvlo rclass rclass++ hsgate psmn040-100mse lt4275 gnd en tg12 bg78 tg45 tg78 bg45 hssrc isolated power supply gnd run v out v in 0.1f 22f ? + 76.8 64.9 + 47nf 3.3k 100k downloaded from: http:///

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