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product structure silicon monolithic integrated circuit this product has no designed protection against radioactive ra ys . 1/ 14 tsz02201-0r7r0g300030-1-2 ? 20 1 6 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 tsz22111 ? 14 ? 001 www.rohm.com voltage detector ic series cmos over voltage detector ic bd 71l4l-1 series general descriptions rohms bd 71 l 4l -1 series is highly accurate and low current over voltage detector ic. it is an n-channel open-drain output type with detection voltage of 4.05v and hysteresis voltage of 30mv. it is most suitable for monitoring the charge of a lithium-ion battery. features ? high accuracy detection voltage ? low current consumption ? n-ch annel open drain o utput ? wide operating temperature r ange ? very small and low height package ? package ssop5 is similar to sot- 23 -5 (jedec) typical application circuit key specifications ? detection voltage: 4.05v (typ.) ? high accuracy detection voltage: 0.8% ? ultra-low current consumption: 0. 8 a (typ.) ? op erating temperature range: -40c to +85c package w(typ) x d(typ) x h(max) ? ssop5: 2.90mm x 2.80mm x 1.25mm ? hvsof5: 1.60mm x 1.60mm x 0. 60 mm applications ? all electronics equipment with lithium- ion battery ? all electronics equipment that needs over-voltage protection v dd1 bd 71l4l -1 v dd2 gnd c l ( capacitor for noise filterin g) r l c in microcontroller rst datashee t downloaded from: http:///
2/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 part function output logic detection voltage value package packaging and number 71 : over voltage l : active 4l : 4.05v g : ssop5 forming specification detector low hfv : hvsof5 embossed tape and reel tr : the pin number 1 is the upper right : ssop5 : hvsof5 r t x x x x - 1 b d x x connection diagram ssop5 hvsof5 pin descriptions ssop5 hvsof5 pin no. symbol function pin no. symbol function 1 ou t output pin 1 out output pin 2 vd d power supply voltage 2 sub * substrate 3 gn d gnd 3 vdd * power supply voltage 4 n.c. no connection pin 4 vdd * power supply voltage 5 n.c. no connection pin 5 gnd gnd * the sub pin (pin no. 2) and vdd pins (pin no. 3 and 4) must be wired together. ordering information lot. no top view out vdd gnd n.c. n.c. marking top view out sub vdd gnd vd d 4 3 2 1 5 marking lot. no n.c. pin is electrically open and can be connected to either vdd or gnd. l1 a r downloaded from: http:///
3/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 absolute maximum ratings parameter symbol limits unit power supply voltage v dd -gnd -0.3 to +7 v output voltage n-channel open drain output v out gnd-0.3 to +7 v output current i o 70 ma power dissipation ssop5 *1*3 pd 0.54 w hv so f5 *2*3 0.53 operating temperature topr -40 to +85 c ambient storage temperature tstg -55 to +125 c *1 reduced by 0.00 54 w/ c when used over 25c. *2 reduced by 0.00 53 w/ c when used over 25c. *3 when mounted on rohm standard circuit board (70mm70mm1.6mm, gl ass epoxy board). caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. electrical characteristics (unless otherwise specified, ta=0 c to 60 c , v dd = 1.2 v to 6.0v) parameter symbol conditions limit unit min typ max detection voltage v det r l = 470k v dd =lh ta=25c 4.034 4.05 4.066 v ta =0 c to 60 c 4.018 - 4.083 hysteresis voltage v det v dd =lhl, r l = 470k - 30 40 mv output delay time lh t plh r l =100k , c l =100pf *4 v out gnd50% - - 100 s output delay time hl t phl r l =100k , c l =100pf *5 v out v dd 50% - - 100 s supply current 1 i dd 1 v dd = v det + 0.2v - 0. 60 2. 40 a supply current 2 i dd 2 v dd = v det - 0.2v - 0. 70 2. 80 a operating voltage range v opl v o ut R 0.8v, r l =470k 1.20 - - v low output voltage(nch) v ol v dd = v det +0.2 v, i sink =4.0 ma - - 0.3 v output leak current i leak v dd =v ds =3.8v - - 1.0 ua v det standard detection voltage 4 .0 5v r l pull-up resistor between vout and v dd . c l capacitor to be connected between vout and gnd. design guarantee. (outgoing inspection is not done on all products.) *4 t plh v dd v det typ. + 0.5v to v det typ.- 0.5v *5 t phl v dd v det typ - 0.5v to v det typ. + 0.5v block diagram figure 1. bd 71 l4l -1 vout gnd vdd vref downloaded from: http:///
4/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 low output voltage : v ol [mv] isink[ma] 0.0 0.2 0.4 0.6 0.8 1.0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 operating voltage range :v opl [v] supply voltage:v dd [v] 0.0 1.0 2.0 3.0 4.0 5.0 0 1 2 3 4 5 6 7 detection voltage : v det [v] supply voltage : v dd [v] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 1 2 3 4 5 6 7 circuit current : i dd [ a] supply voltage : v dd [v] typical performance curves bd 71l4lg-1 figure 2. detection voltage bd 71l4l-1 figure 3. circuit current bd 71l4l-1 figure 4. low output voltage v dd =4.0v bd 71l4l-1 figure 5. operating voltage r ange ta= 25 c t a= 0c ta= 60 c ta= 25 c t a= 0c ta= 60 c bd 71l4l-1 ta= 25 c ta=0 c ta= 60 c ta= 25 c t a= 0c ta= 60 c downloaded from: http:///
5/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 10 20 30 40 50 60 circuit current when off : i dd [ a] temperature : ta[ c] 3.80 3.85 3.90 3.95 4.00 4.05 4.10 4.15 4.20 0 10 20 30 40 50 60 detection voltage : v det [v] temperature : ta[ c] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 10 20 30 40 50 60 operating voltage range : v opl [v] temperature : ta[ c] 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 10 20 30 40 50 60 circuit current when on : i dd [ a] temperature : ta[ c] typical performance curves C continued 3.0 bd 71l4l-1 bd 71l4l-1 figure 8. supply current when off vs. temperature v dd =v det -0.2v v dd = 3.85v high to low (vdet) low to high (vdet- vdet) bd 71l4l-1 figure 6. detection voltage vs. temperature bd 71l4l-1 figure 7. operating voltage range vs. temperature figure 9. supply current when on vs. temperature v dd =v det +0.2v v dd =4.25v downloaded from: http:///
6/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 0 10 20 30 40 50 60 70 80 90 100 0.8 1.2 1.6 2 2.4 2.8 pulse wiidth high : wd[ s] v dd -low : v dd [v] 12 16 20 24 28 32 36 40 0 10 20 30 40 50 60 output delay time : t phl [ s] temperature : ta[ c] 10 11 12 13 14 15 16 17 18 19 20 0 10 20 30 40 50 60 output delay time : t plh [ s] temperature : ta[ c] 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 pulse width high : wd[ s] temperature : ta[ c] typical performance curves C continued bd 71l4l-1 bd 71l4l-1 bd 71l4l-1 figure 10. output delay time (t phl ) v dd =v det -0.5v to v det +0.5v v dd =3.55v to 4.55v figure 11. output delay time(t plh ) v dd =v det +0.5v to v det -0.5v v dd =4.55v to 3.55v figure 12. pulse width vs. temperature v dd -low =1.2v, v dd -high =4.2v, c in =0.1uf output will not change when pulse width is lower or equal to these results. puls e width above the results will cause the output to change. bd 71l4l-1 figure 13. pulse width vs. voltage level v dd -high =4.2v, c in =0.1uf, ta=25c output will not change when pulse width is lower or equal to these results. pulse width above the results will cause the output to change. downloaded from: http:///
7/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 application information 1. explanation of operation the detection and release voltages are used as threshold voltage s. when the voltage applied to v dd pin reaches the appropriate threshold voltage, out pin voltage switches from either high to low or from low to high . please refer to the timing waveform and electrical characteristics for information on hysteresis. because the bd71l4l-1 uses an open drain output type, i t is necessary to connect a pull-up resistor to v dd or another power supply if needed [the output high voltage (v out ) in this case becomes v dd or the voltage of the other power supply]. figure 14. internal block diagram 2. timing waveform example: the following shows the relationship between the input voltage (v dd ) and the output voltage (v out ) when the input power supply voltage (v dd ) swept up and down (the circuit is shown in figure 14 ). 1 when the power supply is turned on, the output is unstab le from after over the operating limit voltage (v opl ) until t plh . therefore it is possible that the reset signal is not outputted when the ri se time of v dd is faster than t plh . 2 when v dd is greater than v opl but less than the reset detection voltage (v det ), the output voltage will switch to high . 3 if v dd exceeds the reset detection voltage (v det ) when the power supply is powered up, v out switches from h to l (with a delay of t phl ). 4 if v dd drops below the release voltage (v det - ? v det ) when the power supply is powered down, v out switches to h (with a delay of t plh ). 5 the potential difference between the detection voltage a nd the release voltage is known as the hysteresis width (? v det ). figure 15. timing waveform vref r 1 r 2 vdd gnd q 1 vout r 3 r l v dd v det v opl 0v v out t phl t phl t plh v ol v oh v det - v det t plh downloaded from: http:///
8/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 3. circuit applications (1) ex ample of common power supply detection reset circuit . case1: power supply of the microcontroller (v dd2 ) differs from the power supply of the reset detection ic (v dd1 ). attach a load resistance r l between output of reset detection ic and v dd2 as shown in figure 16. case2: power supply of the microcontroller (v dd1 ) is same as the power supply of the reset detection ic (v dd1 ). connect a pull up resistor between output and v dd1 . this ic s hysteresis between detection voltage and release voltage is 30mv(typ), so when the v out logic changes, chattering occurs. c in value needs more than 0.1uf to eliminate this. when a capacitance c l for noise filtering is connected to the out pin (the reset signal input terminal of the microcontroller), please take into account the rise and fal l waveform of the output voltage (v out ). ( 2) the following is an example of a circuit application in whic h an or connection between two types of detection voltage resets the microcontroller. to reset the microcontroller when many independent powe r supplies are used in the system, or connect the devic e to microcontrollers input with pull-up resistor to the supply voltage of the microcontroll er (v dd3 ) as shown in figure 17. by pulling-up to v dd3 , output high voltage of micro -controller power supply is possible. v dd1 bd 71l4l -1 v dd2 gnd c l ( capacitor is for noise filtering r l c in microcontroller rst figure 16. open drain output type v dd2 v dd1 v dd3 gnd microcontroller r l bd 71l4l -1 bd71l4l-1 r st figure 17. or circuit connection application downloaded from: http:///
9/ 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 circuit applications (continued) (3) example of power supply with resistor dividers in applications wherein the power supply voltage of an ic comes from a resistor divider circuit, an inrush current wi ll flow into the circuit when the output level switches from high to low or vice versa. in rush current is a sudden surge of current that flows from the power supply (v dd ) to ground (gnd) as the output logic changes its state. t his current flow may cause malfunction in the systems operation suc h as output oscillations, etc. figure 18. resistor divider connection application input voltage will decrease by a drop of [inrush current (i 1 )] [input resistor (r 2 )] because of the inrush current at the time when the output switches from high to low. when the input v oltage decreases and falls below the release voltage [v det - v det ], the output voltage switches from low to high. at this time, the inrush current stops flowing through output high, and the voltage drop is reduced. as a re sult, the output switches from high to low, which again causes the inrush current to flow and the voltage to drop. this operation repeats and will result to oscillation. in case resistor divider will not use and only r 2 will use, same response will happen. note1: the circuit connection mentioned above does not gua rantee successful operation. please perform thorough evaluation using the act ual application and set countermeasures. v out r 2 v dd bd71l4l-1 gnd r 1 i 1 v 1 c in c l c in 0.1f (note1) i dd v dd v det 0 inrush current figure 19. current consumption vs. power supply voltage downloaded from: http:///
10 / 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage th e ic. take precautions against reverse polarity when connecting the power supply, such as mounting an external dio de between the power supply and the ics power supply pins . 2. power supply lines design the pcb layout pattern to provide low impedance supply line s. furthermore, connect a capacitor to ground at all power supply pins . consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground trac es, the two ground traces should be routed separately but connected to a single ground at the reference point of th e application board to avoid fluctuations in the small- signal ground caused by large currents. also ensure that the ground trace s of external components do not cause variations on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the maximum junction temperature rati ng be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum junction temperature rating. 6. recommended operating conditions these conditions represent a range within which the expec ted characteristics of the ic can be approximately obtained. the electrical characteristics are guaranteed under the conditi ons of each parameter. 7. inr ush current when power is first supplied to the ic, it is possible tha t the internal logic may be unstable and inrush current m ay flow instantaneously due to the internal powering sequence an d delays, especially if the ic has more than one power sup ply. therefore, give special consideration to power coupling cap acitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field m ay cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capac itor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors completely aft er each process or step. the ics power supply should always be turned off completely before connecting or remo ving it from the test setup during the inspection process. to prevent damage from static discharge, ground the ic during assemb ly and use similar precautions during transport and storage. 10. inter- pin short and mounting errors ensure that the direction and position are correct when mounti ng the ic on the pcb. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each other especially to ground. inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. unused input pins input pins of an ic are often connected to the gate of a mos t ransistor. the gate has extremely high impedance and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small ch arge acquired in this way is enough to produce a significant e ffect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specifie d, unused input pins should be connected to the power supply or ground line. downloaded from: http:///
11 / 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 operational notes C continued 12. regarding input pins of the ic in the construction of this ic, p-n junctions are inevitably forme d creating parasitic diodes or transistors. the operation of these parasitic elements can result in mutual interferenc e among circuits, operational faults, or physical damage. therefore, conditions which cause these parasitic elements to opera te, such as applying a voltage to an input pin lower than the ground voltage should be avoided. furthermore, do n ot apply a voltage to the input pins when no power supply voltage is applied to the ic. even if the power supply volta ge is applied, make sure that the input pins have vo ltages within the values specified in the electrical characteristics of this ic. 13. ceramic capacitor when using a ceramic capacitor, determine the dielectric c onstant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bias and others. 14. area of safe operation (aso) operate the ic such that the output voltage, output current, and th e maximum junction temperature rating are all within the area of safe operation (aso). 15. bypass capacitor for noise rejection to help reject noise, put more than 0. 1f capacitor between v dd pin and gnd and 1000pf capacitor between vout pin and gnd. be careful when using extremely big capacitor as trans ient response will be affected. 16. the v dd line impedance might cause oscillation because of the dete ction current. 17. a v dd to gnd capacitor (as close connection as possible) should be use d in high v dd line impedance condition. 18. external parameters the recommended parameter range for r l is 1 0k to 1m. there are many factors (board layout, etc) that can affect characteristics. operating beyond the recommended values does not guarantee correct operation. please verify and confirm using practical applications. 19. when v dd falls below the minimum operating voltage, output becomes unstable. when output is connected to pull- up voltage, output will be equivalent to pull-up voltage. 20. power- on reset operation please note that the power on reset output varies with the v dd rise time. please verify the behavior in the actual operation. 21. this ic has extremely high impedance pins. small leak cu rrent due to the uncleanness of pcb surface might cause unexpected operations. application values in these condi tions should be selected carefully. if the leakage is ass umed between the vout pin and the gnd pin, consider to set the valu e of pull up resistor lower than 1/10 of the impedance of assumed leakage route. downloaded from: http:///
12 / 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 physical dimension, tape and reel information package na me ssop5 downloaded from: http:///
13 / 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 package name hvsof5 downloaded from: http:///
14 / 14 bd 71l4l-1 series tsz02201-0r7r0g300030-1-2 ? 20 16 rohm co., ltd. all rights reserved. 08.jun.2016.rev.005 www.rohm.com tsz22111 ? 15 ? 001 revision history date revision changes 20 .may.2013 001 new release 24.july.2013 002 modify the general description and applications on page 1 changed vdet spec on pages 1 ~ 3 changed idd1 and idd2 spec on page 3 changed i leak condition on page 3 24.oct.2013 003 add 1 packages as following:hvsof5 31 .jan.2014 004 modify the package on page 1 and the connection diagram on pa ge 2 add note of hvsof5 on page 2 08 .jun.2016 005 add package dimension on page 1 add note for ssop5 nc pin on page 2 updated application information on page 7 ~ 9 updated operational notes on page 10 ~ 11 downloaded from: http:///
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datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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