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  05/15/12 www.irf.com 1 hexfet   power mosfet IRFI4510Gpbf s d g gds gate drain source d s d g to-220ab full-pak benefits improved gate, avalanche and dynamic dv/dt ruggedness  fully characterized capacitance and avalanche soa  enhanced body diode dv/dt and di/dt capability  lead-free  halogen-free applications  high efficiency synchronous rectification in smps  uninterruptible power supply  high speed power switching  hard switched and high frequency circuits  v dss 100v r ds(on) typ. 10.7m ? max. 13.5m ? i d 35a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v a i d @ t c = 100c continuous drain current, v gs @ 10v i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) single pulse avalanche energy  mj t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r ? jc junction-to-case  CCC 3.6 c/w r ? ja junction-to-ambient  CCC 65 42 max. 3524 180 -55 to + 175 0.28 10lb  in (1.1n  m) 300 20 206 downloaded from: http:///

 2 www.irf.com s d g    repetitive rating; pulse width limited by max. junction temperature.  limited by t jmax , starting t j = 25c, l = 0.93mh r g = 50 ? , i as = 21a, v gs =10v. part not recommended for use above this value.  pulse width ? 400 s; duty cycle ? 2%.   ?  
    
   c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 100 CCC CCC v ? v (br)dss / ? t j breakdown voltage temp. coefficient CCC 0.11 CCC v/c r ds(on) static drain-to-source on-resistance CCC 10.7 13.5 m ? v gs( th) gate threshold voltage 2.0 CCC 4.0 v i dss drain-to-source leakage current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 r g(int) internal gate resistance CCC 0.6 CCC ? dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 55 CCC CCC s q g total gate charge CCC 54 81 nc q gs gate-to-source charge CCC 13 CCC q gd gate-to-drain ("miller") charge CCC 16 CCC t d(on) turn-on delay time CCC 16 CCC ns t r rise time CCC 33 CCC t d(off) turn-off delay time CCC 54 CCC t f fall time CCC 37 CCC c iss input capacitance CCC 2998 CCC pf c oss output capacitance CCC 216 CCC c rss reverse transfer capacitance CCC 103 CCC c oss eff. (er) effective output capacitance (energy related) CCC 261 CCC c oss eff. (tr) effective output capacitance (time related) CCC 494 CCC diode characteristics symbol parameter min. typ. max. units i s continuous source current CCC CCC 35 a (body diode) i sm pulsed source current CCC CCC 180 a (body diode)  v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time CCC 39 59 ns t j = 25c v r = 85v CCC 47 71 t j = 125c i f = 21a q rr reverse recovery charge CCC 63 95 nc t j = 25c di/dt = 100a/ s  CCC 90 135 t j = 125c i rrm reverse recovery current CCC 2.9 CCC a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dom inated by ls+ld) v ds = 100v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250 a reference to 25c, i d = 5ma  v gs = 10v, i d = 21a  v ds = v gs , i d = 100 a v ds = 100v, v gs = 0v p-n junction diode. t j = 25c, i s = 21a, v gs = 0v  ? = 1.0mhz v gs = 0v, v ds = 0v to 80v  , see fig.11 v gs = 0v, v ds = 0v to 80v  conditions mosfet symbol showing the integral reverse v gs = 10v  v gs = 0v v ds = 50v conditions v ds = 50v, i d = 21a i d = 21a v gs = 10v  v dd = 65v i d = 21a r g = 7.5 ? v ds = 50v v gs = 20v v gs = -20v downloaded from: http:///

 www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 6.0v 5.5v 5.0v 4.75v 4.5v bottom 4.25v ? 60 s pulse width tj = 25c 4.25v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.25v ? 60 s pulse width tj = 175c vgs top 15v 10v 6.0v 5.5v 5.0v 4.75v 4.5v bottom 4.25v 1 2 3 4 5 6 7 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 50v ? 60 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 21a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 10203040506070 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v v ds = 50v v ds = 20v i d = 21a downloaded from: http:///

 4 www.irf.com fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v sd , source-to-drain voltage (v) 1.0 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 i d , d r a i n c u r r e n t ( a ) -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 90 95 100 105 110 115 120 125 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma -20 0 20 40 60 80 100 120 v ds, drain-to-source voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 e n e r g y ( j ) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 700 800 900 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 6.7a 11a bottom 21a 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec dc downloaded from: http:///

 www.irf.com 5 fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 22a, 22b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ? j ? j ? 1 ? 1 ? 2 ? 2 ? 3 ? 3 r 1 r 1 r 2 r 2 r 3 r 3 ci i ? ri ci= ? i ? ri ? ? c ? 4 ? 4 r 4 r 4 ri (c/w) ?? i (sec) 1.34312 0.4706191.47895 0.072697 0.62114 0.006558 0.15442 0.000152 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 tav (sec) 0.01 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ?? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 21a downloaded from: http:///

 6 www.irf.com  
 
   fig 16. threshold voltage vs. temperature  
   

 
    
   -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100 a i d = 250 a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 100 200 300 400 500 q r r ( n c ) i f = 21a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 5 10 15 20 25 i r r m ( a ) i f = 14a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 5 10 15 20 25 i r r m ( a ) i f = 21a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 100 200 300 400 500 q r r ( n c ) i f = 14a v r = 85v t j = 25c t j = 125c downloaded from: http:///

 www.irf.com 7 fig 23a. switching time test circuit fig 23b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1 s duty factor < 0.1% v dd v ds l d d.u.t + - fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 21.    
     for n-channel hexfet   power mosfets  
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         p.w. period di/dt diode recovery dv/dt ripple ? 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period !   
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 8 www.irf.com data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on irs web site. to-220ab full-pak packages are not recommended for surface mount application. 
        
  
    
      
          
     ir world headquarters: 101n sepulveda blvd, el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 05/2012          


 
            
  
      
 

        
  
      
   
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